[PATCH v7 00/14] further mt7988 devicetree work

[PATCH v7 00/14] further mt7988 devicetree work

[Frank Wunderlich]

From: Frank Wunderlich <frank-w@public-files.de>

Sorry messed up the rebase in v6 somehow.

This series continues mt7988 devicetree work

- Extend cpu frequency scaling with CCI
- GPIO leds
- Basic network-support (ethernet controller + builtin switch + SFP Cages)

depencies (i hope this list is complete and latest patches/series linked):

support interrupt-names is optional again as i re-added the reserved IRQs
(they are not unusable as i thought and can allow features in future)
https://patchwork.kernel.org/project/netdevbpf/patch/20250619132125.78368-2-linux@fw-web.de/

needs change in mtk ethernet driver for the sram to be read from separate node:
https://patchwork.kernel.org/project/netdevbpf/patch/566ca90fc59ad0d3aff8bc8dc22ebaf0544bce47.1751072868.git.daniel@makrotopia.org/

for SFP-Function (macs currently disabled):

PCS clearance which is a 1.5 year discussion currently ongoing

Daniel asked netdev for a way 2 go:
https://lore.kernel.org/netdev/aEwfME3dYisQtdCj@pidgin.makrotopia.org/

e.g. something like this (one of):
* https://patchwork.kernel.org/project/netdevbpf/patch/20250610233134.3588011-4-sean.anderson@linux.dev/ (v6)
* https://patchwork.kernel.org/project/netdevbpf/patch/20250511201250.3789083-4-ansuelsmth@gmail.com/ (v4)
* https://patchwork.kernel.org/project/netdevbpf/patch/ba4e359584a6b3bc4b3470822c42186d5b0856f9.1721910728.git.daniel@makrotopia.org/

full usxgmii driver:
https://patchwork.kernel.org/project/netdevbpf/patch/07845ec900ba41ff992875dce12c622277592c32.1702352117.git.daniel@makrotopia.org/

first PCS-discussion is here:
https://patchwork.kernel.org/project/netdevbpf/patch/8aa905080bdb6760875d62cb3b2b41258837f80e.1702352117.git.daniel@makrotopia.org/
some more here:
https://lore.kernel.org/netdev/20250511201250.3789083-4-ansuelsmth@gmail.com/

and then dts nodes for sgmiisys+usxgmii+2g5 firmware

when above depencies are solved the mac1/2 can be enabled and 2.5G phy/SFP slots will work.

changes:
v7:
- squashed first 2 v6 patches as they should to have interrupt-names and mt7988
  parts separated

v6:
binding:
- split out the interrupt-names into separate patch
- update irq(name) min count to 4
- move interrupt-names up
- add sram-property
- drop second reg entry and minitems as there is only 1 item left

dts:
- fix whitespace-errors for pdma irqs (spaces vs. tabs)
- move sram from eth reg to own sram node (needs CONFIG_SRAM)

v5:
- add reserved irqs and change names
- update binding for 8 irqs with different names (rx,tx => fe1+fe2, rx-ringX => pdmaX)
(dropped Robs RB due to this change again, sorry)

v4:
net-binding:
- allow interrupt names and increase max interrupts to 6 because of RSS/LRO interrupts
  (dropped Robs RB due to this change)

dts-patches:
- add interrupts for RSS/LRO and interrupt-names for ethernet node
- eth-reg and clock whitespace-fix
- comment for fixed-link on gmac0
- drop phy-mode properties as suggested by andrew
- drop phy-connection-type on 2g5 board
- reorder some properties
- update 2g5 phy node
- unit-name dec instead of hex to match reg property
- move compatible before reg
- drop phy-mode

v3:
- dropped patches already applied (SPI+thermal)
- added soc specific cci compatible (new binding patch + changed dts)
- enable 2g5 phy because driver is now merged
- add patch for cleaning up unnecessary pins
- add patch for gpio-leds
- add patch for adding ethernet aliases

v2:
- change reg to list of items in eth binding
- changed mt7530 binding:
- unevaluatedProperties=false
- mediatek,pio subproperty
- from patternProperty to property
- board specific properties like led function and labels moved to bpi-r4 dtsi

Frank Wunderlich (14):
  dt-bindings: net: mediatek,net: allow irq names
  dt-bindings: net: mediatek,net: update for mt7988
  dt-bindings: net: dsa: mediatek,mt7530: add dsa-port definition for
    mt7988
  dt-bindings: net: dsa: mediatek,mt7530: add internal mdio bus
  dt-bindings: interconnect: add mt7988-cci compatible
  arm64: dts: mediatek: mt7988: add cci node
  arm64: dts: mediatek: mt7988: add basic ethernet-nodes
  arm64: dts: mediatek: mt7988: add switch node
  arm64: dts: mediatek: mt7988a-bpi-r4: add proc-supply for cci
  arm64: dts: mediatek: mt7988a-bpi-r4: drop unused pins
  arm64: dts: mediatek: mt7988a-bpi-r4: add gpio leds
  arm64: dts: mediatek: mt7988a-bpi-r4: add aliases for ethernet
  arm64: dts: mediatek: mt7988a-bpi-r4: add sfp cages and link to gmac
  arm64: dts: mediatek: mt7988a-bpi-r4: configure switch phys and leds

 .../bindings/interconnect/mediatek,cci.yaml   |  11 +-
 .../bindings/net/dsa/mediatek,mt7530.yaml     |  24 +-
 .../devicetree/bindings/net/mediatek,net.yaml |  47 ++-
 .../mediatek/mt7988a-bananapi-bpi-r4-2g5.dts  |  11 +
 .../dts/mediatek/mt7988a-bananapi-bpi-r4.dts  |  19 ++
 .../dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi | 198 ++++++-----
 arch/arm64/boot/dts/mediatek/mt7988a.dtsi     | 318 +++++++++++++++++-
 7 files changed, 529 insertions(+), 99 deletions(-)

-- 
2.43.0

[PATCH v7 01/14] dt-bindings: net: mediatek,net: allow irq names

[Frank Wunderlich]

From: Frank Wunderlich <frank-w@public-files.de>

In preparation for MT7988 and RSS/LRO allow the interrupt-names
property. Also increase the maximum IRQ count to 8 (4 FE + 4 RSS),
but set boundaries for all compatibles same as irq count.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
---
v7: fixed wrong rebase
v6: new patch splitted from the mt7988 changes
---
 .../devicetree/bindings/net/mediatek,net.yaml | 38 ++++++++++++++++++-
 1 file changed, 37 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/net/mediatek,net.yaml b/Documentation/devicetree/bindings/net/mediatek,net.yaml
index 9e02fd80af83..6672db206b38 100644
--- a/Documentation/devicetree/bindings/net/mediatek,net.yaml
+++ b/Documentation/devicetree/bindings/net/mediatek,net.yaml
@@ -40,7 +40,19 @@ properties:
 
   interrupts:
     minItems: 1
-    maxItems: 4
+    maxItems: 8
+
+  interrupt-names:
+    minItems: 1
+    items:
+      - const: fe0
+      - const: fe1
+      - const: fe2
+      - const: fe3
+      - const: pdma0
+      - const: pdma1
+      - const: pdma2
+      - const: pdma3
 
   power-domains:
     maxItems: 1
@@ -135,6 +147,10 @@ allOf:
           minItems: 3
           maxItems: 3
 
+        interrupt-names:
+          minItems: 3
+          maxItems: 3
+
         clocks:
           minItems: 4
           maxItems: 4
@@ -166,6 +182,9 @@ allOf:
         interrupts:
           maxItems: 1
 
+        interrupt-namess:
+          maxItems: 1
+
         clocks:
           minItems: 2
           maxItems: 2
@@ -192,6 +211,10 @@ allOf:
           minItems: 3
           maxItems: 3
 
+        interrupt-names:
+          minItems: 3
+          maxItems: 3
+
         clocks:
           minItems: 11
           maxItems: 11
@@ -232,6 +255,10 @@ allOf:
           minItems: 3
           maxItems: 3
 
+        interrupt-names:
+          minItems: 3
+          maxItems: 3
+
         clocks:
           minItems: 17
           maxItems: 17
@@ -274,6 +301,9 @@ allOf:
         interrupts:
           minItems: 4
 
+        interrupt-names:
+          minItems: 4
+
         clocks:
           minItems: 15
           maxItems: 15
@@ -312,6 +342,9 @@ allOf:
         interrupts:
           minItems: 4
 
+        interrupt-names:
+          minItems: 4
+
         clocks:
           minItems: 15
           maxItems: 15
@@ -350,6 +383,9 @@ allOf:
         interrupts:
           minItems: 4
 
+        interrupt-names:
+          minItems: 4
+
         clocks:
           minItems: 24
           maxItems: 24
-- 
2.43.0

[PATCH v7 02/14] dt-bindings: net: mediatek,net: update for mt7988

[Frank Wunderlich]

From: Frank Wunderlich <frank-w@public-files.de>

Update binding for mt7988 which has 3 gmac and a sram for dma
operations.

MT7988 has 4 FE IRQs (currently only 2 are used) and 4 IRQs for use
with RSS/LRO later.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
---
v6:
- split out the interrupt-names into separate patch
- update irq(name) min count to 4
- add sram-property
- drop second reg entry and minitems as there is only 1 item left again

v5:
- fix v4 logmessage and change description a bit describing how i get
  the irq count.
- update binding for 8 irqs with different names (rx,tx => fe0..fe3)
  including the 2 reserved irqs which can be used later
- change rx-ringX to pdmaX to be closer to hardware documentation

v4:
- increase max interrupts to 6 because of adding RSS/LRO interrupts (4)
  and dropping 2 reserved irqs (0+3) around rx+tx
- dropped Robs RB due to this change
- allow interrupt names
- add interrupt-names without reserved IRQs on mt7988
  this requires mtk driver patch:
  https://patchwork.kernel.org/project/netdevbpf/patch/20250616080738.117993-2-linux@fw-web.de/

v2:
- change reg to list of items
---
 Documentation/devicetree/bindings/net/mediatek,net.yaml | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/mediatek,net.yaml b/Documentation/devicetree/bindings/net/mediatek,net.yaml
index 6672db206b38..74a139000f60 100644
--- a/Documentation/devicetree/bindings/net/mediatek,net.yaml
+++ b/Documentation/devicetree/bindings/net/mediatek,net.yaml
@@ -28,7 +28,8 @@ properties:
       - ralink,rt5350-eth
 
   reg:
-    maxItems: 1
+    items:
+      - description: Register for accessing the MACs.
 
   clocks:
     minItems: 2
@@ -66,6 +67,10 @@ properties:
       - const: gmac
       - const: ppe
 
+  sram:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description: phandle to mmio SRAM
+
   mediatek,ethsys:
     $ref: /schemas/types.yaml#/definitions/phandle
     description:
@@ -418,7 +423,7 @@ allOf:
             - const: xgp3
 
 patternProperties:
-  "^mac@[0-1]$":
+  "^mac@[0-2]$":
     type: object
     unevaluatedProperties: false
     allOf:
-- 
2.43.0

[PATCH v7 03/14] dt-bindings: net: dsa: mediatek,mt7530: add dsa-port definition for mt7988

[Frank Wunderlich]

From: Frank Wunderlich <frank-w@public-files.de>

Add own dsa-port binding for SoC with internal switch where only phy-mode
'internal' is valid.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 .../bindings/net/dsa/mediatek,mt7530.yaml          | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml b/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml
index 51205f9f2985..9b983fdbf3c7 100644
--- a/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml
+++ b/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml
@@ -190,6 +190,18 @@ required:
   - reg
 
 $defs:
+  builtin-dsa-port:
+    patternProperties:
+      "^(ethernet-)?ports$":
+        patternProperties:
+          "^(ethernet-)?port@[0-6]$":
+            if:
+              required: [ ethernet ]
+            then:
+              properties:
+                phy-mode:
+                  const: internal
+
   mt7530-dsa-port:
     patternProperties:
       "^(ethernet-)?ports$":
@@ -297,7 +309,7 @@ allOf:
             - airoha,en7581-switch
             - airoha,an7583-switch
     then:
-      $ref: "#/$defs/mt7530-dsa-port"
+      $ref: "#/$defs/builtin-dsa-port"
       properties:
         gpio-controller: false
         mediatek,mcm: false
-- 
2.43.0

[PATCH v7 04/14] dt-bindings: net: dsa: mediatek,mt7530: add internal mdio bus

[Frank Wunderlich]

From: Frank Wunderlich <frank-w@public-files.de>

Mt7988 buildin switch has own mdio bus where ge-phys are connected.
Add related property for this.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
v2:
- change from patternproperty to property
- add unevaluatedProperties and mediatek,pio subproperty
---
 .../devicetree/bindings/net/dsa/mediatek,mt7530.yaml   | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml b/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml
index 9b983fdbf3c7..815a90808901 100644
--- a/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml
+++ b/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml
@@ -136,6 +136,16 @@ properties:
       See Documentation/devicetree/bindings/regulator/mt6323-regulator.txt for
       details for the regulator setup on these boards.
 
+  mdio:
+    $ref: /schemas/net/mdio.yaml#
+    unevaluatedProperties: false
+
+    properties:
+      mediatek,pio:
+        $ref: /schemas/types.yaml#/definitions/phandle
+        description:
+          Phandle pointing to the mediatek pinctrl node.
+
   mediatek,mcm:
     type: boolean
     description:
-- 
2.43.0

[PATCH v7 05/14] dt-bindings: interconnect: add mt7988-cci compatible

[Frank Wunderlich]

From: Frank Wunderlich <frank-w@public-files.de>

Add compatible for Mediatek MT7988 SoC with mediatek,mt8183-cci fallback
which is taken by driver.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Georgi Djakov <djakov@kernel.org>
---
v2:
- no RFC
- drop "items" as sugested by conor
---
 .../bindings/interconnect/mediatek,cci.yaml           | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml b/Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml
index 58611ba2a0f4..4d72525f407e 100644
--- a/Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml
+++ b/Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml
@@ -17,9 +17,14 @@ description: |
 
 properties:
   compatible:
-    enum:
-      - mediatek,mt8183-cci
-      - mediatek,mt8186-cci
+    oneOf:
+      - enum:
+          - mediatek,mt8183-cci
+          - mediatek,mt8186-cci
+      - items:
+          - enum:
+              - mediatek,mt7988-cci
+          - const: mediatek,mt8183-cci
 
   clocks:
     items:
-- 
2.43.0

[PATCH v7 06/14] arm64: dts: mediatek: mt7988: add cci node

[Frank Wunderlich]

From: Frank Wunderlich <frank-w@public-files.de>

Add cci devicetree node for cpu frequency scaling.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
v3:
- add mt7988-cci compatible as suggested by angelo
---
 arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 33 +++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
index c46b31f8d653..560ec86dbec0 100644
--- a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
@@ -12,6 +12,35 @@ / {
 	#address-cells = <2>;
 	#size-cells = <2>;
 
+	cci: cci {
+		compatible = "mediatek,mt7988-cci", "mediatek,mt8183-cci";
+		clocks = <&mcusys CLK_MCU_BUS_DIV_SEL>,
+			 <&topckgen CLK_TOP_XTAL>;
+		clock-names = "cci", "intermediate";
+		operating-points-v2 = <&cci_opp>;
+	};
+
+	cci_opp: opp-table-cci {
+		compatible = "operating-points-v2";
+		opp-shared;
+		opp-480000000 {
+			opp-hz = /bits/ 64 <480000000>;
+			opp-microvolt = <850000>;
+		};
+		opp-660000000 {
+			opp-hz = /bits/ 64 <660000000>;
+			opp-microvolt = <850000>;
+		};
+		opp-900000000 {
+			opp-hz = /bits/ 64 <900000000>;
+			opp-microvolt = <850000>;
+		};
+		opp-1080000000 {
+			opp-hz = /bits/ 64 <1080000000>;
+			opp-microvolt = <900000>;
+		};
+	};
+
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
@@ -25,6 +54,7 @@ cpu0: cpu@0 {
 				 <&topckgen CLK_TOP_XTAL>;
 			clock-names = "cpu", "intermediate";
 			operating-points-v2 = <&cluster0_opp>;
+			mediatek,cci = <&cci>;
 		};
 
 		cpu1: cpu@1 {
@@ -36,6 +66,7 @@ cpu1: cpu@1 {
 				 <&topckgen CLK_TOP_XTAL>;
 			clock-names = "cpu", "intermediate";
 			operating-points-v2 = <&cluster0_opp>;
+			mediatek,cci = <&cci>;
 		};
 
 		cpu2: cpu@2 {
@@ -47,6 +78,7 @@ cpu2: cpu@2 {
 				 <&topckgen CLK_TOP_XTAL>;
 			clock-names = "cpu", "intermediate";
 			operating-points-v2 = <&cluster0_opp>;
+			mediatek,cci = <&cci>;
 		};
 
 		cpu3: cpu@3 {
@@ -58,6 +90,7 @@ cpu3: cpu@3 {
 				 <&topckgen CLK_TOP_XTAL>;
 			clock-names = "cpu", "intermediate";
 			operating-points-v2 = <&cluster0_opp>;
+			mediatek,cci = <&cci>;
 		};
 
 		cluster0_opp: opp-table-0 {
-- 
2.43.0

[PATCH v7 07/14] arm64: dts: mediatek: mt7988: add basic ethernet-nodes

[Frank Wunderlich]

From: Frank Wunderlich <frank-w@public-files.de>

Add basic ethernet related nodes.

Mac1+2 needs pcs (sgmii+usxgmii) to work correctly which will be linked
later when driver is merged.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
---
v6:
- fix whitespace-errors for pdma irqs (spaces vs. tabs)
- move sram from eth reg to own sram node (needs CONFIG_SRAM)

v5:
- add reserved irqs and change names to fe0..fe3
- change rx-ringX to pdmaX to be closer to documentation

v4:
- comment for fixed-link on gmac0
- update 2g5 phy node
  - unit-name dec instead of hex to match reg property
  - move compatible before reg
  - drop phy-mode
- add interrupts for RSS
- add interrupt-names and drop reserved irqs for ethernet
- some reordering
- eth-reg and clock whitespace-fix based on angelos review
---
 arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 137 +++++++++++++++++++++-
 1 file changed, 134 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
index 560ec86dbec0..cf765a6b1fa8 100644
--- a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
@@ -680,7 +680,28 @@ xphyu3port0: usb-phy@11e13000 {
 			};
 		};
 
-		clock-controller@11f40000 {
+		xfi_tphy0: phy@11f20000 {
+			compatible = "mediatek,mt7988-xfi-tphy";
+			reg = <0 0x11f20000 0 0x10000>;
+			clocks = <&xfi_pll CLK_XFIPLL_PLL_EN>,
+				 <&topckgen CLK_TOP_XFI_PHY_0_XTAL_SEL>;
+			clock-names = "xfipll", "topxtal";
+			resets = <&watchdog 14>;
+			mediatek,usxgmii-performance-errata;
+			#phy-cells = <0>;
+		};
+
+		xfi_tphy1: phy@11f30000 {
+			compatible = "mediatek,mt7988-xfi-tphy";
+			reg = <0 0x11f30000 0 0x10000>;
+			clocks = <&xfi_pll CLK_XFIPLL_PLL_EN>,
+				 <&topckgen CLK_TOP_XFI_PHY_1_XTAL_SEL>;
+			clock-names = "xfipll", "topxtal";
+			resets = <&watchdog 15>;
+			#phy-cells = <0>;
+		};
+
+		xfi_pll: clock-controller@11f40000 {
 			compatible = "mediatek,mt7988-xfi-pll";
 			reg = <0 0x11f40000 0 0x1000>;
 			resets = <&watchdog 16>;
@@ -714,19 +735,129 @@ phy_calibration_p3: calib@97c {
 			};
 		};
 
-		clock-controller@15000000 {
+		ethsys: clock-controller@15000000 {
 			compatible = "mediatek,mt7988-ethsys", "syscon";
 			reg = <0 0x15000000 0 0x1000>;
 			#clock-cells = <1>;
 			#reset-cells = <1>;
 		};
 
-		clock-controller@15031000 {
+		ethwarp: clock-controller@15031000 {
 			compatible = "mediatek,mt7988-ethwarp";
 			reg = <0 0x15031000 0 0x1000>;
 			#clock-cells = <1>;
 			#reset-cells = <1>;
 		};
+
+		eth: ethernet@15100000 {
+			compatible = "mediatek,mt7988-eth";
+			reg = <0 0x15100000 0 0x80000>;
+			interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "fe0", "fe1", "fe2", "fe3", "pdma0",
+					  "pdma1", "pdma2", "pdma3";
+			clocks = <&ethsys CLK_ETHDMA_CRYPT0_EN>,
+				 <&ethsys CLK_ETHDMA_FE_EN>,
+				 <&ethsys CLK_ETHDMA_GP2_EN>,
+				 <&ethsys CLK_ETHDMA_GP1_EN>,
+				 <&ethsys CLK_ETHDMA_GP3_EN>,
+				 <&ethwarp CLK_ETHWARP_WOCPU2_EN>,
+				 <&ethwarp CLK_ETHWARP_WOCPU1_EN>,
+				 <&ethwarp CLK_ETHWARP_WOCPU0_EN>,
+				 <&ethsys CLK_ETHDMA_ESW_EN>,
+				 <&topckgen CLK_TOP_ETH_GMII_SEL>,
+				 <&topckgen CLK_TOP_ETH_REFCK_50M_SEL>,
+				 <&topckgen CLK_TOP_ETH_SYS_200M_SEL>,
+				 <&topckgen CLK_TOP_ETH_SYS_SEL>,
+				 <&topckgen CLK_TOP_ETH_XGMII_SEL>,
+				 <&topckgen CLK_TOP_ETH_MII_SEL>,
+				 <&topckgen CLK_TOP_NETSYS_SEL>,
+				 <&topckgen CLK_TOP_NETSYS_500M_SEL>,
+				 <&topckgen CLK_TOP_NETSYS_PAO_2X_SEL>,
+				 <&topckgen CLK_TOP_NETSYS_SYNC_250M_SEL>,
+				 <&topckgen CLK_TOP_NETSYS_PPEFB_250M_SEL>,
+				 <&topckgen CLK_TOP_NETSYS_WARP_SEL>,
+				 <&ethsys CLK_ETHDMA_XGP1_EN>,
+				 <&ethsys CLK_ETHDMA_XGP2_EN>,
+				 <&ethsys CLK_ETHDMA_XGP3_EN>;
+			clock-names = "crypto", "fe", "gp2", "gp1", "gp3",
+				      "ethwarp_wocpu2", "ethwarp_wocpu1",
+				      "ethwarp_wocpu0", "esw", "top_eth_gmii_sel",
+				      "top_eth_refck_50m_sel", "top_eth_sys_200m_sel",
+				      "top_eth_sys_sel", "top_eth_xgmii_sel",
+				      "top_eth_mii_sel", "top_netsys_sel",
+				      "top_netsys_500m_sel", "top_netsys_pao_2x_sel",
+				      "top_netsys_sync_250m_sel",
+				      "top_netsys_ppefb_250m_sel",
+				      "top_netsys_warp_sel","xgp1", "xgp2", "xgp3";
+			assigned-clocks = <&topckgen CLK_TOP_NETSYS_2X_SEL>,
+					  <&topckgen CLK_TOP_NETSYS_GSW_SEL>,
+					  <&topckgen CLK_TOP_USXGMII_SBUS_0_SEL>,
+					  <&topckgen CLK_TOP_USXGMII_SBUS_1_SEL>,
+					  <&topckgen CLK_TOP_SGM_0_SEL>,
+					  <&topckgen CLK_TOP_SGM_1_SEL>;
+			assigned-clock-parents = <&apmixedsys CLK_APMIXED_NET2PLL>,
+						 <&topckgen CLK_TOP_NET1PLL_D4>,
+						 <&topckgen CLK_TOP_NET1PLL_D8_D4>,
+						 <&topckgen CLK_TOP_NET1PLL_D8_D4>,
+						 <&apmixedsys CLK_APMIXED_SGMPLL>,
+						 <&apmixedsys CLK_APMIXED_SGMPLL>;
+			sram = <&eth_sram>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			mediatek,ethsys = <&ethsys>;
+			mediatek,infracfg = <&topmisc>;
+
+			gmac0: mac@0 {
+				compatible = "mediatek,eth-mac";
+				reg = <0>;
+				phy-mode = "internal";
+
+				/* Connected to internal switch */
+				fixed-link {
+					speed = <10000>;
+					full-duplex;
+					pause;
+				};
+			};
+
+			gmac1: mac@1 {
+				compatible = "mediatek,eth-mac";
+				reg = <1>;
+				status = "disabled";
+			};
+
+			gmac2: mac@2 {
+				compatible = "mediatek,eth-mac";
+				reg = <2>;
+				status = "disabled";
+			};
+
+			mdio_bus: mdio-bus {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				/* internal 2.5G PHY */
+				int_2p5g_phy: ethernet-phy@15 {
+					compatible = "ethernet-phy-ieee802.3-c45";
+					reg = <15>;
+				};
+			};
+		};
+
+		eth_sram: sram@15400000 {
+			compatible = "mmio-sram";
+			reg = <0 0x15400000 0 0x200000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0 0x15400000 0 0x200000>;
+		};
 	};
 
 	thermal-zones {
-- 
2.43.0

[PATCH v7 08/14] arm64: dts: mediatek: mt7988: add switch node

[Frank Wunderlich]

From: Frank Wunderlich <frank-w@public-files.de>

Add mt7988 builtin mt753x switch nodes.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
v4:
- drop phy-mode for gsw-phy
- reorder phy-mode after phy-handle
- drop interrupt parent from switch

v2:
- drop labels and led-function too (have to be in board)
---
 arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 148 ++++++++++++++++++++++
 1 file changed, 148 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
index cf765a6b1fa8..767782a207a4 100644
--- a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
@@ -742,6 +742,154 @@ ethsys: clock-controller@15000000 {
 			#reset-cells = <1>;
 		};
 
+		switch: switch@15020000 {
+			compatible = "mediatek,mt7988-switch";
+			reg = <0 0x15020000 0 0x8000>;
+			interrupt-controller;
+			#interrupt-cells = <1>;
+			interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
+			resets = <&ethwarp MT7988_ETHWARP_RST_SWITCH>;
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				gsw_port0: port@0 {
+					reg = <0>;
+					phy-handle = <&gsw_phy0>;
+					phy-mode = "internal";
+				};
+
+				gsw_port1: port@1 {
+					reg = <1>;
+					phy-handle = <&gsw_phy1>;
+					phy-mode = "internal";
+				};
+
+				gsw_port2: port@2 {
+					reg = <2>;
+					phy-handle = <&gsw_phy2>;
+					phy-mode = "internal";
+				};
+
+				gsw_port3: port@3 {
+					reg = <3>;
+					phy-handle = <&gsw_phy3>;
+					phy-mode = "internal";
+				};
+
+				port@6 {
+					reg = <6>;
+					ethernet = <&gmac0>;
+					phy-mode = "internal";
+
+					fixed-link {
+						speed = <10000>;
+						full-duplex;
+						pause;
+					};
+				};
+			};
+
+			mdio {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				mediatek,pio = <&pio>;
+
+				gsw_phy0: ethernet-phy@0 {
+					compatible = "ethernet-phy-ieee802.3-c22";
+					reg = <0>;
+					interrupts = <0>;
+					nvmem-cells = <&phy_calibration_p0>;
+					nvmem-cell-names = "phy-cal-data";
+
+					leds {
+						#address-cells = <1>;
+						#size-cells = <0>;
+
+						gsw_phy0_led0: led@0 {
+							reg = <0>;
+							status = "disabled";
+						};
+
+						gsw_phy0_led1: led@1 {
+							reg = <1>;
+							status = "disabled";
+						};
+					};
+				};
+
+				gsw_phy1: ethernet-phy@1 {
+					compatible = "ethernet-phy-ieee802.3-c22";
+					reg = <1>;
+					interrupts = <1>;
+					nvmem-cells = <&phy_calibration_p1>;
+					nvmem-cell-names = "phy-cal-data";
+
+					leds {
+						#address-cells = <1>;
+						#size-cells = <0>;
+
+						gsw_phy1_led0: led@0 {
+							reg = <0>;
+							status = "disabled";
+						};
+
+						gsw_phy1_led1: led@1 {
+							reg = <1>;
+							status = "disabled";
+						};
+					};
+				};
+
+				gsw_phy2: ethernet-phy@2 {
+					compatible = "ethernet-phy-ieee802.3-c22";
+					reg = <2>;
+					interrupts = <2>;
+					nvmem-cells = <&phy_calibration_p2>;
+					nvmem-cell-names = "phy-cal-data";
+
+					leds {
+						#address-cells = <1>;
+						#size-cells = <0>;
+
+						gsw_phy2_led0: led@0 {
+							reg = <0>;
+							status = "disabled";
+						};
+
+						gsw_phy2_led1: led@1 {
+							reg = <1>;
+							status = "disabled";
+						};
+					};
+				};
+
+				gsw_phy3: ethernet-phy@3 {
+					compatible = "ethernet-phy-ieee802.3-c22";
+					reg = <3>;
+					interrupts = <3>;
+					nvmem-cells = <&phy_calibration_p3>;
+					nvmem-cell-names = "phy-cal-data";
+
+					leds {
+						#address-cells = <1>;
+						#size-cells = <0>;
+
+						gsw_phy3_led0: led@0 {
+							reg = <0>;
+							status = "disabled";
+						};
+
+						gsw_phy3_led1: led@1 {
+							reg = <1>;
+							status = "disabled";
+						};
+					};
+				};
+			};
+		};
+
 		ethwarp: clock-controller@15031000 {
 			compatible = "mediatek,mt7988-ethwarp";
 			reg = <0 0x15031000 0 0x1000>;
-- 
2.43.0

[PATCH v7 09/14] arm64: dts: mediatek: mt7988a-bpi-r4: add proc-supply for cci

[Frank Wunderlich]

From: Frank Wunderlich <frank-w@public-files.de>

CCI requires proc-supply. Add it on board level.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi
index 81ba045e0e0e..afa9e3b2b16a 100644
--- a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi
@@ -40,6 +40,10 @@ reg_3p3v: regulator-3p3v {
 	};
 };
 
+&cci {
+	proc-supply = <&rt5190_buck3>;
+};
+
 &cpu0 {
 	proc-supply = <&rt5190_buck3>;
 };
-- 
2.43.0

[PATCH v7 10/14] arm64: dts: mediatek: mt7988a-bpi-r4: drop unused pins

[Frank Wunderlich]

From: Frank Wunderlich <frank-w@public-files.de>

Pins were moved from SoC dtsi to Board level dtsi without cleaning up
to needed ones. Drop the unused pins now.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 .../dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi | 89 -------------------
 1 file changed, 89 deletions(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi
index afa9e3b2b16a..30affedf84d4 100644
--- a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi
@@ -223,18 +223,6 @@ &pcie3 {
 };
 
 &pio {
-	mdio0_pins: mdio0-pins {
-		mux {
-			function = "eth";
-			groups = "mdc_mdio0";
-		};
-
-		conf {
-			pins = "SMI_0_MDC", "SMI_0_MDIO";
-			drive-strength = <8>;
-		};
-	};
-
 	i2c0_pins: i2c0-g0-pins {
 		mux {
 			function = "i2c";
@@ -249,20 +237,6 @@ mux {
 		};
 	};
 
-	i2c1_sfp_pins: i2c1-sfp-g0-pins {
-		mux {
-			function = "i2c";
-			groups = "i2c1_sfp";
-		};
-	};
-
-	i2c2_0_pins: i2c2-g0-pins {
-		mux {
-			function = "i2c";
-			groups = "i2c2_0";
-		};
-	};
-
 	i2c2_1_pins: i2c2-g1-pins {
 		mux {
 			function = "i2c";
@@ -298,34 +272,6 @@ mux {
 		};
 	};
 
-	gbe0_led1_pins: gbe0-led1-pins {
-		mux {
-			function = "led";
-			groups = "gbe0_led1";
-		};
-	};
-
-	gbe1_led1_pins: gbe1-led1-pins {
-		mux {
-			function = "led";
-			groups = "gbe1_led1";
-		};
-	};
-
-	gbe2_led1_pins: gbe2-led1-pins {
-		mux {
-			function = "led";
-			groups = "gbe2_led1";
-		};
-	};
-
-	gbe3_led1_pins: gbe3-led1-pins {
-		mux {
-			function = "led";
-			groups = "gbe3_led1";
-		};
-	};
-
 	i2p5gbe_led0_pins: 2p5gbe-led0-pins {
 		mux {
 			function = "led";
@@ -333,13 +279,6 @@ mux {
 		};
 	};
 
-	i2p5gbe_led1_pins: 2p5gbe-led1-pins {
-		mux {
-			function = "led";
-			groups = "2p5gbe_led1";
-		};
-	};
-
 	mmc0_pins_emmc_45: mmc0-emmc-45-pins {
 		mux {
 			function = "flash";
@@ -361,40 +300,12 @@ mux {
 		};
 	};
 
-	snfi_pins: snfi-pins {
-		mux {
-			function = "flash";
-			groups = "snfi";
-		};
-	};
-
-	spi0_pins: spi0-pins {
-		mux {
-			function = "spi";
-			groups = "spi0";
-		};
-	};
-
 	spi0_flash_pins: spi0-flash-pins {
 		mux {
 			function = "spi";
 			groups = "spi0", "spi0_wp_hold";
 		};
 	};
-
-	spi2_pins: spi2-pins {
-		mux {
-			function = "spi";
-			groups = "spi2";
-		};
-	};
-
-	spi2_flash_pins: spi2-flash-pins {
-		mux {
-			function = "spi";
-			groups = "spi2", "spi2_wp_hold";
-		};
-	};
 };
 
 &pwm {
-- 
2.43.0

[PATCH v7 11/14] arm64: dts: mediatek: mt7988a-bpi-r4: add gpio leds

[Frank Wunderlich]

From: Frank Wunderlich <frank-w@public-files.de>

Bananapi R4 has a green and a blue led which can be switched by gpio.
Green led is for running state so default on.

Green led also shares pin with eeprom writeprotect where led off allows
writing to eeprom.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 .../dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi
index 30affedf84d4..21eb91c8609f 100644
--- a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi
@@ -21,6 +21,25 @@ fan: pwm-fan {
 		status = "okay";
 	};
 
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		led_green: led-green {
+			function = LED_FUNCTION_STATUS;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&pio 79 GPIO_ACTIVE_HIGH>;
+			default-state = "on";
+		};
+
+		led_blue: led-blue {
+			function = LED_FUNCTION_WPS;
+			color = <LED_COLOR_ID_BLUE>;
+			gpios = <&pio 63 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+	};
+
+
 	reg_1p8v: regulator-1p8v {
 		compatible = "regulator-fixed";
 		regulator-name = "fixed-1.8V";
-- 
2.43.0

[PATCH v7 12/14] arm64: dts: mediatek: mt7988a-bpi-r4: add aliases for ethernet

[Frank Wunderlich]

From: Frank Wunderlich <frank-w@public-files.de>

Add aliases for gmacs to allow bootloader setting mac-adresses.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi
index 21eb91c8609f..20073eb4d1bd 100644
--- a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi
@@ -8,6 +8,12 @@
 #include "mt7988a.dtsi"
 
 / {
+	aliases {
+		ethernet0 = &gmac0;
+		ethernet1 = &gmac1;
+		ethernet2 = &gmac2;
+	};
+
 	chosen {
 		stdout-path = "serial0:115200n8";
 	};
-- 
2.43.0

[PATCH v7 13/14] arm64: dts: mediatek: mt7988a-bpi-r4: add sfp cages and link to gmac

[Frank Wunderlich]

From: Frank Wunderlich <frank-w@public-files.de>

Add SFP cages to Bananapi-R4 board. The 2.5g phy variant only contains the
wan-SFP, so add this to common dtsi and the lan-sfp only to the dual-SFP
variant.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
v4:
- update 2g5-board (reorder and drop phy-connection-type)
- order sfp properties
v3:
- enable mac with 2.5g phy on r4 phy variant because driver is now mainline
---
 .../mediatek/mt7988a-bananapi-bpi-r4-2g5.dts  | 11 +++++++++++
 .../dts/mediatek/mt7988a-bananapi-bpi-r4.dts  | 19 +++++++++++++++++++
 .../dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi | 19 +++++++++++++++++++
 3 files changed, 49 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-2g5.dts b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-2g5.dts
index 53de9c113f60..6f0c81e3fd94 100644
--- a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-2g5.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-2g5.dts
@@ -9,3 +9,14 @@ / {
 	model = "Banana Pi BPI-R4 (1x SFP+, 1x 2.5GbE)";
 	chassis-type = "embedded";
 };
+
+&gmac1 {
+	phy = <&int_2p5g_phy>;
+	phy-mode = "internal";
+	status = "okay";
+};
+
+&int_2p5g_phy {
+	pinctrl-0 = <&i2p5gbe_led0_pins>;
+	pinctrl-names = "i2p5gbe-led";
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts
index 36bd1ef2efab..4b3796ba82e3 100644
--- a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts
@@ -8,6 +8,25 @@ / {
 	compatible = "bananapi,bpi-r4", "mediatek,mt7988a";
 	model = "Banana Pi BPI-R4 (2x SFP+)";
 	chassis-type = "embedded";
+
+	/* SFP2 cage (LAN) */
+	sfp2: sfp2 {
+		compatible = "sff,sfp";
+		i2c-bus = <&i2c_sfp2>;
+		maximum-power-milliwatt = <3000>;
+
+		los-gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
+		mod-def0-gpios = <&pio 83 GPIO_ACTIVE_LOW>;
+		rate-select0-gpios = <&pio 3 GPIO_ACTIVE_LOW>;
+		tx-disable-gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
+		tx-fault-gpios = <&pio 1 GPIO_ACTIVE_HIGH>;
+	};
+};
+
+&gmac1 {
+	managed = "in-band-status";
+	phy-mode = "usxgmii";
+	sfp = <&sfp2>;
 };
 
 &pca9545 {
diff --git a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi
index 20073eb4d1bd..4d709ee527df 100644
--- a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi
@@ -63,6 +63,19 @@ reg_3p3v: regulator-3p3v {
 		regulator-boot-on;
 		regulator-always-on;
 	};
+
+	/* SFP1 cage (WAN) */
+	sfp1: sfp1 {
+		compatible = "sff,sfp";
+		i2c-bus = <&i2c_sfp1>;
+		maximum-power-milliwatt = <3000>;
+
+		los-gpios = <&pio 54 GPIO_ACTIVE_HIGH>;
+		mod-def0-gpios = <&pio 82 GPIO_ACTIVE_LOW>;
+		rate-select0-gpios = <&pio 21 GPIO_ACTIVE_LOW>;
+		tx-disable-gpios = <&pio 70 GPIO_ACTIVE_HIGH>;
+		tx-fault-gpios = <&pio 69 GPIO_ACTIVE_HIGH>;
+	};
 };
 
 &cci {
@@ -133,6 +146,12 @@ map-cpu-active-low {
 	};
 };
 
+&gmac2 {
+	managed = "in-band-status";
+	phy-mode = "usxgmii";
+	sfp = <&sfp1>;
+};
+
 &i2c0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&i2c0_pins>;
-- 
2.43.0

[PATCH v7 14/14] arm64: dts: mediatek: mt7988a-bpi-r4: configure switch phys and leds

[Frank Wunderlich]

From: Frank Wunderlich <frank-w@public-files.de>

Assign pinctrl to switch phys and leds.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
v4:
- reorder switch phy(-led) properties
v2:
- add labels and led-function and include after dropping from soc dtsi
---
 .../dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi | 61 +++++++++++++++++++
 1 file changed, 61 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi
index 4d709ee527df..7c9df606f60d 100644
--- a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi
@@ -4,6 +4,7 @@
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/regulator/richtek,rt5190a-regulator.h>
+#include <dt-bindings/leds/common.h>
 
 #include "mt7988a.dtsi"
 
@@ -152,6 +153,66 @@ &gmac2 {
 	sfp = <&sfp1>;
 };
 
+&gsw_phy0 {
+	pinctrl-0 = <&gbe0_led0_pins>;
+	pinctrl-names = "gbe-led";
+};
+
+&gsw_phy0_led0 {
+	function = LED_FUNCTION_WAN;
+	color = <LED_COLOR_ID_GREEN>;
+	status = "okay";
+};
+
+&gsw_port0 {
+	label = "wan";
+};
+
+&gsw_phy1 {
+	pinctrl-0 = <&gbe1_led0_pins>;
+	pinctrl-names = "gbe-led";
+};
+
+&gsw_phy1_led0 {
+	function = LED_FUNCTION_LAN;
+	color = <LED_COLOR_ID_GREEN>;
+	status = "okay";
+};
+
+&gsw_port1 {
+	label = "lan1";
+};
+
+&gsw_phy2 {
+	pinctrl-0 = <&gbe2_led0_pins>;
+	pinctrl-names = "gbe-led";
+};
+
+&gsw_phy2_led0 {
+	function = LED_FUNCTION_LAN;
+	color = <LED_COLOR_ID_GREEN>;
+	status = "okay";
+};
+
+&gsw_port2 {
+	label = "lan2";
+};
+
+&gsw_phy3 {
+	pinctrl-0 = <&gbe3_led0_pins>;
+	pinctrl-names = "gbe-led";
+};
+
+&gsw_phy3_led0 {
+	function = LED_FUNCTION_LAN;
+	color = <LED_COLOR_ID_GREEN>;
+	status = "okay";
+};
+
+&gsw_port3 {
+	label = "lan3";
+};
+
 &i2c0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&i2c0_pins>;
-- 
2.43.0

Re: [PATCH v7 07/14] arm64: dts: mediatek: mt7988: add basic ethernet-nodes

[Daniel Golle]

On Sat, Jun 28, 2025 at 06:54:42PM +0200, Frank Wunderlich wrote:
> From: Frank Wunderlich <frank-w@public-files.de>
> 
> Add basic ethernet related nodes.
> 
> Mac1+2 needs pcs (sgmii+usxgmii) to work correctly which will be linked
> later when driver is merged.
> 
> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
> ---
> v6:
> - fix whitespace-errors for pdma irqs (spaces vs. tabs)
> - move sram from eth reg to own sram node (needs CONFIG_SRAM)
> 
> v5:
> - add reserved irqs and change names to fe0..fe3
> - change rx-ringX to pdmaX to be closer to documentation
> 
> v4:
> - comment for fixed-link on gmac0
> - update 2g5 phy node
>   - unit-name dec instead of hex to match reg property
>   - move compatible before reg
>   - drop phy-mode
> - add interrupts for RSS
> - add interrupt-names and drop reserved irqs for ethernet
> - some reordering
> - eth-reg and clock whitespace-fix based on angelos review
> ---
>  arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 137 +++++++++++++++++++++-
>  1 file changed, 134 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
> index 560ec86dbec0..cf765a6b1fa8 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
> @@ -680,7 +680,28 @@ xphyu3port0: usb-phy@11e13000 {
>  			};
>  		};
>  
> -		clock-controller@11f40000 {
> +		xfi_tphy0: phy@11f20000 {
> +			compatible = "mediatek,mt7988-xfi-tphy";
> +			reg = <0 0x11f20000 0 0x10000>;
> +			clocks = <&xfi_pll CLK_XFIPLL_PLL_EN>,
> +				 <&topckgen CLK_TOP_XFI_PHY_0_XTAL_SEL>;
> +			clock-names = "xfipll", "topxtal";
> +			resets = <&watchdog 14>;
> +			mediatek,usxgmii-performance-errata;
> +			#phy-cells = <0>;
> +		};
> +
> +		xfi_tphy1: phy@11f30000 {
> +			compatible = "mediatek,mt7988-xfi-tphy";
> +			reg = <0 0x11f30000 0 0x10000>;
> +			clocks = <&xfi_pll CLK_XFIPLL_PLL_EN>,
> +				 <&topckgen CLK_TOP_XFI_PHY_1_XTAL_SEL>;
> +			clock-names = "xfipll", "topxtal";
> +			resets = <&watchdog 15>;
> +			#phy-cells = <0>;
> +		};
> +
> +		xfi_pll: clock-controller@11f40000 {
>  			compatible = "mediatek,mt7988-xfi-pll";
>  			reg = <0 0x11f40000 0 0x1000>;
>  			resets = <&watchdog 16>;
> @@ -714,19 +735,129 @@ phy_calibration_p3: calib@97c {
>  			};
>  		};
>  
> -		clock-controller@15000000 {
> +		ethsys: clock-controller@15000000 {
>  			compatible = "mediatek,mt7988-ethsys", "syscon";
>  			reg = <0 0x15000000 0 0x1000>;
>  			#clock-cells = <1>;
>  			#reset-cells = <1>;
>  		};
>  
> -		clock-controller@15031000 {
> +		ethwarp: clock-controller@15031000 {
>  			compatible = "mediatek,mt7988-ethwarp";
>  			reg = <0 0x15031000 0 0x1000>;
>  			#clock-cells = <1>;
>  			#reset-cells = <1>;
>  		};
> +
> +		eth: ethernet@15100000 {
> +			compatible = "mediatek,mt7988-eth";
> +			reg = <0 0x15100000 0 0x80000>;

I think this should be

reg = <0 0x15100000 0 0x40000>;

as the range from 15140000 ~ 1517ffff is used as SRAM on MT7981/MT7986 and
doesn't seem to be used at all on MT7988.

root@OpenWrt:~# devmem 0x15140000 32
0xDEADBEEF
...
root@OpenWrt:~# devmem 0x1517fffc 32
0xDEADBEEF
(with 0xDEADBEEF all that range)

Re: [PATCH v7 02/14] dt-bindings: net: mediatek,net: update for mt7988

[Krzysztof Kozlowski]

On Sat, Jun 28, 2025 at 06:54:37PM +0200, Frank Wunderlich wrote:
> From: Frank Wunderlich <frank-w@public-files.de>
> 
> Update binding for mt7988 which has 3 gmac and a sram for dma
> operations.

I asked why you are updating. You claim you update because it has 3
GMAC... but that's irrelevant, because it is easy to answer with: it did
not have 3 GMAC before?

So same question: Provide real reason why you are making updates. That's
why you have commit msg.


> 
> MT7988 has 4 FE IRQs (currently only 2 are used) and 4 IRQs for use

mt7988 or MT7988? gmac or GMAC? SRAM or SRAM? and so on... it is not
easy to read and understand your commit msgs.

> with RSS/LRO later.
> 
> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
> ---
> v6:
> - split out the interrupt-names into separate patch
> - update irq(name) min count to 4
> - add sram-property
> - drop second reg entry and minitems as there is only 1 item left again
> 
> v5:
> - fix v4 logmessage and change description a bit describing how i get
>   the irq count.
> - update binding for 8 irqs with different names (rx,tx => fe0..fe3)
>   including the 2 reserved irqs which can be used later
> - change rx-ringX to pdmaX to be closer to hardware documentation
> 
> v4:
> - increase max interrupts to 6 because of adding RSS/LRO interrupts (4)
>   and dropping 2 reserved irqs (0+3) around rx+tx
> - dropped Robs RB due to this change
> - allow interrupt names
> - add interrupt-names without reserved IRQs on mt7988
>   this requires mtk driver patch:
>   https://patchwork.kernel.org/project/netdevbpf/patch/20250616080738.117993-2-linux@fw-web.de/
> 
> v2:
> - change reg to list of items
> ---
>  Documentation/devicetree/bindings/net/mediatek,net.yaml | 9 +++++++--
>  1 file changed, 7 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/net/mediatek,net.yaml b/Documentation/devicetree/bindings/net/mediatek,net.yaml
> index 6672db206b38..74a139000f60 100644
> --- a/Documentation/devicetree/bindings/net/mediatek,net.yaml
> +++ b/Documentation/devicetree/bindings/net/mediatek,net.yaml
> @@ -28,7 +28,8 @@ properties:
>        - ralink,rt5350-eth
>  
>    reg:
> -    maxItems: 1
> +    items:
> +      - description: Register for accessing the MACs.

Why making this change? It's redundant and nothing in commit msg
explains that.

Best regards,
Krzysztof

Re: [PATCH v7 01/14] dt-bindings: net: mediatek,net: allow irq names

[Krzysztof Kozlowski]

On Sat, Jun 28, 2025 at 06:54:36PM +0200, Frank Wunderlich wrote:
> From: Frank Wunderlich <frank-w@public-files.de>
> 
> In preparation for MT7988 and RSS/LRO allow the interrupt-names

Why? What preparation, what is the purpose of adding the names, what do
they solve?

> property. Also increase the maximum IRQ count to 8 (4 FE + 4 RSS),

Why? There is no user of 8 items.

> but set boundaries for all compatibles same as irq count.

Your patch does not do it.

> 
> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
> ---
> v7: fixed wrong rebase
> v6: new patch splitted from the mt7988 changes
> ---
>  .../devicetree/bindings/net/mediatek,net.yaml | 38 ++++++++++++++++++-
>  1 file changed, 37 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/net/mediatek,net.yaml b/Documentation/devicetree/bindings/net/mediatek,net.yaml
> index 9e02fd80af83..6672db206b38 100644
> --- a/Documentation/devicetree/bindings/net/mediatek,net.yaml
> +++ b/Documentation/devicetree/bindings/net/mediatek,net.yaml
> @@ -40,7 +40,19 @@ properties:
>  
>    interrupts:
>      minItems: 1
> -    maxItems: 4
> +    maxItems: 8
> +
> +  interrupt-names:
> +    minItems: 1
> +    items:
> +      - const: fe0
> +      - const: fe1
> +      - const: fe2
> +      - const: fe3
> +      - const: pdma0
> +      - const: pdma1
> +      - const: pdma2
> +      - const: pdma3
>  
>    power-domains:
>      maxItems: 1
> @@ -135,6 +147,10 @@ allOf:
>            minItems: 3
>            maxItems: 3
>  
> +        interrupt-names:
> +          minItems: 3
> +          maxItems: 3
> +
>          clocks:
>            minItems: 4
>            maxItems: 4
> @@ -166,6 +182,9 @@ allOf:
>          interrupts:
>            maxItems: 1
>  
> +        interrupt-namess:
> +          maxItems: 1
> +
>          clocks:
>            minItems: 2
>            maxItems: 2
> @@ -192,6 +211,10 @@ allOf:
>            minItems: 3
>            maxItems: 3
>  
> +        interrupt-names:
> +          minItems: 3
> +          maxItems: 3
> +
>          clocks:
>            minItems: 11
>            maxItems: 11
> @@ -232,6 +255,10 @@ allOf:
>            minItems: 3
>            maxItems: 3
>  
> +        interrupt-names:
> +          minItems: 3
> +          maxItems: 3
> +
>          clocks:
>            minItems: 17
>            maxItems: 17
> @@ -274,6 +301,9 @@ allOf:
>          interrupts:
>            minItems: 4
>  
> +        interrupt-names:
> +          minItems: 4
> +
>          clocks:
>            minItems: 15
>            maxItems: 15
> @@ -312,6 +342,9 @@ allOf:
>          interrupts:
>            minItems: 4
>  
> +        interrupt-names:
> +          minItems: 4

8 interrupts is now valid?

> +
>          clocks:
>            minItems: 15
>            maxItems: 15
> @@ -350,6 +383,9 @@ allOf:
>          interrupts:
>            minItems: 4
>  
> +        interrupt-names:
> +          minItems: 4

So why sudenly this device gets 8 interrupts? This makes no sense,
nothing explained in the commit msg.

I understand nothing from this patch and I already asked you to clearly
explain why you are doing things. This patch on its own makes no sense.

Best regards,
Krzysztof

Re: [PATCH v7 02/14] dt-bindings: net: mediatek,net: update for mt7988

[Frank Wunderlich]

Am 1. Juli 2025 08:41:42 MESZ schrieb Krzysztof Kozlowski <krzk@kernel.org>:
>On Sat, Jun 28, 2025 at 06:54:37PM +0200, Frank Wunderlich wrote:
>> From: Frank Wunderlich <frank-w@public-files.de>
>> 
>> Update binding for mt7988 which has 3 gmac and a sram for dma
>> operations.
>
>I asked why you are updating. You claim you update because it has 3
>GMAC... but that's irrelevant, because it is easy to answer with: it did
>not have 3 GMAC before?
>
>So same question: Provide real reason why you are making updates. That's
>why you have commit msg.

MT7988 had always 3 gmac,but no dts with ethernet
node till now.
As i try to upstream the dts,i fell over this.

Imho changing the regex for the mac subnodes was
simply forgotten to be updated on initial mt7988
support patch.

I try to rephrase it like this:

Binding was not aware for 3 MAC subnodes because
previous mediatek SoC had only 2. Change this to allow
3 GMAC in mt7988 devicetree.
>
>> 
>> MT7988 has 4 FE IRQs (currently only 2 are used) and 4 IRQs for use
>
>mt7988 or MT7988? gmac or GMAC? SRAM or SRAM? and so on... it is not
>easy to read and understand your commit msgs.

Ok,i always write those names in uppercase.

>> with RSS/LRO later.
>> 
>> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
>> ---
>> v6:
>> - split out the interrupt-names into separate patch
>> - update irq(name) min count to 4
>> - add sram-property
>> - drop second reg entry and minitems as there is only 1 item left again
>> 
>> v5:
>> - fix v4 logmessage and change description a bit describing how i get
>>   the irq count.
>> - update binding for 8 irqs with different names (rx,tx => fe0..fe3)
>>   including the 2 reserved irqs which can be used later
>> - change rx-ringX to pdmaX to be closer to hardware documentation
>> 
>> v4:
>> - increase max interrupts to 6 because of adding RSS/LRO interrupts (4)
>>   and dropping 2 reserved irqs (0+3) around rx+tx
>> - dropped Robs RB due to this change
>> - allow interrupt names
>> - add interrupt-names without reserved IRQs on mt7988
>>   this requires mtk driver patch:
>>   https://patchwork.kernel.org/project/netdevbpf/patch/20250616080738.117993-2-linux@fw-web.de/
>> 
>> v2:
>> - change reg to list of items
>> ---
>>  Documentation/devicetree/bindings/net/mediatek,net.yaml | 9 +++++++--
>>  1 file changed, 7 insertions(+), 2 deletions(-)
>> 
>> diff --git a/Documentation/devicetree/bindings/net/mediatek,net.yaml b/Documentation/devicetree/bindings/net/mediatek,net.yaml
>> index 6672db206b38..74a139000f60 100644
>> --- a/Documentation/devicetree/bindings/net/mediatek,net.yaml
>> +++ b/Documentation/devicetree/bindings/net/mediatek,net.yaml
>> @@ -28,7 +28,8 @@ properties:
>>        - ralink,rt5350-eth
>>  
>>    reg:
>> -    maxItems: 1
>> +    items:
>> +      - description: Register for accessing the MACs.
>
>Why making this change? It's redundant and nothing in commit msg
>explains that.

I was instructed (where we had 2 regs in previous
Version) to name the regs...but as we have one reg
again,i can drop this change. Thought a description 
is better than a count.

>Best regards,
>Krzysztof
>


regards Frank

Re: [PATCH v7 01/14] dt-bindings: net: mediatek,net: allow irq names

[Frank Wunderlich]

Am 1. Juli 2025 08:44:02 MESZ schrieb Krzysztof Kozlowski <krzk@kernel.org>:
>On Sat, Jun 28, 2025 at 06:54:36PM +0200, Frank Wunderlich wrote:
>> From: Frank Wunderlich <frank-w@public-files.de>
>> 
>> In preparation for MT7988 and RSS/LRO allow the interrupt-names
>
>Why? What preparation, what is the purpose of adding the names, what do
>they solve?

Devicetree handled by the mtk_eth_soc driver have
a wild mix of shared and non-shared irq definitions
accessed by index (shared use index 0,
non-shared
using 1+2). Some soc have only 3 FE irqs (like mt7622).

This makes it unclear which irq is used for what
on which SoC. Adding names for irq cleans this a bit
in device tree and driver.

>> property. Also increase the maximum IRQ count to 8 (4 FE + 4 RSS),
>
>Why? There is no user of 8 items.

MT7988 *with* RSS/LRO (not yet supported by driver
yet,but i add the irqs in devicetree in this series)
use 8 irqs,but RSS is optional and 4 irqs get working
ethernet stack.

I hope this explanation makes things clearer...

>> but set boundaries for all compatibles same as irq count.
>
>Your patch does not do it.

I set Min/max-items for interrupt names below like
interrupts count defined.

>> 
>> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
>> ---
>> v7: fixed wrong rebase
>> v6: new patch splitted from the mt7988 changes
>> ---
>>  .../devicetree/bindings/net/mediatek,net.yaml | 38 ++++++++++++++++++-
>>  1 file changed, 37 insertions(+), 1 deletion(-)
>> 
>> diff --git a/Documentation/devicetree/bindings/net/mediatek,net.yaml b/Documentation/devicetree/bindings/net/mediatek,net.yaml
>> index 9e02fd80af83..6672db206b38 100644
>> --- a/Documentation/devicetree/bindings/net/mediatek,net.yaml
>> +++ b/Documentation/devicetree/bindings/net/mediatek,net.yaml
>> @@ -40,7 +40,19 @@ properties:
>>  
>>    interrupts:
>>      minItems: 1
>> -    maxItems: 4
>> +    maxItems: 8
>> +
>> +  interrupt-names:
>> +    minItems: 1
>> +    items:
>> +      - const: fe0
>> +      - const: fe1
>> +      - const: fe2
>> +      - const: fe3
>> +      - const: pdma0
>> +      - const: pdma1
>> +      - const: pdma2
>> +      - const: pdma3
>>  
>>    power-domains:
>>      maxItems: 1
>> @@ -135,6 +147,10 @@ allOf:
>>            minItems: 3
>>            maxItems: 3
>>  
>> +        interrupt-names:
>> +          minItems: 3
>> +          maxItems: 3
>> +
>>          clocks:
>>            minItems: 4
>>            maxItems: 4
>> @@ -166,6 +182,9 @@ allOf:
>>          interrupts:
>>            maxItems: 1
>>  
>> +        interrupt-namess:
>> +          maxItems: 1
>> +
>>          clocks:
>>            minItems: 2
>>            maxItems: 2
>> @@ -192,6 +211,10 @@ allOf:
>>            minItems: 3
>>            maxItems: 3
>>  
>> +        interrupt-names:
>> +          minItems: 3
>> +          maxItems: 3
>> +
>>          clocks:
>>            minItems: 11
>>            maxItems: 11
>> @@ -232,6 +255,10 @@ allOf:
>>            minItems: 3
>>            maxItems: 3
>>  
>> +        interrupt-names:
>> +          minItems: 3
>> +          maxItems: 3
>> +
>>          clocks:
>>            minItems: 17
>>            maxItems: 17
>> @@ -274,6 +301,9 @@ allOf:
>>          interrupts:
>>            minItems: 4
>>  
>> +        interrupt-names:
>> +          minItems: 4
>> +
>>          clocks:
>>            minItems: 15
>>            maxItems: 15
>> @@ -312,6 +342,9 @@ allOf:
>>          interrupts:
>>            minItems: 4
>>  
>> +        interrupt-names:
>> +          minItems: 4
>
>8 interrupts is now valid?
>
>> +
>>          clocks:
>>            minItems: 15
>>            maxItems: 15
>> @@ -350,6 +383,9 @@ allOf:
>>          interrupts:
>>            minItems: 4
>>  
>> +        interrupt-names:
>> +          minItems: 4
>
>So why sudenly this device gets 8 interrupts? This makes no sense,
>nothing explained in the commit msg.

4 FrameEngine IRQs are required to be defined (currently 2 are used in driver).
The other 4 are optional,but added in the devicetree
to not run into problems supporting old devicetree
when adding RSS/LRO to driver.

>I understand nothing from this patch and I already asked you to clearly
>explain why you are doing things. This patch on its own makes no sense.
>
>Best regards,
>Krzysztof
>


regards Frank

Re: [PATCH v7 00/14] further mt7988 devicetree work

[Frank Wunderlich]

>Frank Wunderlich (14):
...
>  dt-bindings: net: dsa: mediatek,mt7530: add dsa-port definition for
>    mt7988
>  dt-bindings: net: dsa: mediatek,mt7530: add internal mdio bus
>  dt-bindings: interconnect: add mt7988-cci compatible
>  arm64: dts: mediatek: mt7988: add cci node
...
>  arm64: dts: mediatek: mt7988a-bpi-r4: add proc-supply for cci
>  arm64: dts: mediatek: mt7988a-bpi-r4: drop unused pins
>  arm64: dts: mediatek: mt7988a-bpi-r4: add gpio leds
...

Hi Angelo,

Maybe you can take the already reviewed
patches (except exthernet + switch) so i do
not need to resend them again and again
and spam people too much because of the
ethernet binding changes?
regards Frank

Re: [PATCH v7 01/14] dt-bindings: net: mediatek,net: allow irq names

[Krzysztof Kozlowski]

On 01/07/2025 12:51, Frank Wunderlich wrote:
> Am 1. Juli 2025 08:44:02 MESZ schrieb Krzysztof Kozlowski <krzk@kernel.org>:
>> On Sat, Jun 28, 2025 at 06:54:36PM +0200, Frank Wunderlich wrote:
>>> From: Frank Wunderlich <frank-w@public-files.de>
>>>
>>> In preparation for MT7988 and RSS/LRO allow the interrupt-names
>>
>> Why? What preparation, what is the purpose of adding the names, what do
>> they solve?
> 
> Devicetree handled by the mtk_eth_soc driver have
> a wild mix of shared and non-shared irq definitions
> accessed by index (shared use index 0,
> non-shared
> using 1+2). Some soc have only 3 FE irqs (like mt7622).
> 
> This makes it unclear which irq is used for what
> on which SoC. Adding names for irq cleans this a bit
> in device tree and driver.

It's implied ABI now, even if the binding did not express that. But
interrupt-names are not necessary to express that at all. Look at other
bindings: we express the list by describing the items:
items:
  - description: foo
  - ... bar

> 
>>> property. Also increase the maximum IRQ count to 8 (4 FE + 4 RSS),
>>
>> Why? There is no user of 8 items.
> 
> MT7988 *with* RSS/LRO (not yet supported by driver
> yet,but i add the irqs in devicetree in this series)
> use 8 irqs,but RSS is optional and 4 irqs get working
> ethernet stack.

That's separate change than fixing ABI and that user MUST BE HERE. You
cannot add some future interrupts for some future device. Adding new
device is the only reason to add more interrupts.

> 
> I hope this explanation makes things clearer...


Commit msg must explain all this, not me asking.

> 
>>> but set boundaries for all compatibles same as irq count.
>>
>> Your patch does not do it.
> 
> I set Min/max-items for interrupt names below like
> interrupts count defined.

No, you don't. It's all fluid and flexible - limited constraints.

> 
>>>
>>> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
>>> ---
>>> v7: fixed wrong rebase
>>> v6: new patch splitted from the mt7988 changes
>>> ---
>>>  .../devicetree/bindings/net/mediatek,net.yaml | 38 ++++++++++++++++++-
>>>  1 file changed, 37 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/net/mediatek,net.yaml b/Documentation/devicetree/bindings/net/mediatek,net.yaml
>>> index 9e02fd80af83..6672db206b38 100644
>>> --- a/Documentation/devicetree/bindings/net/mediatek,net.yaml
>>> +++ b/Documentation/devicetree/bindings/net/mediatek,net.yaml
>>> @@ -40,7 +40,19 @@ properties:
>>>  
>>>    interrupts:
>>>      minItems: 1
>>> -    maxItems: 4
>>> +    maxItems: 8
>>> +
>>> +  interrupt-names:
>>> +    minItems: 1
>>> +    items:
>>> +      - const: fe0
>>> +      - const: fe1
>>> +      - const: fe2
>>> +      - const: fe3
>>> +      - const: pdma0
>>> +      - const: pdma1
>>> +      - const: pdma2
>>> +      - const: pdma3
>>>  
>>>    power-domains:
>>>      maxItems: 1
>>> @@ -135,6 +147,10 @@ allOf:
>>>            minItems: 3
>>>            maxItems: 3
>>>  
>>> +        interrupt-names:
>>> +          minItems: 3
>>> +          maxItems: 3
>>> +
>>>          clocks:
>>>            minItems: 4
>>>            maxItems: 4
>>> @@ -166,6 +182,9 @@ allOf:
>>>          interrupts:
>>>            maxItems: 1
>>>  
>>> +        interrupt-namess:
>>> +          maxItems: 1
>>> +
>>>          clocks:
>>>            minItems: 2
>>>            maxItems: 2
>>> @@ -192,6 +211,10 @@ allOf:
>>>            minItems: 3
>>>            maxItems: 3
>>>  
>>> +        interrupt-names:
>>> +          minItems: 3
>>> +          maxItems: 3
>>> +
>>>          clocks:
>>>            minItems: 11
>>>            maxItems: 11
>>> @@ -232,6 +255,10 @@ allOf:
>>>            minItems: 3
>>>            maxItems: 3
>>>  
>>> +        interrupt-names:
>>> +          minItems: 3
>>> +          maxItems: 3
>>> +
>>>          clocks:
>>>            minItems: 17
>>>            maxItems: 17
>>> @@ -274,6 +301,9 @@ allOf:
>>>          interrupts:
>>>            minItems: 4
>>>  
>>> +        interrupt-names:
>>> +          minItems: 4
>>> +
>>>          clocks:
>>>            minItems: 15
>>>            maxItems: 15
>>> @@ -312,6 +342,9 @@ allOf:
>>>          interrupts:
>>>            minItems: 4
>>>  
>>> +        interrupt-names:
>>> +          minItems: 4
>>
>> 8 interrupts is now valid?
>>
>>> +
>>>          clocks:
>>>            minItems: 15
>>>            maxItems: 15
>>> @@ -350,6 +383,9 @@ allOf:
>>>          interrupts:
>>>            minItems: 4
>>>  
>>> +        interrupt-names:
>>> +          minItems: 4
>>
>> So why sudenly this device gets 8 interrupts? This makes no sense,
>> nothing explained in the commit msg.
> 
> 4 FrameEngine IRQs are required to be defined (currently 2 are used in driver).
> The other 4 are optional,but added in the devicetree

There were only 4 before and you do not explain why all devices get 8.
You mentioned that MT7988 has 8 but now make 8 for all other variants!

Why you are not answering this question?

> to not run into problems supporting old devicetree
> when adding RSS/LRO to driver.

This is not about driver, it does not matter for the driver. Binding and
DTS are supposed to be complete.

> 
>> I understand nothing from this patch and I already asked you to clearly
>> explain why you are doing things. This patch on its own makes no sense.
>>
>> Best regards,
>> Krzysztof
>>
> 
> 
> regards Frank


Best regards,
Krzysztof

Re: [PATCH v7 02/14] dt-bindings: net: mediatek,net: update for mt7988

[Krzysztof Kozlowski]

On 01/07/2025 12:33, Frank Wunderlich wrote:
> Am 1. Juli 2025 08:41:42 MESZ schrieb Krzysztof Kozlowski <krzk@kernel.org>:
>> On Sat, Jun 28, 2025 at 06:54:37PM +0200, Frank Wunderlich wrote:
>>> From: Frank Wunderlich <frank-w@public-files.de>
>>>
>>> Update binding for mt7988 which has 3 gmac and a sram for dma
>>> operations.
>>
>> I asked why you are updating. You claim you update because it has 3
>> GMAC... but that's irrelevant, because it is easy to answer with: it did
>> not have 3 GMAC before?
>>
>> So same question: Provide real reason why you are making updates. That's
>> why you have commit msg.
> 
> MT7988 had always 3 gmac,but no dts with ethernet
> node till now.
> As i try to upstream the dts,i fell over this.

What does it mean? Are you adding new device or not? Nothing explains
that something was missing.

> 
> Imho changing the regex for the mac subnodes was
> simply forgotten to be updated on initial mt7988
> support patch.

Fix
your
wrapping because
it is
difficult
to follow
such
style.

> 
> I try to rephrase it like this:
> 
> Binding was not aware for 3 MAC subnodes because
> previous mediatek SoC had only 2. Change this to allow
> 3 GMAC in mt7988 devicetree.

So a fix for existing? Than add Fixes tag, describe the issue and fix
ONLY that issue.

Best regards,
Krzysztof

Aw: Re: [PATCH v7 02/14] dt-bindings: net: mediatek,net: update for mt7988

[frank-w]

> Gesendet: Mittwoch, 2. Juli 2025 um 08:29
> Von: "Krzysztof Kozlowski" <krzk@kernel.org>
> Betreff: Re: [PATCH v7 02/14] dt-bindings: net: mediatek,net: update for mt7988
>
> On 01/07/2025 12:33, Frank Wunderlich wrote:
> > Am 1. Juli 2025 08:41:42 MESZ schrieb Krzysztof Kozlowski <krzk@kernel.org>:
> >> On Sat, Jun 28, 2025 at 06:54:37PM +0200, Frank Wunderlich wrote:
> >>> From: Frank Wunderlich <frank-w@public-files.de>
> >>>
> >>> Update binding for mt7988 which has 3 gmac and a sram for dma
> >>> operations.
> >>
> >> I asked why you are updating. You claim you update because it has 3
> >> GMAC... but that's irrelevant, because it is easy to answer with: it did
> >> not have 3 GMAC before?
> >>
> >> So same question: Provide real reason why you are making updates. That's
> >> why you have commit msg.
> > 
> > MT7988 had always 3 gmac,but no dts with ethernet
> > node till now.
> > As i try to upstream the dts,i fell over this.
> 
> What does it mean? Are you adding new device or not? Nothing explains
> that something was missing.

The binding already exists, but was incomplete. It was added while changing ethernet driver but was not used
because i'm the first person adding mt7988 Ethernet node to devicetree in this series.

> > 
> > Imho changing the regex for the mac subnodes was
> > simply forgotten to be updated on initial mt7988
> > support patch.
> 
> Fix
> your
> wrapping because
> it is
> difficult
> to follow
> such
> style.

i understand that it is not the best, but i have to manually wrap lines because neither my webmail nor
my Android Mail-App (K9Mail) supports automatic wrapping (created a feature-request some years ago which
got rejected). I try to wrap it as good as possible, but still manually (on phone it is not that easy).

> > 
> > I try to rephrase it like this:
> > 
> > Binding was not aware for 3 MAC subnodes because
> > previous mediatek SoC had only 2. Change this to allow
> > 3 GMAC in mt7988 devicetree.
> 
> So a fix for existing? Than add Fixes tag, describe the issue and fix
> ONLY that issue.

Yes, binding for mt7988 already exists withing the mediatek,net binding, but the pattern for mac subnodes
was not updated while adding. So i had to do it before adding the ethernet node to dts in same series.

But yes, i can separate this change again and add Fixes Tag. So just the sram-Property is added in this patch
and i repharse it like this.

> Best regards,
> Krzysztof

regards Frank

Re: [PATCH v7 01/14] dt-bindings: net: mediatek,net: allow irq names

[Frank Wunderlich (linux)]

Am 2025-07-02 08:27, schrieb Krzysztof Kozlowski:
> On 01/07/2025 12:51, Frank Wunderlich wrote:
>> Am 1. Juli 2025 08:44:02 MESZ schrieb Krzysztof Kozlowski 
>> <krzk@kernel.org>:
>>> On Sat, Jun 28, 2025 at 06:54:36PM +0200, Frank Wunderlich wrote:
>>>> From: Frank Wunderlich <frank-w@public-files.de>
>>>> 
>>>> In preparation for MT7988 and RSS/LRO allow the interrupt-names
>>> 
>>> Why? What preparation, what is the purpose of adding the names, what 
>>> do
>>> they solve?
>> 
>> Devicetree handled by the mtk_eth_soc driver have
>> a wild mix of shared and non-shared irq definitions
>> accessed by index (shared use index 0,
>> non-shared
>> using 1+2). Some soc have only 3 FE irqs (like mt7622).
>> 
>> This makes it unclear which irq is used for what
>> on which SoC. Adding names for irq cleans this a bit
>> in device tree and driver.
> 
> It's implied ABI now, even if the binding did not express that. But
> interrupt-names are not necessary to express that at all. Look at other
> bindings: we express the list by describing the items:
> items:
>   - description: foo
>   - ... bar

ok, so i need to define descriptions for all interrupts instead of only 
increasing the count. Ok, was not clear to me.

so something like this:

item0: on SoCs with shared IRQ (mt762[18]) used for RX+TX, on other free 
to be used
item1: on non-shared SoCs used for TX
item2: on non-shared SoCs used for RX (except RSS/LRO is used)
item3: reserved / currently unused
item4-7: IRQs for RSS/LRO

>> 
>>>> property. Also increase the maximum IRQ count to 8 (4 FE + 4 RSS),
>>> 
>>> Why? There is no user of 8 items.
>> 
>> MT7988 *with* RSS/LRO (not yet supported by driver
>> yet,but i add the irqs in devicetree in this series)
>> use 8 irqs,but RSS is optional and 4 irqs get working
>> ethernet stack.
> 
> That's separate change than fixing ABI and that user MUST BE HERE. You
> cannot add some future interrupts for some future device. Adding new
> device is the only reason to add more interrupts.

MT7988 is basicly new because there is no devicetree there yet...only 
driver and
this (incomplete) binding.

>> 
>> I hope this explanation makes things clearer...
> 
> 
> Commit msg must explain all this, not me asking.
> 
>> 
>>>> but set boundaries for all compatibles same as irq count.
>>> 
>>> Your patch does not do it.
>> 
>> I set Min/max-items for interrupt names below like
>> interrupts count defined.
> 
> No, you don't. It's all fluid and flexible - limited constraints.

i thought i can limit is by setting the MaxItems in the soc-spcific 
blocks below.
What reason does MaxItems have there if not this? of course if there is 
any Soc not
having a specific block it is open.But this is also the case for 
interrupts property
handles the same way before.

I only left it open on mt7988 (only set minitems because all 8 can be 
used, but 4 are required).

>> 
>>>> 
>>>> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
>>>> ---
>>>> v7: fixed wrong rebase
>>>> v6: new patch splitted from the mt7988 changes
>>>> ---
>>>>  .../devicetree/bindings/net/mediatek,net.yaml | 38 
>>>> ++++++++++++++++++-
>>>>  1 file changed, 37 insertions(+), 1 deletion(-)
>>>> 
>>>> diff --git a/Documentation/devicetree/bindings/net/mediatek,net.yaml 
>>>> b/Documentation/devicetree/bindings/net/mediatek,net.yaml
>>>> index 9e02fd80af83..6672db206b38 100644
>>>> --- a/Documentation/devicetree/bindings/net/mediatek,net.yaml
>>>> +++ b/Documentation/devicetree/bindings/net/mediatek,net.yaml
>>>> @@ -40,7 +40,19 @@ properties:
>>>> 
>>>>    interrupts:
>>>>      minItems: 1
>>>> -    maxItems: 4
>>>> +    maxItems: 8
>>>> +
>>>> +  interrupt-names:
>>>> +    minItems: 1
>>>> +    items:
>>>> +      - const: fe0
>>>> +      - const: fe1
>>>> +      - const: fe2
>>>> +      - const: fe3
>>>> +      - const: pdma0
>>>> +      - const: pdma1
>>>> +      - const: pdma2
>>>> +      - const: pdma3
>>>> 
>>>>    power-domains:
>>>>      maxItems: 1
>>>> @@ -135,6 +147,10 @@ allOf:
>>>>            minItems: 3
>>>>            maxItems: 3
>>>> 
>>>> +        interrupt-names:
>>>> +          minItems: 3
>>>> +          maxItems: 3

limited here to the same as interrupts.

>>>>          clocks:
>>>>            minItems: 4
>>>>            maxItems: 4
>>>> @@ -166,6 +182,9 @@ allOf:
>>>>          interrupts:
>>>>            maxItems: 1
>>>> 
>>>> +        interrupt-namess:
>>>> +          maxItems: 1
dito

>>>>          clocks:
>>>>            minItems: 2
>>>>            maxItems: 2
>>>> @@ -192,6 +211,10 @@ allOf:
>>>>            minItems: 3
>>>>            maxItems: 3
>>>> 
>>>> +        interrupt-names:
>>>> +          minItems: 3
>>>> +          maxItems: 3
dito and so on

>>>>          clocks:
>>>>            minItems: 11
>>>>            maxItems: 11
>>>> @@ -232,6 +255,10 @@ allOf:
>>>>            minItems: 3
>>>>            maxItems: 3
>>>> 
>>>> +        interrupt-names:
>>>> +          minItems: 3
>>>> +          maxItems: 3
>>>> +
>>>>          clocks:
>>>>            minItems: 17
>>>>            maxItems: 17
>>>> @@ -274,6 +301,9 @@ allOf:
>>>>          interrupts:
>>>>            minItems: 4
>>>> 
>>>> +        interrupt-names:
>>>> +          minItems: 4
>>>> +
>>>>          clocks:
>>>>            minItems: 15
>>>>            maxItems: 15
>>>> @@ -312,6 +342,9 @@ allOf:
>>>>          interrupts:
>>>>            minItems: 4
>>>> 
>>>> +        interrupt-names:
>>>> +          minItems: 4
>>> 
>>> 8 interrupts is now valid?
>>> 
>>>> +
>>>>          clocks:
>>>>            minItems: 15
>>>>            maxItems: 15
>>>> @@ -350,6 +383,9 @@ allOf:
>>>>          interrupts:
>>>>            minItems: 4
>>>> 
>>>> +        interrupt-names:
>>>> +          minItems: 4
>>> 
>>> So why sudenly this device gets 8 interrupts? This makes no sense,
>>> nothing explained in the commit msg.
>> 
>> 4 FrameEngine IRQs are required to be defined (currently 2 are used in 
>> driver).
>> The other 4 are optional,but added in the devicetree
> 
> There were only 4 before and you do not explain why all devices get 8.
> You mentioned that MT7988 has 8 but now make 8 for all other variants!
> 
> Why you are not answering this question?

The original binding excluded the 4 RSS/LRO IRQs as this is an optional 
feature not
yet available in driver. It is needed to get the full speed on the 10G 
interfaces.
MT7988 is the first SoC which has 10G MACs. Older Socs like mt7986 and 
mt7981 can also
support RSS/LRO to reduce cpu load. But here we will run into the "new 
kernel - old
devicetree" issue, if we try to upstream this. Maybe we do not add this 
because these
only have 2.5G MACs.

>> to not run into problems supporting old devicetree
>> when adding RSS/LRO to driver.
> 
> This is not about driver, it does not matter for the driver. Binding 
> and
> DTS are supposed to be complete.

if i upstream the ethernet-node now with only 4 IRQS, we have to extend 
them later and
have to deal with only 4 IRQs in driver to be compatible with older DTS. 
So newer
kernel with RSS/LRO support cannot work with older DT.
To avoid this i add all related IRQs now (from DT perspective a new 
device - there is
no mt7988 device with ethernet node in devicetree yet).

>> 
>>> I understand nothing from this patch and I already asked you to 
>>> clearly
>>> explain why you are doing things. This patch on its own makes no 
>>> sense.

i tried to explain :(
i have a working dts for mt7988 and try to upstream it in this series 
and thats the
cause i have to update the binding. Imho i cannot increase the 
interrupt-count in SoC
specific block (e.g. setting count globally to 4 but to 8 for only 
mt7988).

I added interrupt-names to get it cleaner in driver (access via name 
instead of
index). And also in Devicetree we see the meaning of IRQs without 
looking through
driver. I see really no reason for not adding the interrupt names.

>>> Best regards,
>>> Krzysztof

regards Frank

Re: [PATCH v7 01/14] dt-bindings: net: mediatek,net: allow irq names

[Daniel Golle]

On Thu, Jul 03, 2025 at 01:01:40PM +0200, Frank Wunderlich (linux) wrote:
> Am 2025-07-02 08:27, schrieb Krzysztof Kozlowski:
> > On 01/07/2025 12:51, Frank Wunderlich wrote:
> > > Am 1. Juli 2025 08:44:02 MESZ schrieb Krzysztof Kozlowski
> > > <krzk@kernel.org>:
> > > > On Sat, Jun 28, 2025 at 06:54:36PM +0200, Frank Wunderlich wrote:
> > > > > From: Frank Wunderlich <frank-w@public-files.de>
> > > > > 
> > > > > In preparation for MT7988 and RSS/LRO allow the interrupt-names
> > > > 
> > > > Why? What preparation, what is the purpose of adding the names,
> > > > what do
> > > > they solve?
> > > 
> > > Devicetree handled by the mtk_eth_soc driver have
> > > a wild mix of shared and non-shared irq definitions
> > > accessed by index (shared use index 0,
> > > non-shared
> > > using 1+2). Some soc have only 3 FE irqs (like mt7622).
> > > 
> > > This makes it unclear which irq is used for what
> > > on which SoC. Adding names for irq cleans this a bit
> > > in device tree and driver.
> > 
> > It's implied ABI now, even if the binding did not express that. But
> > interrupt-names are not necessary to express that at all. Look at other
> > bindings: we express the list by describing the items:
> > items:
> >   - description: foo
> >   - ... bar
> 
> ok, so i need to define descriptions for all interrupts instead of only
> increasing the count. Ok, was not clear to me.
> 
> so something like this:
> 
> item0: on SoCs with shared IRQ (mt762[18]) used for RX+TX, on other free to
> be used
> item1: on non-shared SoCs used for TX
> item2: on non-shared SoCs used for RX (except RSS/LRO is used)
> item3: reserved / currently unused
> item4-7: IRQs for RSS/LRO

These descriptions match the current *software* use of those interrupts,
however, DT should describe the hardware and esp. item0 up to item3 could
be used in different ways in the future (by programming MTK_FE_INT_GRP
register differently).

I think using interrupt-names fe0...fe3 and pdma0...pdma3 is still the
best option, so the driver can request the interrupts by name which is
much more readable in the driver code and SoC's dtsi than relying on a
specific order.

> > 
> > There were only 4 before and you do not explain why all devices get 8.
> > You mentioned that MT7988 has 8 but now make 8 for all other variants!
> > 
> > Why you are not answering this question?
> 
> The original binding excluded the 4 RSS/LRO IRQs as this is an optional
> feature not
> yet available in driver. It is needed to get the full speed on the 10G
> interfaces.
> MT7988 is the first SoC which has 10G MACs. Older Socs like mt7986 and
> mt7981 can also
> support RSS/LRO to reduce cpu load. But here we will run into the "new
> kernel - old
> devicetree" issue, if we try to upstream this. Maybe we do not add this
> because these
> only have 2.5G MACs.

It might be important to note that

MT7621, MT7628: 1 IRQ
MT7622, MT7623: 3 IRQs (only two used by the driver for now)
MT7981, MT7986: 4 IRQs (only two used by the driver for now)

While older SoCs MT7981 and MT7986 have limited support for *either LRO
or RSS* in hardware, only MT7988 got 4 frame-engine IRQs like MT7981 and
MT7986 and an additional 4 IRQs for the 4 RX DMA rings on top of that,
so a total of 8, and can do both RSS and LRO.