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[213.161.5.97]) by smtp.gmail.com with ESMTPSA id k4sm1345393edq.73.2020.11.05.09.25.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Nov 2020 09:25:45 -0800 (PST) From: Jernej =?utf-8?B?xaBrcmFiZWM=?= To: Andrew Lunn , netdev@vger.kernel.org Cc: Ard Biesheuvel , Daniel Thompson , Sumit Garg , Alex =?ISO-8859-1?Q?Benn=E9e?= , Masami Hiramatsu , Steve McIntyre , "open list:BPF JIT for MIPS (32-BIT AND 64-BIT)" , Willy Liu , "David S. Miller" , Jakub Kicinski , Sasha Levin , Florian Fainelli , Heiner Kallweit , Masahisa Kojima , Ilias Apalodimas Subject: Re: Re: realtek PHY commit bbc4d71d63549 causes regression Date: Thu, 05 Nov 2020 18:31:28 +0100 Message-ID: <2697795.ZkNf1YqPoC@kista> In-Reply-To: <20201029144644.GA70799@apalos.home> References: <20201017230226.GV456889@lunn.ch> <20201029143934.GO878328@lunn.ch> <20201029144644.GA70799@apalos.home> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Hi! Dne =C4=8Detrtek, 29. oktober 2020 ob 15:46:44 CET je Ilias Apalodimas napi= sal(a): > On Thu, Oct 29, 2020 at 03:39:34PM +0100, Andrew Lunn wrote: > > > What about reverting the realtek PHY commit from stable? > > > As Ard said it doesn't really fix anything (usage wise) and causes a= =20 bunch of > > > problems. > > >=20 > > > If I understand correctly we have 3 options: > > > 1. 'Hack' the drivers in stable to fix it (and most of those hacks w= ill=20 take=20 > > > a long time to remove) > > > 2. Update DTE of all affected devices, backport it to stable and forc= e=20 users to > > > update > > > 3. Revert the PHY commit > > >=20 > > > imho [3] is the least painful solution. > >=20 > > The PHY commit is correct, in that it fixes a bug. So i don't want to > > remove it. >=20 > Yea I meant revert the commit from were ever it was backported, not on=20 current=20 > upstream. I agree it's correct from a coding point of view, but it never= =20 > actually fixes anything functionality wise of the affected platforms.=20 Sadly, there is one board - Pine64 Plus - where HW settings are wrong and i= t=20 actually needs SW override. Until this Realtek PHY driver fix was merged, i= t=20 was unclear what magic value provided by Realtek to board manufacturer does. Reference: https://lore.kernel.org/netdev/20191001082912.12905-3-icenowy@aosc.io/ Best regards, Jernej > On the contrary, it breaks platforms without warning. >=20 > >=20 > > Backporting it to stable is what is causing most of the issues today, > > combined with a number of broken DT descriptions. So i would be happy > > for stable to get a patch which looks at the strapping, sees ID is > > enabled via strapping, warns the DT blob is FUBAR, and then ignores > > the requested PHY-mode. That gives developers time to fix their broken > > DT. >=20 > (Ard replied on this while I was typing) >=20 > >=20 > > Andrew >=20 > Cheers > /Ilias >=20 >=20