From: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
To: Simon Horman <horms@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Yannick Fertre <yannick.fertre@foss.st.com>,
Philippe Cornu <philippe.cornu@foss.st.com>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
Richard Cochran <richardcochran@gmail.com>,
<devicetree@vger.kernel.org>,
<linux-stm32@st-md-mailman.stormreply.com>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <dri-devel@lists.freedesktop.org>,
<netdev@vger.kernel.org>
Subject: Re: [PATCH v2 3/4] drm/stm: dsi: expose DSI PHY internal clock
Date: Thu, 4 Jan 2024 14:51:08 +0100 [thread overview]
Message-ID: <29b3092f-4d4d-4b6d-9667-aa04eddd2956@foss.st.com> (raw)
In-Reply-To: <20231208165855.GA8459@kernel.org>
On 12/8/23 17:58, Simon Horman wrote:
> On Mon, Dec 04, 2023 at 11:11:12AM +0100, Raphael Gallais-Pou wrote:
>
> ...
>
>> @@ -514,18 +675,40 @@ static int dw_mipi_dsi_stm_probe(struct platform_device *pdev)
>> dsi->lane_max_kbps *= 2;
>> }
>>
>> - dw_mipi_dsi_stm_plat_data.base = dsi->base;
>> - dw_mipi_dsi_stm_plat_data.priv_data = dsi;
>> + dsi->pdata = *pdata;
>> + dsi->pdata.base = dsi->base;
>> + dsi->pdata.priv_data = dsi;
>> +
>> + dsi->pdata.max_data_lanes = 2;
>> + dsi->pdata.phy_ops = &dw_mipi_dsi_stm_phy_ops;
>>
>> platform_set_drvdata(pdev, dsi);
>>
>> - dsi->dsi = dw_mipi_dsi_probe(pdev, &dw_mipi_dsi_stm_plat_data);
>> + dsi->dsi = dw_mipi_dsi_probe(pdev, &dsi->pdata);
>> if (IS_ERR(dsi->dsi)) {
>> ret = PTR_ERR(dsi->dsi);
>> dev_err_probe(dev, ret, "Failed to initialize mipi dsi host\n");
>> goto err_dsi_probe;
>> }
>>
>> + /*
>> + * We need to wait for the generic bridge to probe before enabling and
>> + * register the internal pixel clock.
>> + */
>> + ret = clk_prepare_enable(dsi->pclk);
>> + if (ret) {
>> + DRM_ERROR("%s: Failed to enable peripheral clk\n", __func__);
>> + goto err_dsi_probe;
>> + }
>> +
>> + ret = dw_mipi_dsi_clk_register(dsi, dev);
>> + if (ret) {
>> + DRM_ERROR("Failed to register DSI pixel clock: %d\n", ret);
> Hi Raphael,
Hi Simon,
You are right, dsi->clk needs to be disabled in case the clock register fails
before exiting the probe.
I've sent a v3, which normally fixes it.
Regards,
Raphaël
>
> Does clk_disable_unprepare(dsi->pclk) need to be added to this unwind
> chain?
>
> Flagged by Smatch.
>
>> + goto err_dsi_probe;
>> + }
>> +
>> + clk_disable_unprepare(dsi->pclk);
>> +
>> return 0;
>>
>> err_dsi_probe:
> ...
next prev parent reply other threads:[~2024-01-04 13:51 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-04 10:11 [PATCH v2 0/4] Update STM DSI PHY driver Raphael Gallais-Pou
2023-12-04 10:11 ` [PATCH v2 1/4] drm/stm: dsi: use new SYSTEM_SLEEP_PM_OPS() macro Raphael Gallais-Pou
2023-12-04 10:11 ` [PATCH v2 2/4] drm/stm: dsi: add pm runtime ops Raphael Gallais-Pou
2023-12-04 10:11 ` [PATCH v2 3/4] drm/stm: dsi: expose DSI PHY internal clock Raphael Gallais-Pou
2023-12-08 16:58 ` Simon Horman
2024-01-04 13:51 ` Raphael Gallais-Pou [this message]
2023-12-04 10:11 ` [PATCH v2 4/4] arm: dts: st: fix DSI peripheral clock on stm32mp15 boards Raphael Gallais-Pou
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