From: 李志 <lizhi2@eswincomputing.com>
To: "Bo Gan" <ganboing@gmail.com>
Cc: "Andrew Lunn" <andrew@lunn.ch>,
devicetree@vger.kernel.org, andrew+netdev@lunn.ch,
davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
netdev@vger.kernel.org, pabeni@redhat.com,
mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com,
rmk+kernel@armlinux.org.uk,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, ningyu@eswincomputing.com,
linmin@eswincomputing.com, pinkesh.vaghela@einfochips.com,
weishangjuan@eswincomputing.com
Subject: Re: Re: [PATCH v1 1/2] dt-bindings: ethernet: eswin: add clock sampling control
Date: Fri, 23 Jan 2026 17:52:28 +0800 (GMT+08:00) [thread overview]
Message-ID: <29b8c4d2.3704.19bea44fe53.Coremail.lizhi2@eswincomputing.com> (raw)
In-Reply-To: <abf12a3f-9cdd-472d-a02e-af4da594b84f@gmail.com>
> -----原始邮件-----
> 发件人: "Bo Gan" <ganboing@gmail.com>
> 发送时间:2026-01-23 15:39:29 (星期五)
> 收件人: "Andrew Lunn" <andrew@lunn.ch>, 李志 <lizhi2@eswincomputing.com>
> 抄送: devicetree@vger.kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, netdev@vger.kernel.org, pabeni@redhat.com, mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com, rmk+kernel@armlinux.org.uk, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, ningyu@eswincomputing.com, linmin@eswincomputing.com, pinkesh.vaghela@einfochips.com, weishangjuan@eswincomputing.com
> 主题: Re: [PATCH v1 1/2] dt-bindings: ethernet: eswin: add clock sampling control
>
> Hi Andrew,
>
> On 1/22/26 19:19, Andrew Lunn wrote:
> >>> You say internal. So the skew is fixed, it is a property of the
> >>> silicon? If so, why a DT property? Why not just hard code it in the
> >>> driver? Since it is internal, different boards should not need it set
> >>> differently?
> >>>
> >> Thanks for the question.
> >>
> >> EIC7700 has two Ethernet MACs. Only eth1 has this internal RXC/RXD skew,
> >> eth0 does not.
> >>
> >> So this is not a chip-wide constant that can be hardcoded in the driver.
> >> We need a way to distinguish the two MAC instances, which is why this is
> >> described per-port in DTS.
> >
> > I assume the address of the interface is fixed. So you can just key
> > off that to distinguish the two instances.
> >
> > Since this is an internal property, not a board property, it is not
> > clear it actually belongs on DT.
> >
> > Andrew
>
> IMO, they should be in DT to provide maximum flexibility. The SoC .dtsi
> can provide some sane defaults, and the board vendor can later override
> them if the mac/phy requires further tuning. Applying such tuning by
> the address of MAC seems messy and it hides the parameters used behind
> driver. Through DT, everything becomes really clear.
>
> I assume this is not uncommon: E.g., starfive/jh7110:
> https://lore.kernel.org/all/20230714104521.18751-3-samin.guo@starfivetech.com/
>
> BTW, no need to worry about backward compat. ESWIN hasn't checked-in any
> DT for eth yet. As you and Russell said, they need to do it, pronto.
>
Yes, this can be hardcoded for eth1, similar to what is done in
dwmac-loongson1.c.
However, considering EIC7702, which integrates two EIC7700 dies and thus
has four MACs in total, we believe describing this via DTS is more
appropriate. We are currently working on upstreaming the DTS support for
EIC7702.
With the DT approach, the internal RXC/RXD skew can be described explicitly
for gmac1 and gmac3, without requiring changes to dwmac-eic7700.c when
bringing up EIC7702.
As Bo Gan also mentioned, there are vendors handling similar internal
quirks through DT configuration.
--
Li Zhi
next prev parent reply other threads:[~2026-01-23 9:52 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-09 8:06 [PATCH v1 0/2] net: stmmac: eic7700: fix EIC7700 eth1 RX sampling timing lizhi2
2026-01-09 8:08 ` [PATCH v1 1/2] dt-bindings: ethernet: eswin: add clock sampling control lizhi2
2026-01-09 18:27 ` Andrew Lunn
2026-01-10 18:26 ` Russell King (Oracle)
2026-01-11 4:05 ` Bo Gan
2026-01-12 7:05 ` 李志
2026-01-22 13:27 ` Andrew Lunn
2026-01-22 16:03 ` Russell King (Oracle)
2026-01-27 7:05 ` Min Lin
2026-01-27 13:40 ` Andrew Lunn
2026-01-12 6:00 ` 李志
2026-01-22 13:32 ` Andrew Lunn
2026-01-23 3:00 ` 李志
2026-01-23 3:19 ` Andrew Lunn
2026-01-23 7:39 ` Bo Gan
2026-01-23 9:52 ` 李志 [this message]
2026-01-23 10:07 ` Krzysztof Kozlowski
2026-01-23 10:47 ` Bo Gan
2026-01-23 19:43 ` Andrew Lunn
2026-01-24 4:57 ` Bo Gan
2026-01-26 3:10 ` Min Lin
2026-01-26 18:29 ` Russell King (Oracle)
2026-01-27 6:14 ` Min Lin
2026-01-28 2:38 ` Bo Gan
2026-01-28 5:48 ` Min Lin
2026-02-03 6:06 ` Min Lin
2026-02-03 13:16 ` Andrew Lunn
2026-01-28 10:05 ` Krzysztof Kozlowski
2026-01-29 2:01 ` Bo Gan
2026-01-09 8:09 ` [PATCH v1 2/2] net: stmmac: eic7700: enable clocks before syscon access and correct RX sampling timing lizhi2
2026-01-09 18:31 ` Andrew Lunn
2026-01-12 6:55 ` 李志
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