Re: [PATCH iwl-net 02/12] ice: E822: keep Tx timestamps disabled during offset calibration

[Jacob Keller <jacob.e.keller@intel.com>]

On 8/21/2026 5:13 PM, Jacob Keller wrote:
> From: Karol Kolacinski <karol.kolacinski@intel.com>
> 
> Do not clear the tx.calibrating flag immediately after starting the PHY
> timer in ice_ptp_port_phy_restart(). Instead, keep Tx timestamps
> disabled until the offset verification work (ice_ptp_wait_for_offsets)
> has confirmed that both Tx and Rx PHY offsets are properly configured.
> 
> Previously, tx.calibrating was set to true, then immediately back to
> false right after ice_start_phy_timer_e82x() returned. This allowed Tx
> timestamp requests to be served during the window where offset
> verification was still pending. Timestamps produced during this window
> use uncalibrated PHY offsets and can produce incorrect values.
> 
> When ptp4l receives incorrect timestamps, it may reject them and wait
> for the next sync interval (typically 1-2 seconds), compounding delays
> during link cycling. This contributes to the time transmitter port
> becoming unresponsive after repeated link down/up cycles.
> 
> Move the tx.calibrating = false to ice_ptp_wait_for_offsets(), after
> both Tx and Rx offset configuration has completed successfully. This
> ensures that Tx timestamps are only reported with properly calibrated
> PHY offsets.
> 
> If ice_start_phy_timer_e82x() fails, restore calibrating to false on
> the error path to prevent permanently disabling Tx timestamps when
> ov_work is never queued.
> 
> Log a debug message while offset calibration is still pending, including
> the specific Tx/Rx error codes to aid debugging stalled calibration.
> This path is expected on every routine link-up: ov_work is first queued
> with no delay and the vernier offset cannot be computed until at least
> one packet has been transmitted, so the first several invocations
> normally land here. Use dev_dbg() rather than a rate-limited warning to
> avoid emitting KERN_WARNING on every link-up during normal operation.
> Log a debug message when calibration completes successfully.
> 
> Fixes: 3a7496234d17 ("ice: implement basic E822 PTP support")
> Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
> Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
> Signed-off-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
> Signed-off-by: Przemyslaw Korba <przemyslaw.korba@intel.com>
> ---
>  drivers/net/ethernet/intel/ice/ice_ptp.c | 36 ++++++++++++++++++++++++++------
>  1 file changed, 30 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c
> index 1d647ccce7c4..9d99cbb42463 100644
> --- a/drivers/net/ethernet/intel/ice/ice_ptp.c
> +++ b/drivers/net/ethernet/intel/ice/ice_ptp.c
> @@ -1266,13 +1283,20 @@ ice_ptp_port_phy_restart(struct ice_ptp_port *ptp_port)
>  
>  		/* Start the PHY timer in Vernier mode */
>  		err = ice_start_phy_timer_e82x(hw, port);
> -		if (err)
> +		if (err) {
> +			spin_lock_irqsave(&ptp_port->tx.lock, flags);
> +			ptp_port->tx.calibrating = false;
> +			spin_unlock_irqrestore(&ptp_port->tx.lock, flags);

Sashiko says:

> When ice_start_phy_timer_e82x() fails, does setting tx.calibrating to false
> cause timestamp requests to be accepted even though the PHY timer is not
> running?
> If tx.calibrating is false, the requests will be accepted but since the
> timer isn't running, the hardware won't generate completions. This appears
> to cause skb references to be held until they time out (e.g. after 2
> seconds) rather than failing fast, which can exhaust the Tx tracker.
> Since the next call to ice_ptp_port_phy_restart() would set calibrating
> back to true before attempting to start the timer again anyway, would it be
> safer to leave calibrating as true on this error path so that subsequent
> requests are immediately rejected?


This was done intentionally in the original patch and called out in the
commit message. I don't know for sure which is better. Need to get input
from Arek on this.

Perhaps its better to just leave this disabled since the timestamps
won't work properly until the timer does actually get initialized properly.

>  			break;
> +		}
>  
> -		/* Enable Tx timestamps right away */
> -		spin_lock_irqsave(&ptp_port->tx.lock, flags);
> -		ptp_port->tx.calibrating = false;
> -		spin_unlock_irqrestore(&ptp_port->tx.lock, flags);
> +		/* Do not clear calibrating flag here. Tx timestamps remain
> +		 * disabled until ice_ptp_wait_for_offsets() has verified
> +		 * that the Tx and Rx offset calibration has completed.
> +		 * Clearing it here would allow Tx timestamps to be reported
> +		 * before the PHY offset registers are configured, leading
> +		 * to incorrect timestamp values.
> +		 */
>  
>  		kthread_queue_delayed_work(pf->ptp.kworker, &ptp_port->ov_work,
>  					   0);
>