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[75.72.117.212]) by smtp.gmail.com with ESMTPSA id 00721157ae682-7bd976fd09asm57064577b3.41.2026.05.07.11.37.10 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 07 May 2026 11:37:12 -0700 (PDT) Message-ID: <3c78f48c-6478-46d0-87c2-581bb58637dd@riscstar.com> Date: Thu, 7 May 2026 13:37:09 -0500 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH net-next 08/12] dt-bindings: net: toshiba,tc965x-dwmac: add TC956x Ethernet bridge To: Bjorn Andersson Cc: andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, maxime.chevallier@bootlin.com, rmk+kernel@armlinux.org.uk, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linusw@kernel.org, brgl@kernel.org, arnd@arndb.de, gregkh@linuxfoundation.org, Daniel Thompson , mohd.anwar@oss.qualcomm.com, a0987203069@gmail.com, alexandre.torgue@foss.st.com, ast@kernel.org, boon.khai.ng@altera.com, chenchuangyu@xiaomi.com, chenhuacai@kernel.org, daniel@iogearbox.net, hawk@kernel.org, hkallweit1@gmail.com, inochiama@gmail.com, john.fastabend@gmail.com, julianbraha@gmail.com, livelycarpet87@gmail.com, matthew.gerlach@altera.com, mcoquelin.stm32@gmail.com, me@ziyao.cc, prabhakar.mahadev-lad.rj@bp.renesas.com, richardcochran@gmail.com, rohan.g.thomas@altera.com, sdf@fomichev.me, siyanteng@cqsoftware.com.cn, weishangjuan@eswincomputing.com, wens@kernel.org, netdev@vger.kernel.org, bpf@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <20260501155421.3329862-1-elder@riscstar.com> <20260501155421.3329862-9-elder@riscstar.com> Content-Language: en-US From: Alex Elder In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 5/7/26 9:12 AM, Bjorn Andersson wrote: > On Fri, May 01, 2026 at 10:54:16AM -0500, Alex Elder wrote: >> diff --git a/Documentation/devicetree/bindings/net/toshiba,tc956x-dwmac.yaml b/Documentation/devicetree/bindings/net/toshiba,tc956x-dwmac.yaml > [..] >> + >> + gpio-controller: true > > I don't have any concern with the use of a proper gpio driver to model > the implementation, but if I understand correctly this relationship > between gpio controller and gpio consumer is strictly internal to "the > PCI device". (I think you're already cool with this but I still wanted to respond.) That is not correct. These GPIO lines are used two ways for the RB3gen2: - drivers/pci/pwrctrl/pci-pwrctrl-tc9563.c uses GPIOs 2 and 3 to assert/deassert the reset lines associated with the two exposed downstream PCIe ports on the PCIe switch within the TC956x. - Each of the Ethernet PHYs has a reset GPIO. On the RB3gen2, the GPIOs used for the purpose come from the GPIO controller embedded in the TC9564 (00 and 01). These are therefore "exposed" (they are *not* strictly internal). > Is this connection variable or is the link merely expressed in > DeviceTree to mitigate the fact that you choose to implement the > responsibilities of the two parts split into two device drivers? It is variable. These resets might be implemented by other GPIO controllers on other platforms. > Are there other consumers of these TC956x gpios which would result in a > board designer (and hence dts author) to ever reference this > gpio-controller in a different way? They could. Nine of these GPIOs are exposed by the TC956x pins (GPIO00-06, GPIO12, GPIO35 and GPIO36). The RB3gen2 uses 00-03 (and possibly 04 but that's for a PHY we haven't tested yet). -Alex > Regards, > Bjorn