From: Nivedita Singhvi <niv@us.ibm.com>
To: Cheng Jin <chengjin@cs.caltech.edu>
Cc: satya srikanth <satyasrikanth2001@yahoo.com>,
"Xiaoliang (David) Wei" <weixl@caltech.edu>,
"netdev@oss.sgi.com" <netdev@oss.sgi.com>
Subject: Re: gigabit ethernet
Date: Fri, 13 Feb 2004 13:31:54 -0800 [thread overview]
Message-ID: <402D424A.5060901@us.ibm.com> (raw)
In-Reply-To: <Pine.LNX.4.44.0402131116590.24993-100000@fast2.cs.caltech.edu>
Cheng Jin wrote:
>
> I read somewhere that Intel SMP has cpu0 taking care of
> all the hardware interrupts, but I don't know about softirqs.
> I think all softirqs related to the GbE are handled by the
> same cpu.
For incoming network packets, the hw interrupt handler simply
schedules a local softirq to handle the rest of the input
processing. So the softirq will execute on the same
CPU that the hw interrupt came in on.
thanks,
Nivedita
next prev parent reply other threads:[~2004-02-13 21:31 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-02-12 8:39 gigabit ethernet satya srikanth
2004-02-12 9:34 ` Xiaoliang (David) Wei
2004-02-13 10:38 ` satya srikanth
2004-02-13 19:36 ` Cheng Jin
2004-02-13 21:31 ` Nivedita Singhvi [this message]
2004-02-13 22:11 ` Jeff Garzik
2004-02-14 14:09 ` satya srikanth
2004-02-16 4:32 ` Ben Greear
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