From mboxrd@z Thu Jan 1 00:00:00 1970 From: Nivedita Singhvi Subject: Re: gigabit ethernet Date: Fri, 13 Feb 2004 13:31:54 -0800 Sender: netdev-bounce@oss.sgi.com Message-ID: <402D424A.5060901@us.ibm.com> References: Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit Cc: satya srikanth , "Xiaoliang (David) Wei" , "netdev@oss.sgi.com" Return-path: To: Cheng Jin In-Reply-To: Errors-to: netdev-bounce@oss.sgi.com List-Id: netdev.vger.kernel.org Cheng Jin wrote: > > I read somewhere that Intel SMP has cpu0 taking care of > all the hardware interrupts, but I don't know about softirqs. > I think all softirqs related to the GbE are handled by the > same cpu. For incoming network packets, the hw interrupt handler simply schedules a local softirq to handle the rest of the input processing. So the softirq will execute on the same CPU that the hw interrupt came in on. thanks, Nivedita