From: Manfred Spraul <manfred@colorfullife.com>
To: Gary N Spiess <Gary.Spiess@Intermec.com>
Cc: netdev@oss.sgi.com, jgarzik@pobox.com
Subject: Re: [PATCH] natsemi update 4/4 External Fibre phy
Date: Sun, 06 Jun 2004 18:01:09 +0200 [thread overview]
Message-ID: <40C33FC5.2070604@colorfullife.com> (raw)
In-Reply-To: <200406041456330453.0BC6681C@136.179.85.112>
Gary N Spiess wrote:
>
> +/* add a couple of MII definitions specific to a PORT_FIBRE
> implementation */
> +#define MII_MCTRL 0x15 /* mode control register */
> +#define MII_IN_FX_MODE 0x0001 /* full duplex */
> +#define MII_DIS_SCRM 0x0004 /* disable scrambler */
>
Specific to a PORT_FIBRE implementation or specific to the PHY you are
using? I think register 0x15 is implementation specific.
Why do you actually want to handle the fibre phy as a new port? I'd
handle phy specific code by reading the MII_PHYSID{1,2} register and
then adding a special case if your phy is detected. The port can remain
at PORT_MII.
--
Manfred
prev parent reply other threads:[~2004-06-06 16:01 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-06-04 19:56 [PATCH] natsemi update 4/4 External Fibre phy Gary N Spiess
2004-06-06 16:01 ` Manfred Spraul [this message]
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