Re: [PATCH net] net: sparx5/lan969x: fix PTP clock max_adj value

[Maxime Chevallier <maxime.chevallier@bootlin.com>]

Hi Daniel,

On 12/02/2026 12:02, Daniel Machon wrote:
> The max_adj field in ptp_clock_info tells userspace how much the PHC
> clock frequency can be adjusted. ptp4l reads this and will never request
> a correction larger than max_adj.
> 
> On both sparx5 and lan969x the clock offset may never converge because
> the servo needs a frequency correction larger than the current max_adj
> of 200000 (200 ppm) allows. The servo rails at the max and the offset
> stays in the tens of microseconds.
> 
> The hardware has no inherent max adjustment limit; frequency correction
> is done by writing a 64-bit clock period increment to CLK_PER_CFG, and
> the register has plenty of range. The 200000 value was just an overly
> conservative software limit. The max_adj is shared between sparx5 and
> lan969x, and the increased value is safe for both.
> 
> Fix this by increasing max_adj to 10000000 (10000 ppm), giving the
> servo sufficient headroom.

That's arbitrary, but looks like there's plenty of other drivers that do
similar things :)

> Fixes: 0933bd04047c ("net: sparx5: Add support for ptp clocks")
> Signed-off-by: Daniel Machon <daniel.machon@microchip.com>

Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com>

Maxime