From: Rick Jones <rick.jones2@hp.com>
To: netdev@oss.sgi.com
Cc: Grant Grundler <iod00d@hp.com>
Subject: Re: tg3 support broken on PPC, a workaround
Date: Tue, 10 May 2005 15:13:25 -0700 [thread overview]
Message-ID: <42813205.1040709@hp.com> (raw)
In-Reply-To: <20050510.121214.39158393.davem@davemloft.net>
David S. Miller wrote:
> We really should be disconnecting at single cacheline boundaries
> on RISC systems. The PCI controllers on RISC machines are
> going to disconnect the tg3 when it crosses a cache line
> boundary, so all these setting do is waste PCI bandwidth.
It is my understanding that PA-RISC and IA64 controllers behave differently.
For confirmation one way or the other, I've cc'd someone who could talk about it
much more cogently than I.
rick jones
next prev parent reply other threads:[~2005-05-10 22:13 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-05-10 9:33 tg3 support broken on PPC, a workaround Manuel Perez Ayala
2005-05-10 16:52 ` Michael Chan
2005-05-10 19:12 ` David S. Miller
2005-05-10 19:43 ` Michael Chan
2005-05-10 21:15 ` David S. Miller
2005-05-10 20:26 ` David S. Miller
2005-05-10 20:14 ` Michael Chan
2005-05-10 21:23 ` David S. Miller
2005-05-10 20:49 ` Michael Chan
2005-05-10 20:32 ` David S. Miller
2005-05-10 22:13 ` Rick Jones [this message]
2005-05-10 23:21 ` Grant Grundler
2005-05-10 23:36 ` David S. Miller
2005-05-11 6:04 ` Manuel Perez Ayala
2005-05-11 15:24 ` Michael Chan
2005-05-12 9:28 ` Manuel Perez Ayala
2005-05-12 16:33 ` Rick Jones
2005-05-12 18:06 ` Manuel Perez Ayala
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