From: Heiner Kallweit <hkallweit1@gmail.com>
To: javen <javen_xu@realsil.com.cn>,
nic_swsd@realtek.com, andrew+netdev@lunn.ch, davem@davemloft.net,
edumazet@google.com, kuba@kernel.org, pabeni@redhat.com,
horms@kernel.org
Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH net-next v2 2/2] r8169: enable LTR support
Date: Thu, 8 Jan 2026 18:15:11 +0100 [thread overview]
Message-ID: <4294bfc4-ca9c-4a37-9079-bcd13dcfa3ac@gmail.com> (raw)
In-Reply-To: <20260108023523.1019-3-javen_xu@realsil.com.cn>
On 1/8/2026 3:35 AM, javen wrote:
> From: Javen Xu <javen_xu@realsil.com.cn>
>
> This patch will enable
> RTL8168FP/RTL8168EP/RTL8168H/RTL8125/RTL8126/RTL8127 LTR support.
>
> Signed-off-by: Javen Xu <javen_xu@realsil.com.cn>
>
> ---
> v2: Replace some register numbers with names according to datasheet.
> ---
> drivers/net/ethernet/realtek/r8169_main.c | 112 ++++++++++++++++++++++
> 1 file changed, 112 insertions(+)
>
> diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c
> index f9df6aadacce..1ee5a0b5a6a0 100644
> --- a/drivers/net/ethernet/realtek/r8169_main.c
> +++ b/drivers/net/ethernet/realtek/r8169_main.c
> @@ -312,6 +312,15 @@ enum rtl_registers {
> IBIMR0 = 0xfa,
> IBISR0 = 0xfb,
> FuncForceEvent = 0xfc,
> +
> + ALDPS_LTR = 0xe0a2,
> + LTR_OBFF_LOCK = 0xe032,
> + LTR_SNOOP = 0xe034,
> +
> +#define ALDPS_LTR_EN BIT(0)
> +#define LTR_OBFF_LOCK_EN BIT(0)
> +#define LINK_SPEED_CHANGE_EN BIT(14)
> +#define LTR_SNOOP_EN GENMASK(15, 14)
> };
>
> enum rtl8168_8101_registers {
> @@ -397,6 +406,8 @@ enum rtl8168_registers {
> #define PWM_EN (1 << 22)
> #define RXDV_GATED_EN (1 << 19)
> #define EARLY_TALLY_EN (1 << 16)
> + COMBO_LTR_EXTEND = 0xb6,
> +#define COMBO_LTR_EXTEND_EN BIT(0)
> };
>
> enum rtl8125_registers {
> @@ -2919,6 +2930,104 @@ static void rtl_disable_exit_l1(struct rtl8169_private *tp)
> }
> }
>
> +static void rtl_enable_ltr(struct rtl8169_private *tp)
> +{
> + switch (tp->mac_version) {
> + case RTL_GIGA_MAC_VER_80:
> + r8168_mac_ocp_write(tp, 0xcdd0, 0x9003);
> + r8168_mac_ocp_modify(tp, LTR_SNOOP, 0x0000, LTR_SNOOP_EN);
> + r8168_mac_ocp_modify(tp, ALDPS_LTR, 0x0000, ALDPS_LTR_EN);
> + r8168_mac_ocp_write(tp, 0xcdd2, 0x8c09);
> + r8168_mac_ocp_write(tp, 0xcdd8, 0x9003);
> + r8168_mac_ocp_write(tp, 0xcdd4, 0x9003);
> + r8168_mac_ocp_write(tp, 0xcdda, 0x9003);
> + r8168_mac_ocp_write(tp, 0xcdd6, 0x9003);
> + r8168_mac_ocp_write(tp, 0xcddc, 0x9003);
> + r8168_mac_ocp_write(tp, 0xcde8, 0x887a);
> + r8168_mac_ocp_write(tp, 0xcdea, 0x9003);
> + r8168_mac_ocp_write(tp, 0xcdec, 0x8c09);
> + r8168_mac_ocp_write(tp, 0xcdee, 0x9003);
> + r8168_mac_ocp_write(tp, 0xcdf0, 0x8a62);
> + r8168_mac_ocp_write(tp, 0xcdf2, 0x9003);
> + r8168_mac_ocp_write(tp, 0xcdf4, 0x883e);
> + r8168_mac_ocp_write(tp, 0xcdf6, 0x9003);
> + r8168_mac_ocp_write(tp, 0xcdf8, 0x8849);
> + r8168_mac_ocp_write(tp, 0xcdfa, 0x9003);
> + r8168_mac_ocp_modify(tp, LTR_OBFF_LOCK, 0x0000, LINK_SPEED_CHANGE_EN);
> + break;
> + case RTL_GIGA_MAC_VER_70:
> + r8168_mac_ocp_write(tp, 0xcdd0, 0x9003);
> + r8168_mac_ocp_modify(tp, LTR_SNOOP, 0x0000, LTR_SNOOP_EN);
> + r8168_mac_ocp_modify(tp, ALDPS_LTR, 0x0000, ALDPS_LTR_EN);
> + r8168_mac_ocp_write(tp, 0xcdd2, 0x8c09);
> + r8168_mac_ocp_write(tp, 0xcdd8, 0x9003);
> + r8168_mac_ocp_write(tp, 0xcdd4, 0x9003);
> + r8168_mac_ocp_write(tp, 0xcdda, 0x9003);
> + r8168_mac_ocp_write(tp, 0xcdd6, 0x9003);
> + r8168_mac_ocp_write(tp, 0xcddc, 0x9003);
> + r8168_mac_ocp_write(tp, 0xcde8, 0x887a);
> + r8168_mac_ocp_write(tp, 0xcdea, 0x9003);
> + r8168_mac_ocp_write(tp, 0xcdec, 0x8c09);
> + r8168_mac_ocp_write(tp, 0xcdee, 0x9003);
> + r8168_mac_ocp_write(tp, 0xcdf0, 0x8a62);
> + r8168_mac_ocp_write(tp, 0xcdf2, 0x9003);
> + r8168_mac_ocp_write(tp, 0xcdf4, 0x883e);
> + r8168_mac_ocp_write(tp, 0xcdf6, 0x9003);
> + r8168_mac_ocp_modify(tp, LTR_OBFF_LOCK, 0x0000, LINK_SPEED_CHANGE_EN);
> + break;
> + case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
> + r8168_mac_ocp_write(tp, 0xcdd0, 0x9003);
> + r8168_mac_ocp_modify(tp, LTR_SNOOP, 0x0000, LTR_SNOOP_EN);
> + r8168_mac_ocp_modify(tp, ALDPS_LTR, 0x0000, ALDPS_LTR_EN);
> + r8168_mac_ocp_write(tp, 0xcdd2, 0x889c);
> + r8168_mac_ocp_write(tp, 0xcdd8, 0x9003);
> + r8168_mac_ocp_write(tp, 0xcdd4, 0x8c30);
> + r8168_mac_ocp_write(tp, 0xcdda, 0x9003);
> + r8168_mac_ocp_write(tp, 0xcdd6, 0x9003);
> + r8168_mac_ocp_write(tp, 0xcddc, 0x9003);
> + r8168_mac_ocp_write(tp, 0xcde8, 0x883e);
> + r8168_mac_ocp_write(tp, 0xcdea, 0x9003);
> + r8168_mac_ocp_write(tp, 0xcdec, 0x889c);
> + r8168_mac_ocp_write(tp, 0xcdee, 0x9003);
> + r8168_mac_ocp_write(tp, 0xcdf0, 0x8C09);
> + r8168_mac_ocp_write(tp, 0xcdf2, 0x9003);
> + r8168_mac_ocp_modify(tp, LTR_OBFF_LOCK, 0x0000, LINK_SPEED_CHANGE_EN);
> + break;
> + case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48:
> + case RTL_GIGA_MAC_VER_52:
> + r8168_mac_ocp_modify(tp, ALDPS_LTR, 0x0000, ALDPS_LTR_EN);
> + RTL_W8(tp, COMBO_LTR_EXTEND, RTL_R8(tp, COMBO_LTR_EXTEND) | COMBO_LTR_EXTEND_EN);
> + fallthrough;
> + case RTL_GIGA_MAC_VER_51:
> + r8168_mac_ocp_modify(tp, LTR_SNOOP, 0x0000, LTR_SNOOP_EN);
> + r8168_mac_ocp_write(tp, 0xe02c, 0x1880);
> + r8168_mac_ocp_write(tp, 0xe02e, 0x4880);
> + r8168_mac_ocp_write(tp, 0xcdd8, 0x9003);
> + r8168_mac_ocp_write(tp, 0xcdda, 0x9003);
> + r8168_mac_ocp_write(tp, 0xcddc, 0x9003);
> + r8168_mac_ocp_write(tp, 0xcdd2, 0x883c);
> + r8168_mac_ocp_write(tp, 0xcdd4, 0x8c12);
> + r8168_mac_ocp_write(tp, 0xcdd6, 0x9003);
> + break;
> + default:
> + return;
> + }
> + /* chip can trigger LTR */
> + r8168_mac_ocp_modify(tp, LTR_OBFF_LOCK, 0x0003, LTR_OBFF_LOCK_EN);
> +}
> +
> +static void rtl_disable_ltr(struct rtl8169_private *tp)
> +{
You wrote in response to my question on v1: "We generally do not recommend disabling LTR."
Then, can't this function be removed? Or what would be the impact of leaving LTR enabled?
Please also address the checkpatch warnings, as reported by CI:
https://patchwork.kernel.org/project/netdevbpf/patch/20260108023523.1019-3-javen_xu@realsil.com.cn/
> + switch (tp->mac_version) {
> + case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_80:
> + r8168_mac_ocp_modify(tp, 0xe032, 0x0003, 0);
> + break;
> + default:
> + break;
> + }
> +}
> +
> +
> static void rtl_hw_aspm_clkreq_enable(struct rtl8169_private *tp, bool enable)
> {
> u8 val8;
> @@ -2947,6 +3056,7 @@ static void rtl_hw_aspm_clkreq_enable(struct rtl8169_private *tp, bool enable)
> break;
> }
>
> + rtl_enable_ltr(tp);
> switch (tp->mac_version) {
> case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48:
> case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_LAST:
> @@ -2968,6 +3078,7 @@ static void rtl_hw_aspm_clkreq_enable(struct rtl8169_private *tp, bool enable)
> break;
> }
>
> + rtl_disable_ltr(tp);
> switch (tp->mac_version) {
> case RTL_GIGA_MAC_VER_70:
> case RTL_GIGA_MAC_VER_80:
> @@ -4811,6 +4922,7 @@ static void rtl8169_down(struct rtl8169_private *tp)
>
> rtl8169_cleanup(tp);
> rtl_disable_exit_l1(tp);
> + rtl_disable_ltr(tp);
> rtl_prepare_power_down(tp);
>
> if (tp->dash_type != RTL_DASH_NONE && !tp->saved_wolopts)
prev parent reply other threads:[~2026-01-08 17:15 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-08 2:35 [PATCH net-next v2 0/2] r8169: add dash and LTR support javen
2026-01-08 2:35 ` [PATCH net-next v2 1/2] r8169: add DASH support for RTL8127AP javen
2026-01-08 2:35 ` [PATCH net-next v2 2/2] r8169: enable LTR support javen
2026-01-08 17:15 ` Heiner Kallweit [this message]
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