* [RFT 0/5] sky2 experimental patches
@ 2006-09-05 22:27 shemminger
2006-09-05 22:27 ` [RFT 1/5] sky2: more device ids (resend) shemminger
` (5 more replies)
0 siblings, 6 replies; 7+ messages in thread
From: shemminger @ 2006-09-05 22:27 UTC (permalink / raw)
To: Jeff Garzik; +Cc: netdev
These patches (against 2.6.18-rc6) may solve some of the
mystery hangs and other open problems. Still seeking
confirmation.
--
Stephen Hemminger <shemminger@osdl.org>
^ permalink raw reply [flat|nested] 7+ messages in thread
* [RFT 1/5] sky2: more device ids (resend)
2006-09-05 22:27 [RFT 0/5] sky2 experimental patches shemminger
@ 2006-09-05 22:27 ` shemminger
2006-09-05 22:27 ` [RFT 2/5] sky2: accept flow control shemminger
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: shemminger @ 2006-09-05 22:27 UTC (permalink / raw)
To: Jeff Garzik; +Cc: netdev
[-- Attachment #1: sky2-yet-more-ids.patch --]
[-- Type: text/plain, Size: 1379 bytes --]
Some more Marvell device id's, these are from the latest SysKonnect
driver version.
Signed-off-by: Stephen Hemminger <shemminger@osdl.org>
---
drivers/net/sky2.c | 3 +++
1 file changed, 3 insertions(+)
--- sky2.orig/drivers/net/sky2.c 2006-09-01 14:49:49.000000000 -0700
+++ sky2/drivers/net/sky2.c 2006-09-01 14:49:56.000000000 -0700
@@ -106,6 +106,7 @@
{ PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) },
{ PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) },
{ PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4b00) }, /* DGE-560T */
+ { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4001) }, /* DGE-550SX */
{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4340) },
{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4341) },
{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4342) },
@@ -117,6 +118,7 @@
{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4350) },
{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4351) },
{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4352) },
+ { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4353) },
{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4360) },
{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4361) },
{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4362) },
@@ -126,6 +128,7 @@
{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4366) },
{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4367) },
{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4368) },
+ { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4369) },
{ 0 }
};
--
Stephen Hemminger <shemminger@osdl.org>
^ permalink raw reply [flat|nested] 7+ messages in thread
* [RFT 2/5] sky2: accept flow control
2006-09-05 22:27 [RFT 0/5] sky2 experimental patches shemminger
2006-09-05 22:27 ` [RFT 1/5] sky2: more device ids (resend) shemminger
@ 2006-09-05 22:27 ` shemminger
2006-09-05 22:27 ` [RFT 3/5] sky2: handle forced settings shemminger
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: shemminger @ 2006-09-05 22:27 UTC (permalink / raw)
To: Jeff Garzik; +Cc: netdev
[-- Attachment #1: sky2-gmac-pause.patch --]
[-- Type: text/plain, Size: 604 bytes --]
Don't program the GMAC to reject flow control packets.
This maybe the cause of some of the receive hangs.
Signed-off-by: Stephen Hemminger <shemminger@osdl.org>
--- sky2.orig/drivers/net/sky2.h 2006-09-05 15:17:38.000000000 -0700
+++ sky2/drivers/net/sky2.h 2006-09-05 15:18:00.000000000 -0700
@@ -1566,7 +1566,7 @@
GMR_FS_ANY_ERR = GMR_FS_RX_FF_OV | GMR_FS_CRC_ERR |
GMR_FS_FRAGMENT | GMR_FS_LONG_ERR |
- GMR_FS_MII_ERR | GMR_FS_BAD_FC | GMR_FS_GOOD_FC |
+ GMR_FS_MII_ERR | GMR_FS_BAD_FC |
GMR_FS_UN_SIZE | GMR_FS_JABBER,
};
--
Stephen Hemminger <shemminger@osdl.org>
^ permalink raw reply [flat|nested] 7+ messages in thread
* [RFT 3/5] sky2: handle forced settings
2006-09-05 22:27 [RFT 0/5] sky2 experimental patches shemminger
2006-09-05 22:27 ` [RFT 1/5] sky2: more device ids (resend) shemminger
2006-09-05 22:27 ` [RFT 2/5] sky2: accept flow control shemminger
@ 2006-09-05 22:27 ` shemminger
2006-09-05 22:27 ` [RFT 4/5] sky2: big endian fix shemminger
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: shemminger @ 2006-09-05 22:27 UTC (permalink / raw)
To: Jeff Garzik; +Cc: netdev
[-- Attachment #1: sky2-forced-pause.patch --]
[-- Type: text/plain, Size: 6637 bytes --]
Handle cases where pause parameters are forced. Need to program
the GMAC before starting the PHY, not after.
Signed-off-by: Stephen Hemminger <shemminger@osdl.org>
--- sky2.orig/drivers/net/sky2.c 2006-09-05 12:10:18.000000000 -0700
+++ sky2/drivers/net/sky2.c 2006-09-05 13:32:59.000000000 -0700
@@ -289,7 +289,7 @@
static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
{
struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
- u16 ctrl, ct1000, adv, pg, ledctrl, ledover;
+ u16 ctrl, ct1000, adv, pg, ledctrl, ledover, reg;
if (sky2->autoneg == AUTONEG_ENABLE &&
!(hw->chip_id == CHIP_ID_YUKON_XL || hw->chip_id == CHIP_ID_YUKON_EC_U)) {
@@ -358,6 +358,7 @@
ctrl = 0;
ct1000 = 0;
adv = PHY_AN_CSMA;
+ reg = 0;
if (sky2->autoneg == AUTONEG_ENABLE) {
if (hw->copper) {
@@ -390,21 +391,44 @@
/* forced speed/duplex settings */
ct1000 = PHY_M_1000C_MSE;
- if (sky2->duplex == DUPLEX_FULL)
- ctrl |= PHY_CT_DUP_MD;
+ /* Disable auto update for duplex flow control and speed */
+ reg |= GM_GPCR_AU_ALL_DIS;
switch (sky2->speed) {
case SPEED_1000:
ctrl |= PHY_CT_SP1000;
+ reg |= GM_GPCR_SPEED_1000;
break;
case SPEED_100:
ctrl |= PHY_CT_SP100;
+ reg |= GM_GPCR_SPEED_100;
break;
}
+ if (sky2->duplex == DUPLEX_FULL) {
+ reg |= GM_GPCR_DUP_FULL;
+ ctrl |= PHY_CT_DUP_MD;
+ }
+
+ if (!sky2->rx_pause)
+ reg |= GM_GPCR_FC_RX_DIS;
+
+ if (!sky2->tx_pause)
+ reg |= GM_GPCR_FC_TX_DIS;
+
+ /* Forward pause packets to GMAC? */
+ if (!sky2->tx_pause ||
+ (hw->chip_id != CHIP_ID_YUKON_EC_U &&
+ sky2->duplex == DUPLEX_HALF && sky2->speed != SPEED_1000))
+ sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
+ else
+ sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
+
ctrl |= PHY_CT_RESET;
}
+ gma_write16(hw, port, GM_GP_CTRL, reg);
+
if (hw->chip_id != CHIP_ID_YUKON_FE)
gm_phy_write(hw, port, PHY_MARV_1000T_CTRL, ct1000);
@@ -508,6 +532,7 @@
gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover);
}
+
/* Enable phy interrupt on auto-negotiation complete (or link up) */
if (sky2->autoneg == AUTONEG_ENABLE)
gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL);
@@ -570,49 +595,11 @@
gm_phy_read(hw, 1, PHY_MARV_INT_MASK) != 0);
}
- if (sky2->autoneg == AUTONEG_DISABLE) {
- reg = gma_read16(hw, port, GM_GP_CTRL);
- reg |= GM_GPCR_AU_ALL_DIS;
- gma_write16(hw, port, GM_GP_CTRL, reg);
- gma_read16(hw, port, GM_GP_CTRL);
-
- switch (sky2->speed) {
- case SPEED_1000:
- reg &= ~GM_GPCR_SPEED_100;
- reg |= GM_GPCR_SPEED_1000;
- break;
- case SPEED_100:
- reg &= ~GM_GPCR_SPEED_1000;
- reg |= GM_GPCR_SPEED_100;
- break;
- case SPEED_10:
- reg &= ~(GM_GPCR_SPEED_1000 | GM_GPCR_SPEED_100);
- break;
- }
-
- if (sky2->duplex == DUPLEX_FULL)
- reg |= GM_GPCR_DUP_FULL;
-
- /* turn off pause in 10/100mbps half duplex */
- else if (sky2->speed != SPEED_1000 &&
- hw->chip_id != CHIP_ID_YUKON_EC_U)
- sky2->tx_pause = sky2->rx_pause = 0;
- } else
- reg = GM_GPCR_SPEED_1000 | GM_GPCR_SPEED_100 | GM_GPCR_DUP_FULL;
-
- if (!sky2->tx_pause && !sky2->rx_pause) {
- sky2_write32(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
- reg |=
- GM_GPCR_FC_TX_DIS | GM_GPCR_FC_RX_DIS | GM_GPCR_AU_FCT_DIS;
- } else if (sky2->tx_pause && !sky2->rx_pause) {
- /* disable Rx flow-control */
- reg |= GM_GPCR_FC_RX_DIS | GM_GPCR_AU_FCT_DIS;
- }
-
- gma_write16(hw, port, GM_GP_CTRL, reg);
-
sky2_read16(hw, SK_REG(port, GMAC_IRQ_SRC));
+ /* Enable Transmit FIFO Underrun */
+ sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), GMAC_DEF_MSK);
+
spin_lock_bh(&sky2->phy_lock);
sky2_phy_init(hw, port);
spin_unlock_bh(&sky2->phy_lock);
@@ -1529,40 +1516,10 @@
unsigned port = sky2->port;
u16 reg;
- /* Enable Transmit FIFO Underrun */
- sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), GMAC_DEF_MSK);
-
- reg = gma_read16(hw, port, GM_GP_CTRL);
- if (sky2->autoneg == AUTONEG_DISABLE) {
- reg |= GM_GPCR_AU_ALL_DIS;
-
- /* Is write/read necessary? Copied from sky2_mac_init */
- gma_write16(hw, port, GM_GP_CTRL, reg);
- gma_read16(hw, port, GM_GP_CTRL);
-
- switch (sky2->speed) {
- case SPEED_1000:
- reg &= ~GM_GPCR_SPEED_100;
- reg |= GM_GPCR_SPEED_1000;
- break;
- case SPEED_100:
- reg &= ~GM_GPCR_SPEED_1000;
- reg |= GM_GPCR_SPEED_100;
- break;
- case SPEED_10:
- reg &= ~(GM_GPCR_SPEED_1000 | GM_GPCR_SPEED_100);
- break;
- }
- } else
- reg &= ~GM_GPCR_AU_ALL_DIS;
-
- if (sky2->duplex == DUPLEX_FULL || sky2->autoneg == AUTONEG_ENABLE)
- reg |= GM_GPCR_DUP_FULL;
-
/* enable Rx/Tx */
+ reg = gma_read16(hw, port, GM_GP_CTRL);
reg |= GM_GPCR_RX_ENA | GM_GPCR_TX_ENA;
gma_write16(hw, port, GM_GP_CTRL, reg);
- gma_read16(hw, port, GM_GP_CTRL);
gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
@@ -1616,7 +1573,6 @@
reg = gma_read16(hw, port, GM_GP_CTRL);
reg &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA);
gma_write16(hw, port, GM_GP_CTRL, reg);
- gma_read16(hw, port, GM_GP_CTRL); /* PCI post */
if (sky2->rx_pause && !sky2->tx_pause) {
/* restore Asymmetric Pause bit */
@@ -1633,6 +1589,7 @@
if (netif_msg_link(sky2))
printk(KERN_INFO PFX "%s: Link is down.\n", sky2->netdev->name);
+
sky2_phy_init(hw, port);
}
@@ -1673,11 +1630,13 @@
sky2->rx_pause = (aux & PHY_M_PS_RX_P_EN) != 0;
sky2->tx_pause = (aux & PHY_M_PS_TX_P_EN) != 0;
- if ((sky2->tx_pause || sky2->rx_pause)
- && !(sky2->speed < SPEED_1000 && sky2->duplex == DUPLEX_HALF))
- sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
- else
+ if (!sky2->tx_pause ||
+ /* disable Pause also for 10/100 Mbps in half duplex mode */
+ ((hw->chip_id != CHIP_ID_YUKON_EC_U &&
+ sky2->speed < SPEED_1000 && sky2->duplex == DUPLEX_HALF)))
sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
+ else
+ sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
return 0;
}
@@ -1700,7 +1659,7 @@
printk(KERN_INFO PFX "%s: phy interrupt status 0x%x 0x%x\n",
sky2->netdev->name, istatus, phystat);
- if (istatus & PHY_M_IS_AN_COMPL) {
+ if (sky2->autoneg == AUTONEG_ENABLE && (istatus & PHY_M_IS_AN_COMPL)) {
if (sky2_autoneg_done(sky2, phystat) == 0)
sky2_link_up(sky2);
goto out;
@@ -2890,7 +2849,6 @@
struct ethtool_pauseparam *ecmd)
{
struct sky2_port *sky2 = netdev_priv(dev);
- int err = 0;
sky2->autoneg = ecmd->autoneg;
sky2->tx_pause = ecmd->tx_pause != 0;
@@ -2898,7 +2856,7 @@
sky2_phy_reinit(sky2);
- return err;
+ return 0;
}
static int sky2_get_coalesce(struct net_device *dev,
--
Stephen Hemminger <shemminger@osdl.org>
^ permalink raw reply [flat|nested] 7+ messages in thread
* [RFT 4/5] sky2: big endian fix
2006-09-05 22:27 [RFT 0/5] sky2 experimental patches shemminger
` (2 preceding siblings ...)
2006-09-05 22:27 ` [RFT 3/5] sky2: handle forced settings shemminger
@ 2006-09-05 22:27 ` shemminger
2006-09-05 22:27 ` [RFT 5/5] sky2: fix fiber support shemminger
2006-09-06 15:21 ` [RFT 0/5] sky2 experimental patches Jeff Garzik
5 siblings, 0 replies; 7+ messages in thread
From: shemminger @ 2006-09-05 22:27 UTC (permalink / raw)
To: Jeff Garzik; +Cc: netdev
[-- Attachment #1: sky2-ppc.patch --]
[-- Type: text/plain, Size: 4769 bytes --]
Revised version of Ben's patch to fix big endian support.
Signed-off-by: Stephen Hemminger <shemminger@osdl.org>
--- sky2.orig/drivers/net/sky2.c 2006-09-05 13:39:34.000000000 -0700
+++ sky2/drivers/net/sky2.c 2006-09-05 13:57:44.000000000 -0700
@@ -809,7 +809,7 @@
struct sky2_rx_le *le;
le = sky2_next_rx(sky2);
- le->addr = (ETH_HLEN << 16) | ETH_HLEN;
+ le->addr = cpu_to_le32((ETH_HLEN << 16) | ETH_HLEN);
le->ctrl = 0;
le->opcode = OP_TCPSTART | HW_OWNER;
@@ -1227,7 +1227,7 @@
/* Send high bits if changed or crosses boundary */
if (addr64 != sky2->tx_addr64 || high32(mapping + len) != sky2->tx_addr64) {
le = get_tx_le(sky2);
- le->tx.addr = cpu_to_le32(addr64);
+ le->addr = cpu_to_le32(addr64);
le->ctrl = 0;
le->opcode = OP_ADDR64 | HW_OWNER;
sky2->tx_addr64 = high32(mapping + len);
@@ -1242,8 +1242,7 @@
if (mss != sky2->tx_last_mss) {
le = get_tx_le(sky2);
- le->tx.tso.size = cpu_to_le16(mss);
- le->tx.tso.rsvd = 0;
+ le->addr = cpu_to_le32(mss);
le->opcode = OP_LRGLEN | HW_OWNER;
le->ctrl = 0;
sky2->tx_last_mss = mss;
@@ -1256,7 +1255,7 @@
if (sky2->vlgrp && vlan_tx_tag_present(skb)) {
if (!le) {
le = get_tx_le(sky2);
- le->tx.addr = 0;
+ le->addr = 0;
le->opcode = OP_VLAN|HW_OWNER;
le->ctrl = 0;
} else
@@ -1268,20 +1267,21 @@
/* Handle TCP checksum offload */
if (skb->ip_summed == CHECKSUM_HW) {
- u16 hdr = skb->h.raw - skb->data;
- u16 offset = hdr + skb->csum;
+ unsigned offset = skb->h.raw - skb->data;
+ u32 tcpsum;
+
+ tcpsum = offset << 16; /* sum start */
+ tcpsum |= offset + skb->csum; /* sum write */
ctrl = CALSUM | WR_SUM | INIT_SUM | LOCK_SUM;
if (skb->nh.iph->protocol == IPPROTO_UDP)
ctrl |= UDPTCP;
- if (hdr != sky2->tx_csum_start || offset != sky2->tx_csum_offset) {
- sky2->tx_csum_start = hdr;
- sky2->tx_csum_offset = offset;
+ if (tcpsum != sky2->tx_tcpsum) {
+ sky2->tx_tcpsum = tcpsum;
le = get_tx_le(sky2);
- le->tx.csum.start = cpu_to_le16(hdr);
- le->tx.csum.offset = cpu_to_le16(offset);
+ le->addr = cpu_to_le32(tcpsum);
le->length = 0; /* initial checksum value */
le->ctrl = 1; /* one packet */
le->opcode = OP_TCPLISW | HW_OWNER;
@@ -1289,7 +1289,7 @@
}
le = get_tx_le(sky2);
- le->tx.addr = cpu_to_le32((u32) mapping);
+ le->addr = cpu_to_le32((u32) mapping);
le->length = cpu_to_le16(len);
le->ctrl = ctrl;
le->opcode = mss ? (OP_LARGESEND | HW_OWNER) : (OP_PACKET | HW_OWNER);
@@ -1307,14 +1307,14 @@
addr64 = high32(mapping);
if (addr64 != sky2->tx_addr64) {
le = get_tx_le(sky2);
- le->tx.addr = cpu_to_le32(addr64);
+ le->addr = cpu_to_le32(addr64);
le->ctrl = 0;
le->opcode = OP_ADDR64 | HW_OWNER;
sky2->tx_addr64 = addr64;
}
le = get_tx_le(sky2);
- le->tx.addr = cpu_to_le32((u32) mapping);
+ le->addr = cpu_to_le32((u32) mapping);
le->length = cpu_to_le16(frag->size);
le->ctrl = ctrl;
le->opcode = OP_BUFFER | HW_OWNER;
@@ -1919,8 +1919,8 @@
dev = hw->dev[le->link];
sky2 = netdev_priv(dev);
- length = le->length;
- status = le->status;
+ length = le16_to_cpu(le->length);
+ status = le32_to_cpu(le->status);
switch (le->opcode & ~HW_OWNER) {
case OP_RXSTAT:
@@ -1964,7 +1964,7 @@
case OP_RXCHKS:
skb = sky2->rx_ring[sky2->rx_next].skb;
skb->ip_summed = CHECKSUM_HW;
- skb->csum = le16_to_cpu(status);
+ skb->csum = status & 0xffff;
break;
case OP_TXINDEXLE:
@@ -3266,12 +3266,13 @@
hw->pm_cap = pm_cap;
#ifdef __BIG_ENDIAN
- /* byte swap descriptors in hardware */
+ /* The sk98lin vendor driver uses hardware byte swapping but
+ * this driver uses software swapping.
+ */
{
u32 reg;
-
reg = sky2_pci_read32(hw, PCI_DEV_REG2);
- reg |= PCI_REV_DESC;
+ reg &= ~PCI_REV_DESC;
sky2_pci_write32(hw, PCI_DEV_REG2, reg);
}
#endif
--- sky2.orig/drivers/net/sky2.h 2006-09-05 12:10:13.000000000 -0700
+++ sky2/drivers/net/sky2.h 2006-09-05 13:55:55.000000000 -0700
@@ -1783,21 +1783,9 @@
OP_TXINDEXLE = 0x68,
};
-/* Yukon 2 hardware interface
- * Not tested on big endian
- */
+/* Yukon 2 hardware interface */
struct sky2_tx_le {
- union {
- __le32 addr;
- struct {
- __le16 offset;
- __le16 start;
- } csum __attribute((packed));
- struct {
- __le16 size;
- __le16 rsvd;
- } tso __attribute((packed));
- } tx;
+ __le32 addr;
__le16 length; /* also vlan tag or checksum start */
u8 ctrl;
u8 opcode;
@@ -1843,8 +1831,7 @@
u32 tx_addr64;
u16 tx_pending;
u16 tx_last_mss;
- u16 tx_csum_start;
- u16 tx_csum_offset;
+ u32 tx_tcpsum;
struct ring_info *rx_ring ____cacheline_aligned_in_smp;
struct sky2_rx_le *rx_le;
--
Stephen Hemminger <shemminger@osdl.org>
^ permalink raw reply [flat|nested] 7+ messages in thread
* [RFT 5/5] sky2: fix fiber support
2006-09-05 22:27 [RFT 0/5] sky2 experimental patches shemminger
` (3 preceding siblings ...)
2006-09-05 22:27 ` [RFT 4/5] sky2: big endian fix shemminger
@ 2006-09-05 22:27 ` shemminger
2006-09-06 15:21 ` [RFT 0/5] sky2 experimental patches Jeff Garzik
5 siblings, 0 replies; 7+ messages in thread
From: shemminger @ 2006-09-05 22:27 UTC (permalink / raw)
To: Jeff Garzik; +Cc: netdev
[-- Attachment #1: sky2-fiber.patch --]
[-- Type: text/plain, Size: 6774 bytes --]
Fix support for fiber based devices. Needed to keep track of PMD type to
add workaround in setup. Add support for gigabit half duplex fiber.
Signed-off-by: Stephen Hemminger <shemminger@osdl.org>
---
drivers/net/sky2.c | 81 ++++++++++++++++++++++++++++++++---------------------
drivers/net/sky2.h | 15 +++++++++
2 files changed, 63 insertions(+), 33 deletions(-)
--- sky2.orig/drivers/net/sky2.c 2006-09-05 13:57:44.000000000 -0700
+++ sky2/drivers/net/sky2.c 2006-09-05 14:00:04.000000000 -0700
@@ -308,7 +308,7 @@
}
ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
- if (hw->copper) {
+ if (sky2_is_copper(hw)) {
if (hw->chip_id == CHIP_ID_YUKON_FE) {
/* enable automatic crossover */
ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO) >> 1;
@@ -325,25 +325,37 @@
ctrl |= PHY_M_PC_DSC(2) | PHY_M_PC_DOWN_S_ENA;
}
}
- gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
} else {
/* workaround for deviation #4.88 (CRC errors) */
/* disable Automatic Crossover */
ctrl &= ~PHY_M_PC_MDIX_MSK;
- gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
+ }
- if (hw->chip_id == CHIP_ID_YUKON_XL) {
- /* Fiber: select 1000BASE-X only mode MAC Specific Ctrl Reg. */
- gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
- ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
- ctrl &= ~PHY_M_MAC_MD_MSK;
- ctrl |= PHY_M_MAC_MODE_SEL(PHY_M_MAC_MD_1000BX);
- gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
+ gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
+
+ /* special setup for PHY 88E1112 Fiber */
+ if (hw->chip_id == CHIP_ID_YUKON_XL && !sky2_is_copper(hw)) {
+ pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
+ /* Fiber: select 1000BASE-X only mode MAC Specific Ctrl Reg. */
+ gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
+ ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
+ ctrl &= ~PHY_M_MAC_MD_MSK;
+ ctrl |= PHY_M_MAC_MODE_SEL(PHY_M_MAC_MD_1000BX);
+ gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
+
+ if (hw->pmd_type == 'P') {
/* select page 1 to access Fiber registers */
gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 1);
+
+ /* for SFP-module set SIGDET polarity to low */
+ ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
+ ctrl |= PHY_M_FIB_SIGD_POL;
+ gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl);
}
+
+ gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
}
ctrl = gm_phy_read(hw, port, PHY_MARV_CTRL);
@@ -361,7 +373,7 @@
reg = 0;
if (sky2->autoneg == AUTONEG_ENABLE) {
- if (hw->copper) {
+ if (sky2_is_copper(hw)) {
if (sky2->advertising & ADVERTISED_1000baseT_Full)
ct1000 |= PHY_M_1000C_AFD;
if (sky2->advertising & ADVERTISED_1000baseT_Half)
@@ -374,8 +386,12 @@
adv |= PHY_M_AN_10_FD;
if (sky2->advertising & ADVERTISED_10baseT_Half)
adv |= PHY_M_AN_10_HD;
- } else /* special defines for FIBER (88E1011S only) */
- adv |= PHY_M_AN_1000X_AHD | PHY_M_AN_1000X_AFD;
+ } else { /* special defines for FIBER (88E1040S only) */
+ if (sky2->advertising & ADVERTISED_1000baseT_Full)
+ adv |= PHY_M_AN_1000X_AFD;
+ if (sky2->advertising & ADVERTISED_1000baseT_Half)
+ adv |= PHY_M_AN_1000X_AHD;
+ }
/* Set Flow-control capabilities */
if (sky2->tx_pause && sky2->rx_pause)
@@ -1494,7 +1510,7 @@
static u16 sky2_phy_speed(const struct sky2_hw *hw, u16 aux)
{
- if (!hw->copper)
+ if (!sky2_is_copper(hw))
return SPEED_1000;
if (hw->chip_id == CHIP_ID_YUKON_FE)
@@ -2266,7 +2282,7 @@
static int sky2_reset(struct sky2_hw *hw)
{
u16 status;
- u8 t8, pmd_type;
+ u8 t8;
int i;
sky2_write8(hw, B0_CTST, CS_RST_CLR);
@@ -2312,9 +2328,7 @@
sky2_pci_write32(hw, PEX_UNC_ERR_STAT, 0xffffffffUL);
- pmd_type = sky2_read8(hw, B2_PMD_TYP);
- hw->copper = !(pmd_type == 'L' || pmd_type == 'S');
-
+ hw->pmd_type = sky2_read8(hw, B2_PMD_TYP);
hw->ports = 1;
t8 = sky2_read8(hw, B2_Y2_HW_RES);
if ((t8 & CFG_DUAL_MAC_MSK) == CFG_DUAL_MAC_MSK) {
@@ -2411,21 +2425,22 @@
static u32 sky2_supported_modes(const struct sky2_hw *hw)
{
- u32 modes;
- if (hw->copper) {
- modes = SUPPORTED_10baseT_Half
- | SUPPORTED_10baseT_Full
- | SUPPORTED_100baseT_Half
- | SUPPORTED_100baseT_Full
- | SUPPORTED_Autoneg | SUPPORTED_TP;
+ if (sky2_is_copper(hw)) {
+ u32 modes = SUPPORTED_10baseT_Half
+ | SUPPORTED_10baseT_Full
+ | SUPPORTED_100baseT_Half
+ | SUPPORTED_100baseT_Full
+ | SUPPORTED_Autoneg | SUPPORTED_TP;
if (hw->chip_id != CHIP_ID_YUKON_FE)
modes |= SUPPORTED_1000baseT_Half
- | SUPPORTED_1000baseT_Full;
+ | SUPPORTED_1000baseT_Full;
+ return modes;
} else
- modes = SUPPORTED_1000baseT_Full | SUPPORTED_FIBRE
- | SUPPORTED_Autoneg;
- return modes;
+ return SUPPORTED_1000baseT_Half
+ | SUPPORTED_1000baseT_Full
+ | SUPPORTED_Autoneg
+ | SUPPORTED_FIBRE;
}
static int sky2_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
@@ -2436,7 +2451,7 @@
ecmd->transceiver = XCVR_INTERNAL;
ecmd->supported = sky2_supported_modes(hw);
ecmd->phy_address = PHY_ADDR_MARV;
- if (hw->copper) {
+ if (sky2_is_copper(hw)) {
ecmd->supported = SUPPORTED_10baseT_Half
| SUPPORTED_10baseT_Full
| SUPPORTED_100baseT_Half
@@ -2445,12 +2460,14 @@
| SUPPORTED_1000baseT_Full
| SUPPORTED_Autoneg | SUPPORTED_TP;
ecmd->port = PORT_TP;
- } else
+ ecmd->speed = sky2->speed;
+ } else {
+ ecmd->speed = SPEED_1000;
ecmd->port = PORT_FIBRE;
+ }
ecmd->advertising = sky2->advertising;
ecmd->autoneg = sky2->autoneg;
- ecmd->speed = sky2->speed;
ecmd->duplex = sky2->duplex;
return 0;
}
--- sky2.orig/drivers/net/sky2.h 2006-09-05 13:55:55.000000000 -0700
+++ sky2/drivers/net/sky2.h 2006-09-05 14:00:04.000000000 -0700
@@ -1318,6 +1318,14 @@
};
/* for Yukon-2 Gigabit Ethernet PHY (88E1112 only) */
+/***** PHY_MARV_PHY_CTRL (page 1) 16 bit r/w Fiber Specific Ctrl *****/
+enum {
+ PHY_M_FIB_FORCE_LNK = 1<<10,/* Force Link Good */
+ PHY_M_FIB_SIGD_POL = 1<<9, /* SIGDET Polarity */
+ PHY_M_FIB_TX_DIS = 1<<3, /* Transmitter Disable */
+};
+
+/* for Yukon-2 Gigabit Ethernet PHY (88E1112 only) */
/***** PHY_MARV_PHY_CTRL (page 2) 16 bit r/w MAC Specific Ctrl *****/
enum {
PHY_M_MAC_MD_MSK = 7<<7, /* Bit 9.. 7: Mode Select Mask */
@@ -1867,7 +1875,7 @@
int pm_cap;
u8 chip_id;
u8 chip_rev;
- u8 copper;
+ u8 pmd_type;
u8 ports;
struct sky2_status_le *st_le;
@@ -1879,6 +1887,11 @@
wait_queue_head_t msi_wait;
};
+static inline int sky2_is_copper(const struct sky2_hw *hw)
+{
+ return !(hw->pmd_type == 'L' || hw->pmd_type == 'S' || hw->pmd_type == 'P');
+}
+
/* Register accessor for memory mapped device */
static inline u32 sky2_read32(const struct sky2_hw *hw, unsigned reg)
{
--
Stephen Hemminger <shemminger@osdl.org>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [RFT 0/5] sky2 experimental patches
2006-09-05 22:27 [RFT 0/5] sky2 experimental patches shemminger
` (4 preceding siblings ...)
2006-09-05 22:27 ` [RFT 5/5] sky2: fix fiber support shemminger
@ 2006-09-06 15:21 ` Jeff Garzik
5 siblings, 0 replies; 7+ messages in thread
From: Jeff Garzik @ 2006-09-06 15:21 UTC (permalink / raw)
To: shemminger; +Cc: netdev
Since these are marked RFT, I ACK them, but then deleted them from my
inbox awaiting resend of final version.
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2006-09-06 15:21 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2006-09-05 22:27 [RFT 0/5] sky2 experimental patches shemminger
2006-09-05 22:27 ` [RFT 1/5] sky2: more device ids (resend) shemminger
2006-09-05 22:27 ` [RFT 2/5] sky2: accept flow control shemminger
2006-09-05 22:27 ` [RFT 3/5] sky2: handle forced settings shemminger
2006-09-05 22:27 ` [RFT 4/5] sky2: big endian fix shemminger
2006-09-05 22:27 ` [RFT 5/5] sky2: fix fiber support shemminger
2006-09-06 15:21 ` [RFT 0/5] sky2 experimental patches Jeff Garzik
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