[PATCH 0/10] cxgb3: Chelsio T3 1G/10G ethernet device driver

[PATCH 0/10] cxgb3: Chelsio T3 1G/10G ethernet device driver

[Divy Le Ray]

Jeff,

I resubmit the patch supporting the latest Chelsio T3 adapter.
It incorporates the last feedbacks for code cleanup.
It is built gainst Linus'tree.

We think the driver is now ready to be merged.
Can you please advise on the next steps for inclusion in 2.6.20 ?

A corresponding monolithic patch is posted at the following URL:
http://service.chelsio.com/kernel.org/cxgb3.patch.bz2

This driver is required by the Chelsio T3 RDMA driver
which was updated on 12/10/2006.

Cheers,
Divy

Re: [PATCH 0/10] cxgb3: Chelsio T3 1G/10G ethernet device driver

[Steve Wise]

Hey Jeff,

Is this driver in your queue for merging?  The Chelsio T3 RDMA driver
that depends on the T3 Ethernet driver is also ready to be merged.

I was just wondering if its in queue, or if there is something else we
need to do.

Thanks,

Steve.


On Wed, 2006-12-13 at 21:40 -0800, Divy Le Ray wrote:
> Jeff,
> 
> I resubmit the patch supporting the latest Chelsio T3 adapter.
> It incorporates the last feedbacks for code cleanup.
> It is built gainst Linus'tree.
> 
> We think the driver is now ready to be merged.
> Can you please advise on the next steps for inclusion in 2.6.20 ?
> 
> A corresponding monolithic patch is posted at the following URL:
> http://service.chelsio.com/kernel.org/cxgb3.patch.bz2
> 
> This driver is required by the Chelsio T3 RDMA driver
> which was updated on 12/10/2006.
> 
> Cheers,
> Divy
> 
> -
> To unsubscribe from this list: send the line "unsubscribe netdev" in
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Re: [PATCH 0/10] cxgb3: Chelsio T3 1G/10G ethernet device driver

[Jeff Garzik]

Steve Wise wrote:
> Hey Jeff,
> 
> Is this driver in your queue for merging?  The Chelsio T3 RDMA driver
> that depends on the T3 Ethernet driver is also ready to be merged.
> 
> I was just wondering if its in queue, or if there is something else we
> need to do.

I have mainly been waiting for feedback from other developers on it, and 
letting the driver settle down.  When its being revised on a daily 
basis, I usually just delete the driver and wait for the next revision :)

	Jeff

Re: [PATCH 0/10] cxgb3: Chelsio T3 1G/10G ethernet device driver

[Steve Wise]

On Fri, 2006-12-15 at 12:06 -0500, Jeff Garzik wrote:
> Steve Wise wrote:
> > Hey Jeff,
> > 
> > Is this driver in your queue for merging?  The Chelsio T3 RDMA driver
> > that depends on the T3 Ethernet driver is also ready to be merged.
> > 
> > I was just wondering if its in queue, or if there is something else we
> > need to do.
> 
> I have mainly been waiting for feedback from other developers on it, and 
> letting the driver settle down.  When its being revised on a daily 
> basis, I usually just delete the driver and wait for the next revision :)
> 
> 	Jeff

Ok, fair enough.
  
I do believe all issues/comments have been addressed for both drivers,
and the last review round only had minimal feedback.  Perhaps they're
ready now?

Steve.

Re: cxgb3 and 2.6.20-rc1

[Jan Engelhardt]

[-- Attachment #1: Type: TEXT/PLAIN, Size: 879 bytes --]

Hi,


On Dec 13 2006 21:40, Divy Le Ray wrote:
>
> A corresponding monolithic patch is posted at the following URL:
> http://service.chelsio.com/kernel.org/cxgb3.patch.bz2

I was unable to compile this on 2.6.20-rc1, because:

  CC [M]  drivers/net/cxgb3/cxgb3_offload.o
drivers/net/cxgb3/cxgb3_offload.c: In function ‘cxgb_free_mem’:
drivers/net/cxgb3/cxgb3_offload.c:1004: error: ‘PKMAP_BASE’ undeclared 
(first use in this function)

However, line 1004 is:

	if (p >= VMALLOC_START && p < VMALLOC_END)

and include/asm/pgtable.h:

	#ifdef CONFIG_HIGHMEM
	# define VMALLOC_END    (PKMAP_BASE-2*PAGE_SIZE)
	#else
	# define VMALLOC_END    (FIXADDR_START-2*PAGE_SIZE)
	#endif

So include/asm/pgtable.h lacks inclusion of include/asm/highmem.h,
where PKMAP_BASE is defined. Adding it gives me more compile errors.
Not good. Does anyone have a patch to fix that?


	-`J'
-- 

Re: [PATCH 0/10] cxgb3, p1

[Jan Engelhardt]

> I resubmit the patch supporting the latest Chelsio T3 adapter.
> It incorporates the last feedbacks for code cleanup.
> It is built gainst Linus'tree.
>
> We think the driver is now ready to be merged.
> Can you please advise on the next steps for inclusion in 2.6.20 ?
>
> A corresponding monolithic patch is posted at the following URL:
> http://service.chelsio.com/kernel.org/cxgb3.patch.bz2
>
> This driver is required by the Chelsio T3 RDMA driver
> which was updated on 12/10/2006.

Here are some extras that you could source (but don't require a 
resubmit)



---

Cleanup.
Not all unnecessary casts are gone

  - (void)cmpxchg stayed to silence a warning

  - some (u32) in t3_hw.c remain because it's not just an ugly cast,
    but also a truncation. Taking away (u32) without verifying that
    it is invariant with an implicit truncation is not good (and
    I was lazy at verifying it)

Signed-off-by: Jan Engelhardt <jengelh@gmx.de>

Index: linux-2.6.20-rc1/drivers/net/cxgb3/xgmac.c
===================================================================
--- linux-2.6.20-rc1.orig/drivers/net/cxgb3/xgmac.c
+++ linux-2.6.20-rc1/drivers/net/cxgb3/xgmac.c
@@ -25,7 +25,7 @@ static inline int macidx(const struct cm
 
 static void xaui_serdes_reset(struct cmac *mac)
 {
-	static unsigned int clear[] = {
+	static const unsigned int clear[] = {
 		F_PWRDN0 | F_PWRDN1, F_RESETPLL01, F_RESET0 | F_RESET1,
 		F_PWRDN2 | F_PWRDN3, F_RESETPLL23, F_RESET2 | F_RESET3
 	};
@@ -38,7 +38,7 @@ static void xaui_serdes_reset(struct cma
 		     F_RESET3 | F_RESET2 | F_RESET1 | F_RESET0 |
 		     F_PWRDN3 | F_PWRDN2 | F_PWRDN1 | F_PWRDN0 |
 		     F_RESETPLL23 | F_RESETPLL01);
-	(void)t3_read_reg(adap, ctrl);
+	t3_read_reg(adap, ctrl);
 	udelay(15);
 
 	for (i = 0; i < ARRAY_SIZE(clear); i++) {
@@ -80,7 +80,7 @@ int t3_mac_reset(struct cmac *mac)
 	unsigned int oft = mac->offset;
 
 	t3_write_reg(adap, A_XGM_RESET_CTRL + oft, F_MAC_RESET_);
-	(void)t3_read_reg(adap, A_XGM_RESET_CTRL + oft);	/* flush */
+	t3_read_reg(adap, A_XGM_RESET_CTRL + oft);	/* flush */
 
 	t3_write_regs(adap, mac_reset_avp, ARRAY_SIZE(mac_reset_avp), oft);
 	t3_set_reg_field(adap, A_XGM_RXFIFO_CFG + oft,
@@ -115,7 +115,7 @@ int t3_mac_reset(struct cmac *mac)
 	else
 		val |= F_RGMII_RESET_ | F_XG2G_RESET_;
 	t3_write_reg(adap, A_XGM_RESET_CTRL + oft, val);
-	(void)t3_read_reg(adap, A_XGM_RESET_CTRL + oft);	/* flush */
+	t3_read_reg(adap, A_XGM_RESET_CTRL + oft);	/* flush */
 	if ((val & F_PCS_RESET_) && adap->params.rev) {
 		msleep(1);
 		t3b_pcs_reset(mac);
Index: linux-2.6.20-rc1/drivers/net/cxgb3/sge.c
===================================================================
--- linux-2.6.20-rc1.orig/drivers/net/cxgb3/sge.c
+++ linux-2.6.20-rc1/drivers/net/cxgb3/sge.c
@@ -2160,7 +2160,7 @@ static irqreturn_t t3_intr(int irq, void
 
 	if (likely(w0 | w1)) {
 		t3_write_reg(adap, A_PL_CLI, 0);
-		(void)t3_read_reg(adap, A_PL_CLI);	/* flush */
+		t3_read_reg(adap, A_PL_CLI);	/* flush */
 
 		if (likely(w0))
 			process_responses_gts(adap, q0);
Index: linux-2.6.20-rc1/drivers/net/cxgb3/t3_hw.c
===================================================================
--- linux-2.6.20-rc1.orig/drivers/net/cxgb3/t3_hw.c
+++ linux-2.6.20-rc1/drivers/net/cxgb3/t3_hw.c
@@ -15,7 +15,7 @@
 #include "firmware_exports.h"
 
  /**
- *	t3_wait_op_done_val - wait until an operation is completed
+  *	t3_wait_op_done_val - wait until an operation is completed
   *	@adapter: the adapter performing the operation
   *	@reg: the register to check for completion
   *	@mask: a single-bit field within @reg that indicates completion
@@ -84,7 +84,7 @@ void t3_set_reg_field(struct adapter *ad
 	u32 v = t3_read_reg(adapter, addr) & ~mask;
 
 	t3_write_reg(adapter, addr, v | val);
-	(void)t3_read_reg(adapter, addr);	/* flush */
+	t3_read_reg(adapter, addr);	/* flush */
 }
 
 /**
@@ -526,7 +526,7 @@ int t3_seeprom_read(struct adapter *adap
 	if ((addr >= EEPROMSIZE && addr != EEPROM_STAT_ADDR) || (addr & 3))
 		return -EINVAL;
 
-	pci_write_config_word(adapter->pdev, base + PCI_VPD_ADDR, (u16) addr);
+	pci_write_config_word(adapter->pdev, base + PCI_VPD_ADDR, addr);
 	do {
 		udelay(10);
 		pci_read_config_word(adapter->pdev, base + PCI_VPD_ADDR, &val);
@@ -562,7 +562,7 @@ int t3_seeprom_write(struct adapter *ada
 	pci_write_config_dword(adapter->pdev, base + PCI_VPD_DATA,
 			       cpu_to_le32(data));
 	pci_write_config_word(adapter->pdev,base + PCI_VPD_ADDR,
-			      (u16)addr | PCI_VPD_ADDR_F);
+			      addr | PCI_VPD_ADDR_F);
 	do {
 		msleep(1);
 		pci_read_config_word(adapter->pdev, base + PCI_VPD_ADDR, &val);
@@ -634,8 +634,8 @@ static int get_vpd_params(struct adapter
 		p->port_type[0] = uses_xaui(adapter) ? 1 : 2;
 		p->port_type[1] = uses_xaui(adapter) ? 6 : 2;
 	} else {
-		p->port_type[0] = (u8) hex2int(vpd.port0_data[0]);
-		p->port_type[1] = (u8) hex2int(vpd.port1_data[0]);
+		p->port_type[0] = hex2int(vpd.port0_data[0]);
+		p->port_type[1] = hex2int(vpd.port1_data[0]);
 		p->xauicfg[0] = simple_strtoul(vpd.xaui0cfg_data, NULL, 16);
 		p->xauicfg[1] = simple_strtoul(vpd.xaui1cfg_data, NULL, 16);
 	}
@@ -1000,7 +1000,7 @@ void t3_link_changed(struct adapter *ada
 		t3_write_reg(adapter, A_XGM_XAUI_ACT_CTRL + mac->offset,
 			     link_ok ? F_TXACTENABLE | F_RXEN : 0);
 	}
-	lc->link_ok = (unsigned char)link_ok;
+	lc->link_ok = link_ok;
 	lc->speed = speed < 0 ? SPEED_INVALID : speed;
 	lc->duplex = duplex < 0 ? DUPLEX_INVALID : duplex;
 	if (lc->requested_fc & PAUSE_AUTONEG)
@@ -1011,7 +1011,7 @@ void t3_link_changed(struct adapter *ada
 	if (link_ok && speed >= 0 && lc->autoneg == AUTONEG_ENABLE) {
 		/* Set MAC speed, duplex, and flow control to match PHY. */
 		t3_mac_set_speed_duplex_fc(mac, speed, duplex, fc);
-		lc->fc = (unsigned char)fc;
+		lc->fc = fc;
 	}
 
 	t3_os_link_changed(adapter, port_id, link_ok, speed, duplex, fc);
@@ -1047,7 +1047,7 @@ int t3_link_start(struct cphy *phy, stru
 		if (lc->autoneg == AUTONEG_DISABLE) {
 			lc->speed = lc->requested_speed;
 			lc->duplex = lc->requested_duplex;
-			lc->fc = (unsigned char)fc;
+			lc->fc = fc;
 			t3_mac_set_speed_duplex_fc(mac, lc->speed, lc->duplex,
 						   fc);
 			/* Also disables autoneg */
@@ -1057,7 +1057,7 @@ int t3_link_start(struct cphy *phy, stru
 			phy->ops->autoneg_enable(phy);
 	} else {
 		t3_mac_set_speed_duplex_fc(mac, -1, -1, fc);
-		lc->fc = (unsigned char)fc;
+		lc->fc = fc;
 		phy->ops->reset(phy, 0);
 	}
 	return 0;
@@ -1493,7 +1493,7 @@ static int mac_intr_handler(struct adapt
  */
 int t3_phy_intr_handler(struct adapter *adapter)
 {
-	static int intr_gpio_bits[] = { 8, 0x20 };
+	static const int intr_gpio_bits[] = { 8, 0x20 };
 
 	u32 i, cause = t3_read_reg(adapter, A_T3DBG_INT_CAUSE);
 
@@ -1564,7 +1564,7 @@ int t3_slow_intr_handler(struct adapter 
 
 	/* Clear the interrupts just processed. */
 	t3_write_reg(adapter, A_PL_INT_CAUSE0, cause);
-	(void)t3_read_reg(adapter, A_PL_INT_CAUSE0);	/* flush */
+	t3_read_reg(adapter, A_PL_INT_CAUSE0);	/* flush */
 	return 1;
 }
 
@@ -1618,7 +1618,7 @@ void t3_intr_enable(struct adapter *adap
 	else
 		t3_write_reg(adapter, A_PCIX_INT_ENABLE, PCIX_INTR_MASK);
 	t3_write_reg(adapter, A_PL_INT_ENABLE0, adapter->slow_intr_mask);
-	(void)t3_read_reg(adapter, A_PL_INT_ENABLE0);	/* flush */
+	t3_read_reg(adapter, A_PL_INT_ENABLE0);	/* flush */
 }
 
 /**
@@ -1631,7 +1631,7 @@ void t3_intr_enable(struct adapter *adap
 void t3_intr_disable(struct adapter *adapter)
 {
 	t3_write_reg(adapter, A_PL_INT_ENABLE0, 0);
-	(void)t3_read_reg(adapter, A_PL_INT_ENABLE0);	/* flush */
+	t3_read_reg(adapter, A_PL_INT_ENABLE0);	/* flush */
 	adapter->slow_intr_mask = 0;
 }
 
@@ -1643,7 +1643,7 @@ void t3_intr_disable(struct adapter *ada
  */
 void t3_intr_clear(struct adapter *adapter)
 {
-	static unsigned int cause_reg_addr[] = {
+	static const unsigned int cause_reg_addr[] = {
 		A_SG_INT_CAUSE,
 		A_SG_RSPQ_FL_STATUS,
 		A_PCIX_INT_CAUSE,
@@ -1671,7 +1671,7 @@ void t3_intr_clear(struct adapter *adapt
 		t3_write_reg(adapter, cause_reg_addr[i], 0xffffffff);
 
 	t3_write_reg(adapter, A_PL_INT_CAUSE0, 0xffffffff);
-	(void)t3_read_reg(adapter, A_PL_INT_CAUSE0);	/* flush */
+	t3_read_reg(adapter, A_PL_INT_CAUSE0);	/* flush */
 }
 
 /**
@@ -1777,12 +1777,12 @@ int t3_sge_init_ecntxt(struct adapter *a
 	t3_write_reg(adapter, A_SG_CONTEXT_DATA0, V_EC_INDEX(cidx) |
 		     V_EC_CREDITS(credits) | V_EC_GTS(gts_enable));
 	t3_write_reg(adapter, A_SG_CONTEXT_DATA1, V_EC_SIZE(size) |
-		     V_EC_BASE_LO((u32) base_addr & 0xffff));
+		     V_EC_BASE_LO(base_addr & 0xffff));
 	base_addr >>= 16;
-	t3_write_reg(adapter, A_SG_CONTEXT_DATA2, (u32) base_addr);
+	t3_write_reg(adapter, A_SG_CONTEXT_DATA2, base_addr);
 	base_addr >>= 32;
 	t3_write_reg(adapter, A_SG_CONTEXT_DATA3,
-		     V_EC_BASE_HI((u32) base_addr & 0xf) | V_EC_RESPQ(respq) |
+		     V_EC_BASE_HI(base_addr & 0xf) | V_EC_RESPQ(respq) |
 		     V_EC_TYPE(type) | V_EC_GEN(gen) | V_EC_UP_TOKEN(token) |
 		     F_EC_VALID);
 	return t3_sge_write_context(adapter, id, F_EGRESS);
@@ -1815,7 +1815,7 @@ int t3_sge_init_flcntxt(struct adapter *
 		return -EBUSY;
 
 	base_addr >>= 12;
-	t3_write_reg(adapter, A_SG_CONTEXT_DATA0, (u32) base_addr);
+	t3_write_reg(adapter, A_SG_CONTEXT_DATA0, base_addr);
 	base_addr >>= 32;
 	t3_write_reg(adapter, A_SG_CONTEXT_DATA1,
 		     V_FL_BASE_HI((u32) base_addr) |
@@ -1858,7 +1858,7 @@ int t3_sge_init_rspcntxt(struct adapter 
 	base_addr >>= 12;
 	t3_write_reg(adapter, A_SG_CONTEXT_DATA0, V_CQ_SIZE(size) |
 		     V_CQ_INDEX(cidx));
-	t3_write_reg(adapter, A_SG_CONTEXT_DATA1, (u32) base_addr);
+	t3_write_reg(adapter, A_SG_CONTEXT_DATA1, base_addr);
 	base_addr >>= 32;
 	if (irq_vec_idx >= 0)
 		intr = V_RQ_MSI_VEC(irq_vec_idx) | F_RQ_INTR_EN;
@@ -1894,7 +1894,7 @@ int t3_sge_init_cqcntxt(struct adapter *
 
 	base_addr >>= 12;
 	t3_write_reg(adapter, A_SG_CONTEXT_DATA0, V_CQ_SIZE(size));
-	t3_write_reg(adapter, A_SG_CONTEXT_DATA1, (u32) base_addr);
+	t3_write_reg(adapter, A_SG_CONTEXT_DATA1, base_addr);
 	base_addr >>= 32;
 	t3_write_reg(adapter, A_SG_CONTEXT_DATA2,
 		     V_CQ_BASE_HI((u32) base_addr) | V_CQ_RSPQ(rspq) |
@@ -2192,8 +2192,8 @@ int t3_read_rss(struct adapter *adapter,
 			val = t3_read_reg(adapter, A_TP_RSS_LKP_TABLE);
 			if (!(val & 0x80000000))
 				return -EAGAIN;
-			*lkup++ = (u8) val;
-			*lkup++ = (u8) (val >> 8);
+			*lkup++ = val;
+			*lkup++ = val >> 8;
 		}
 
 	if (map)
@@ -2203,7 +2203,7 @@ int t3_read_rss(struct adapter *adapter,
 			val = t3_read_reg(adapter, A_TP_RSS_MAP_TABLE);
 			if (!(val & 0x80000000))
 				return -EAGAIN;
-			*map++ = (u16) val;
+			*map++ = val;
 		}
 	return 0;
 }
@@ -2540,7 +2540,7 @@ void t3_load_mtus(struct adapter *adap, 
 		  unsigned short alpha[NCCTRL_WIN],
 		  unsigned short beta[NCCTRL_WIN], unsigned short mtu_cap)
 {
-	static unsigned int avg_pkts[NCCTRL_WIN] = {
+	static const unsigned int avg_pkts[NCCTRL_WIN] = {
 		2, 6, 10, 14, 20, 28, 40, 56, 80, 112, 160, 224, 320, 448, 640,
 		896, 1281, 1792, 2560, 3584, 5120, 7168, 10240, 14336, 20480,
 		28672, 40960, 57344, 81920, 114688, 163840, 229376
@@ -2606,8 +2606,7 @@ void t3_get_cong_cntl_tab(struct adapter
 		for (w = 0; w < NCCTRL_WIN; ++w) {
 			t3_write_reg(adap, A_TP_CCTRL_TABLE,
 				     0xffff0000 | (mtu << 5) | w);
-			incr[mtu][w] = (unsigned short)t3_read_reg(adap,
-								   A_TP_CCTRL_TABLE)
+			incr[mtu][w] = t3_read_reg(adap, A_TP_CCTRL_TABLE)
 			    & 0x1fff;
 		}
 }
@@ -2680,7 +2679,7 @@ void t3_config_trace_filter(struct adapt
 	tp_wr_indirect(adapter, addr++, mask[2]);
 	tp_wr_indirect(adapter, addr++, key[3]);
 	tp_wr_indirect(adapter, addr, mask[3]);
-	(void)t3_read_reg(adapter, A_TP_PIO_DATA);
+	t3_read_reg(adapter, A_TP_PIO_DATA);
 }
 
 /**
@@ -2796,7 +2795,7 @@ static int calibrate_xgm(struct adapter 
 
 		for (i = 0; i < 5; ++i) {
 			t3_write_reg(adapter, A_XGM_XAUI_IMP, 0);
-			(void)t3_read_reg(adapter, A_XGM_XAUI_IMP);
+			t3_read_reg(adapter, A_XGM_XAUI_IMP);
 			msleep(1);
 			v = t3_read_reg(adapter, A_XGM_XAUI_IMP);
 			if (!(v & (F_XGM_CALFAULT | F_CALBUSY))) {
@@ -2849,7 +2848,7 @@ struct mc7_timing_params {
 static int wrreg_wait(struct adapter *adapter, unsigned int addr, u32 val)
 {
 	t3_write_reg(adapter, addr, val);
-	(void)t3_read_reg(adapter, addr);	/* flush */
+	t3_read_reg(adapter, addr);	/* flush */
 	if (!(t3_read_reg(adapter, addr) & F_BUSY))
 		return 0;
 	CH_ERR(adapter, "write to MC7 register 0x%x timed out\n", addr);
@@ -2858,7 +2857,9 @@ static int wrreg_wait(struct adapter *ad
 
 static int mc7_init(struct mc7 *mc7, unsigned int mc7_clock, int mem_type)
 {
-	static unsigned int mc7_mode[] = { 0x632, 0x642, 0x652, 0x432, 0x442 };
+	static const unsigned int mc7_mode[] = {
+		0x632, 0x642, 0x652, 0x432, 0x442,
+	};
 	static const struct mc7_timing_params mc7_timings[] = {
 		{12, 3, 4, {20, 28, 34, 52, 0}, 15, 6, 4},
 		{12, 4, 5, {20, 28, 34, 52, 0}, 16, 7, 4},
@@ -2883,7 +2884,7 @@ static int mc7_init(struct mc7 *mc7, uns
 
 	if (!slow) {
 		t3_write_reg(adapter, mc7->offset + A_MC7_CAL, F_SGL_CAL_EN);
-		(void)t3_read_reg(adapter, mc7->offset + A_MC7_CAL);
+		t3_read_reg(adapter, mc7->offset + A_MC7_CAL);
 		msleep(1);
 		if (t3_read_reg(adapter, mc7->offset + A_MC7_CAL) &
 		    (F_BUSY | F_SGL_CAL_EN | F_CAL_FAULT)) {
@@ -2901,7 +2902,7 @@ static int mc7_init(struct mc7 *mc7, uns
 
 	t3_write_reg(adapter, mc7->offset + A_MC7_CFG,
 		     val | F_CLKEN | F_TERM150);
-	(void)t3_read_reg(adapter, mc7->offset + A_MC7_CFG);	/* flush */
+	t3_read_reg(adapter, mc7->offset + A_MC7_CFG);	/* flush */
 
 	if (!slow)
 		t3_set_reg_field(adapter, mc7->offset + A_MC7_DLL, F_DLLENB,
@@ -2936,7 +2937,7 @@ static int mc7_init(struct mc7 *mc7, uns
 
 	t3_write_reg(adapter, mc7->offset + A_MC7_REF,
 		     F_PERREFEN | V_PREREFDIV(mc7_clock));
-	(void)t3_read_reg(adapter, mc7->offset + A_MC7_REF);	/* flush */
+	t3_read_reg(adapter, mc7->offset + A_MC7_REF);	/* flush */
 
 	t3_write_reg(adapter, mc7->offset + A_MC7_ECC, F_ECCGENEN | F_ECCCHKEN);
 	t3_write_reg(adapter, mc7->offset + A_MC7_BIST_DATA, 0);
@@ -2944,7 +2945,7 @@ static int mc7_init(struct mc7 *mc7, uns
 	t3_write_reg(adapter, mc7->offset + A_MC7_BIST_ADDR_END,
 		     (mc7->size << width) - 1);
 	t3_write_reg(adapter, mc7->offset + A_MC7_BIST_OP, V_OP(1));
-	(void)t3_read_reg(adapter, mc7->offset + A_MC7_BIST_OP);	/* flush */
+	t3_read_reg(adapter, mc7->offset + A_MC7_BIST_OP);	/* flush */
 
 	attempts = 50;
 	do {
@@ -2966,13 +2967,13 @@ out_fail:
 
 static void config_pcie(struct adapter *adap)
 {
-	static u16 ack_lat[4][6] = {
+	static const u16 ack_lat[][6] = {
 		{237, 416, 559, 1071, 2095, 4143},
 		{128, 217, 289, 545, 1057, 2081},
 		{73, 118, 154, 282, 538, 1050},
 		{67, 107, 86, 150, 278, 534}
 	};
-	static u16 rpl_tmr[4][6] = {
+	static const u16 rpl_tmr[][6] = {
 		{711, 1248, 1677, 3213, 6285, 12429},
 		{384, 651, 867, 1635, 3171, 6243},
 		{219, 354, 462, 846, 1614, 3150},
@@ -3067,7 +3068,7 @@ int t3_init_hw(struct adapter *adapter, 
 	t3_write_reg(adapter, A_CIM_HOST_ACC_DATA, vpd->uclk | fw_params);
 	t3_write_reg(adapter, A_CIM_BOOT_CFG,
 		     V_BOOTADDR(FW_FLASH_BOOT_ADDR >> 2));
-	(void)t3_read_reg(adapter, A_CIM_BOOT_CFG);	/* flush */
+	t3_read_reg(adapter, A_CIM_BOOT_CFG);	/* flush */
 
 	do {			/* wait for uP to initialize */
 		msleep(20);
@@ -3206,13 +3207,13 @@ void early_hw_init(struct adapter *adapt
 
 	/* Enable MAC clocks so we can access the registers */
 	t3_write_reg(adapter, A_XGM_PORT_CFG, val);
-	(void)t3_read_reg(adapter, A_XGM_PORT_CFG);
+	t3_read_reg(adapter, A_XGM_PORT_CFG);
 
 	val |= F_CLKDIVRESET_;
 	t3_write_reg(adapter, A_XGM_PORT_CFG, val);
-	(void)t3_read_reg(adapter, A_XGM_PORT_CFG);
+	t3_read_reg(adapter, A_XGM_PORT_CFG);
 	t3_write_reg(adapter, XGM_REG(A_XGM_PORT_CFG, 1), val);
-	(void)t3_read_reg(adapter, A_XGM_PORT_CFG);
+	t3_read_reg(adapter, A_XGM_PORT_CFG);
 }
 
 /*
#<EOF>

	-`J'
-- 

Re: [PATCH 0/10] cxgb3, p2

[Jan Engelhardt]

> A corresponding monolithic patch is posted at the following URL:
> http://service.chelsio.com/kernel.org/cxgb3.patch.bz2

Stylistic stuff that was mentioned. (TYPE * a  -> TYPE *a)

Signed-off-by: Jan Engelhardt <jengelh@gmx.de>

Index: linux-2.6.20-rc1/drivers/net/cxgb3/common.h
===================================================================
--- linux-2.6.20-rc1.orig/drivers/net/cxgb3/common.h
+++ linux-2.6.20-rc1/drivers/net/cxgb3/common.h
@@ -139,10 +139,10 @@ struct cphy;
 struct adapter;
 
 struct mdio_ops {
-	int (*read) (struct adapter * adapter, int phy_addr, int mmd_addr,
-		     int reg_addr, unsigned int *val);
-	int (*write) (struct adapter * adapter, int phy_addr, int mmd_addr,
-		      int reg_addr, unsigned int val);
+	int (*read)(struct adapter *adapter, int phy_addr, int mmd_addr,
+		    int reg_addr, unsigned int *val);
+	int (*write)(struct adapter *adapter, int phy_addr, int mmd_addr,
+		     int reg_addr, unsigned int val);
 };
 
 struct adapter_info {
@@ -158,8 +158,8 @@ struct adapter_info {
 };
 
 struct port_type_info {
-	void (*phy_prep) (struct cphy * phy, struct adapter * adapter,
-			  int phy_addr, const struct mdio_ops * ops);
+	void (*phy_prep)(struct cphy *phy, struct adapter *adapter,
+			 int phy_addr, const struct mdio_ops *ops);
 	unsigned int caps;
 	const char *desc;
 };
@@ -476,23 +476,23 @@ enum {
 
 /* PHY operations */
 struct cphy_ops {
-	void (*destroy) (struct cphy * phy);
-	int (*reset) (struct cphy * phy, int wait);
+	void (*destroy)(struct cphy *phy);
+	int (*reset)(struct cphy *phy, int wait);
 
-	int (*intr_enable) (struct cphy * phy);
-	int (*intr_disable) (struct cphy * phy);
-	int (*intr_clear) (struct cphy * phy);
-	int (*intr_handler) (struct cphy * phy);
-
-	int (*autoneg_enable) (struct cphy * phy);
-	int (*autoneg_restart) (struct cphy * phy);
-
-	int (*advertise) (struct cphy * phy, unsigned int advertise_map);
-	int (*set_loopback) (struct cphy * phy, int mmd, int dir, int enable);
-	int (*set_speed_duplex) (struct cphy * phy, int speed, int duplex);
-	int (*get_link_status) (struct cphy * phy, int *link_ok, int *speed,
-				int *duplex, int *fc);
-	int (*power_down) (struct cphy * phy, int enable);
+	int (*intr_enable)(struct cphy *phy);
+	int (*intr_disable)(struct cphy *phy);
+	int (*intr_clear)(struct cphy *phy);
+	int (*intr_handler)(struct cphy *phy);
+
+	int (*autoneg_enable)(struct cphy *phy);
+	int (*autoneg_restart)(struct cphy *phy);
+
+	int (*advertise)(struct cphy *phy, unsigned int advertise_map);
+	int (*set_loopback)(struct cphy *phy, int mmd, int dir, int enable);
+	int (*set_speed_duplex)(struct cphy *phy, int speed, int duplex);
+	int (*get_link_status)(struct cphy *phy, int *link_ok, int *speed,
+			       int *duplex, int *fc);
+	int (*power_down)(struct cphy *phy, int enable);
 };
 
 /* A PHY instance */
@@ -501,10 +501,10 @@ struct cphy {
 	struct adapter *adapter;	/* associated adapter */
 	unsigned long fifo_errors;	/* FIFO over/under-flows */
 	const struct cphy_ops *ops;	/* PHY operations */
-	int (*mdio_read) (struct adapter * adapter, int phy_addr, int mmd_addr,
-			  int reg_addr, unsigned int *val);
-	int (*mdio_write) (struct adapter * adapter, int phy_addr, int mmd_addr,
-			   int reg_addr, unsigned int val);
+	int (*mdio_read)(struct adapter *adapter, int phy_addr, int mmd_addr,
+			 int reg_addr, unsigned int *val);
+	int (*mdio_write)(struct adapter *adapter, int phy_addr, int mmd_addr,
+			  int reg_addr, unsigned int val);
 };
 
 /* Convenience MDIO read/write wrappers */
Index: linux-2.6.20-rc1/drivers/net/cxgb3/cxgb3_main.c
===================================================================
--- linux-2.6.20-rc1.orig/drivers/net/cxgb3/cxgb3_main.c
+++ linux-2.6.20-rc1/drivers/net/cxgb3/cxgb3_main.c
@@ -1479,7 +1479,7 @@ static int in_range(int val, int lo, int
 	return val < 0 || (val <= hi && val >= lo);
 }
 
-static int cxgb_extension_ioctl(struct net_device *dev, void __user * useraddr)
+static int cxgb_extension_ioctl(struct net_device *dev, void __user *useraddr)
 {
 	int ret;
 	u32 cmd;
Index: linux-2.6.20-rc1/drivers/net/cxgb3/cxgb3_offload.h
===================================================================
--- linux-2.6.20-rc1.orig/drivers/net/cxgb3/cxgb3_offload.h
+++ linux-2.6.20-rc1/drivers/net/cxgb3/cxgb3_offload.h
@@ -64,16 +64,16 @@ void cxgb3_unregister_client(struct cxgb
 void cxgb3_add_clients(struct t3cdev *tdev);
 void cxgb3_remove_clients(struct t3cdev *tdev);
 
-typedef int (*cxgb3_cpl_handler_func) (struct t3cdev * dev,
-				       struct sk_buff * skb, void *ctx);
+typedef int (*cxgb3_cpl_handler_func)(struct t3cdev *dev,
+				      struct sk_buff *skb, void *ctx);
 
 struct cxgb3_client {
 	char *name;
 	void (*add) (struct t3cdev *);
 	void (*remove) (struct t3cdev *);
 	cxgb3_cpl_handler_func *handlers;
-	int (*redirect) (void *ctx, struct dst_entry * old,
-			 struct dst_entry * new, struct l2t_entry * l2t);
+	int (*redirect)(void *ctx, struct dst_entry *old,
+			struct dst_entry *new, struct l2t_entry *l2t);
 	struct list_head client_list;
 };
 
@@ -113,7 +113,7 @@ enum {
 	CPL_RET_UNKNOWN_TID = 4	/* unexpected unknown TID */
 };
 
-typedef int (*cpl_handler_func) (struct t3cdev * dev, struct sk_buff * skb);
+typedef int (*cpl_handler_func)(struct t3cdev *dev, struct sk_buff *skb);
 
 /*
  * Returns a pointer to the first byte of the CPL header in an sk_buff that
Index: linux-2.6.20-rc1/drivers/net/cxgb3/l2t.h
===================================================================
--- linux-2.6.20-rc1.orig/drivers/net/cxgb3/l2t.h
+++ linux-2.6.20-rc1/drivers/net/cxgb3/l2t.h
@@ -80,8 +80,8 @@ struct l2t_data {
 	struct l2t_entry l2tab[0];
 };
 
-typedef void (*arp_failure_handler_func) (struct t3cdev * dev,
-					  struct sk_buff * skb);
+typedef void (*arp_failure_handler_func)(struct t3cdev *dev,
+					 struct sk_buff *skb);
 
 /*
  * Callback stored in an skb to handle address resolution failure.
Index: linux-2.6.20-rc1/drivers/net/cxgb3/sge.c
===================================================================
--- linux-2.6.20-rc1.orig/drivers/net/cxgb3/sge.c
+++ linux-2.6.20-rc1/drivers/net/cxgb3/sge.c
@@ -426,7 +426,7 @@ static void recycle_rx_buf(struct adapte
  *	of the SW ring.
  */
 static void *alloc_ring(struct pci_dev *pdev, size_t nelem, size_t elem_size,
-			size_t sw_size, dma_addr_t * phys, void *metadata)
+			size_t sw_size, dma_addr_t *phys, void *metadata)
 {
 	size_t len = nelem * elem_size;
 	void *s = NULL;
@@ -2263,7 +2263,7 @@ static irqreturn_t t3b_intr_napi(int irq
  *	(MSI-X, MSI, or legacy) and whether NAPI will be used to service the
  *	response queues.
  */
-intr_handler_t t3_intr_handler(struct adapter * adap, int polling)
+intr_handler_t t3_intr_handler(struct adapter *adap, int polling)
 {
 	if (adap->flags & USING_MSIX)
 		return polling ? t3_sge_intr_msix_napi : t3_sge_intr_msix;
Index: linux-2.6.20-rc1/drivers/net/cxgb3/t3_hw.c
===================================================================
--- linux-2.6.20-rc1.orig/drivers/net/cxgb3/t3_hw.c
+++ linux-2.6.20-rc1/drivers/net/cxgb3/t3_hw.c
@@ -483,22 +483,22 @@ struct t3_vpd {
 	u8 id_data[16];
 	u8 vpdr_tag;
 	u8 vpdr_len[2];
-	 VPD_ENTRY(pn, 16);	/* part number */
-	 VPD_ENTRY(ec, 16);	/* EC level */
-	 VPD_ENTRY(sn, 16);	/* serial number */
-	 VPD_ENTRY(na, 12);	/* MAC address base */
-	 VPD_ENTRY(cclk, 6);	/* core clock */
-	 VPD_ENTRY(mclk, 6);	/* mem clock */
-	 VPD_ENTRY(uclk, 6);	/* uP clk */
-	 VPD_ENTRY(mdc, 6);	/* MDIO clk */
-	 VPD_ENTRY(mt, 2);	/* mem timing */
-	 VPD_ENTRY(xaui0cfg, 6);	/* XAUI0 config */
-	 VPD_ENTRY(xaui1cfg, 6);	/* XAUI1 config */
-	 VPD_ENTRY(port0, 2);	/* PHY0 complex */
-	 VPD_ENTRY(port1, 2);	/* PHY1 complex */
-	 VPD_ENTRY(port2, 2);	/* PHY2 complex */
-	 VPD_ENTRY(port3, 2);	/* PHY3 complex */
-	 VPD_ENTRY(rv, 1);	/* csum */
+	VPD_ENTRY(pn, 16);	/* part number */
+	VPD_ENTRY(ec, 16);	/* EC level */
+	VPD_ENTRY(sn, 16);	/* serial number */
+	VPD_ENTRY(na, 12);	/* MAC address base */
+	VPD_ENTRY(cclk, 6);	/* core clock */
+	VPD_ENTRY(mclk, 6);	/* mem clock */
+	VPD_ENTRY(uclk, 6);	/* uP clk */
+	VPD_ENTRY(mdc, 6);	/* MDIO clk */
+	VPD_ENTRY(mt, 2);	/* mem timing */
+	VPD_ENTRY(xaui0cfg, 6);	/* XAUI0 config */
+	VPD_ENTRY(xaui1cfg, 6);	/* XAUI1 config */
+	VPD_ENTRY(port0, 2);	/* PHY0 complex */
+	VPD_ENTRY(port1, 2);	/* PHY1 complex */
+	VPD_ENTRY(port2, 2);	/* PHY2 complex */
+	VPD_ENTRY(port3, 2);	/* PHY3 complex */
+	VPD_ENTRY(rv, 1);	/* csum */
 	u32 pad;		/* for multiple-of-4 sizing and alignment */
 };
 
@@ -611,7 +611,7 @@ static int get_vpd_params(struct adapter
 	 * Card information is normally at VPD_BASE but some early cards had
 	 * it at 0.
 	 */
-	ret = t3_seeprom_read(adapter, VPD_BASE, (u32 *) & vpd);
+	ret = t3_seeprom_read(adapter, VPD_BASE, (u32 *)&vpd);
 	if (ret)
 		return ret;
 	addr = vpd.id_tag == 0x82 ? VPD_BASE : 0;
@@ -789,7 +789,7 @@ int t3_read_flash(struct adapter *adapte
  *	at the given address.
  */
 static int t3_write_flash(struct adapter *adapter, unsigned int addr,
-			  unsigned int n, const u8 * data)
+			  unsigned int n, const u8 *data)
 {
 	int ret;
 	u32 buf[64];
@@ -899,7 +899,7 @@ static int t3_flash_erase_sectors(struct
  *	data, followed by 4 bytes of FW version, followed by the 32-bit
  *	1's complement checksum of the whole image.
  */
-int t3_load_fw(struct adapter *adapter, const u8 * fw_data, unsigned int size)
+int t3_load_fw(struct adapter *adapter, const u8 *fw_data, unsigned int size)
 {
 	u32 csum;
 	unsigned int i;
Index: linux-2.6.20-rc1/drivers/net/cxgb3/t3cdev.h
===================================================================
--- linux-2.6.20-rc1.orig/drivers/net/cxgb3/t3cdev.h
+++ linux-2.6.20-rc1/drivers/net/cxgb3/t3cdev.h
@@ -58,10 +58,10 @@ struct t3cdev {
 	struct list_head ofld_dev_list;	/* for list linking */
 	struct net_device *lldev;	/* LL dev associated with T3C messages */
 	struct proc_dir_entry *proc_dir;	/* root of proc dir for this T3C */
-	int (*send) (struct t3cdev * dev, struct sk_buff * skb);
-	int (*recv) (struct t3cdev * dev, struct sk_buff ** skb, int n);
-	int (*ctl) (struct t3cdev * dev, unsigned int req, void *data);
-	void (*neigh_update) (struct t3cdev * dev, struct neighbour * neigh);
+	int (*send)(struct t3cdev *dev, struct sk_buff *skb);
+	int (*recv)(struct t3cdev *dev, struct sk_buff **skb, int n);
+	int (*ctl)(struct t3cdev *dev, unsigned int req, void *data);
+	void (*neigh_update)(struct t3cdev *dev, struct neighbour *neigh);
 	void *priv;		/* driver private data */
 	void *l2opt;		/* optional layer 2 data */
 	void *l3opt;		/* optional layer 3 data */
#<EOF>

	-`J'
-- 

[PATCH 0/10] cxgb3: Chelsio T3 1G/10G ethernet device driver

[Divy Le Ray]

Jeff,

I resubmit the patch supporting the latest Chelsio T3 adapter.
It incorporates Arjan's feedbacks:
- remove unnecessary ifdefs
- updates the pci ressource managment
- add flush after register write.

It is built against Linus'tree.

A corresponding monolithic patch is available at this URL:
http://service.chelsio.com/kernel.org/cxgb3.patch.bz2

This driver is required by the Chelsio T3 RDMA driver
which was updated on 12/20/2006.

Cheers,
Divy

[PATCH 0/10] cxgb3: Chelsio T3 1G/10G ethernet device driver

[Divy Le Ray]

Hi,

I resubmit the patch supporting the latest Chelsio T3 adapter.
It incorporates feedbacks from Stephen:
- per port data accessed through netdev_priv()
- remove locking in netpoll() method

It also adapts to the new workqueue rules.

This patch adds support for the latest Chelsio adapter, T3. It is built
against 2.6.19.

A corresponding monolithic patch against 2.6.19 is posted at the
following URL: http://service.chelsio.com/kernel.org/cxgb3.patch.bz2

We wish this patch to be considered for inclusion in 2.6.20. This driver
is required by the Chelsio T3 RDMA driver which was updated on 12/02/2006.

Cheers,
Divy

Re: [PATCH 0/10] cxgb3: Chelsio T3 1G/10G ethernet device driver

[Stephen Hemminger]

Minor style stuff (that can be fixed later).
1) /* C style comments */ are preferred over // C++ style
2) Please use C99 style structure initializers especially for OS
   interface structures like ops for MII.

[PATCH 0/10] cxgb3: Chelsio T3 1G/10G ethernet device driver

[Divy Le Ray]

Hi,

I resubmit the patch supporting the latest Chelsio T3 adapter.
It incoporpates feedbacks from Stephen and Jan.

This patch adds support for the latest Chelsio adapter, T3. It is built
against 2.6.19.

A corresponding monolithic patch against 2.6.19 is posted at the
following URL: http://service.chelsio.com/kernel.org/cxgb3.patch.bz2

We wish this patch to be considered for inclusion in 2.6.20. This driver
is required by the Chelsio T3 RDMA driver which was updated on 12/02/2006.

Cheers,
Divy

[PATCH 0/10] cxgb3: Chelsio T3 1G/10G ethernet device driver

[Divy Le Ray]

Hi,

Based on Arnd's feedback, I re-submit the patch supporting the latest
Chelsio T3 adapter in inlined mails.  Some header files were trimmed
down to reduce the code footprint.

This patch adds support for the latest Chelsio adapter, T3.  It is built
against 2.6.19-rc6.

A corresponding monolithic patch against 2.6.19-rc6 is posted at the
following URL: http://service.chelsio.com/kernel.org/cxgb3.patch.bz2

We wish this patch to be considered for inclusion in 2.6.20. This driver
is required by the Chelsio T3 RDMA driver which was posted on 11/15/2006.

Cheers,
Divy