From: Andrew Lunn <andrew@lunn.ch>
To: Birger Koblitz <mail@birger-koblitz.de>
Cc: Maxime Chevallier <maxime.chevallier@bootlin.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
linux-usb@vger.kernel.org, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 5/9] ax88179_178a: Add support for ethtool pause parameter configuration
Date: Wed, 1 Jul 2026 19:05:12 +0200 [thread overview]
Message-ID: <46553470-9be3-4ae0-824d-ae85441c920d@lunn.ch> (raw)
In-Reply-To: <d2edb164-91c8-40e4-a104-db690609cb57@birger-koblitz.de>
On Wed, Jul 01, 2026 at 06:22:31PM +0200, Birger Koblitz wrote:
> Hi Andrew,
>
> thanks for reviewing this patch-series! I will answer to the other questions later,
> so that the answers stay together. But it is probably best if I give this answer
> immediately:
> On 7/1/26 17:08, Andrew Lunn wrote:
> > > > +static void ax88179a_get_pauseparam(struct net_device *net, struct ethtool_pauseparam *pause)
> > > > + if (!(bmcr & BMCR_ANENABLE)) {
> > > > + pause->autoneg = 0;
> > > > + pause->rx_pause = 0;
> > > > + pause->tx_pause = 0;
> > > The best way to have this correct is to use phylink, but for that you'd need to
> > > have a proper PHY driver instead of using the mii_ API here.
> >
> > I said the some to one of the other patches.
> >
> > Do we know what PHYs are being used? Can register 2 and 3 be read to
> > get the PHY IDs?
> >
> > Andrew
>
> I tested
> id1 = ax88179_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
> id2 = ax88179_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
>
> and got:
Thanks for these numbers.
> Renkforce AX88179A: ID1 7c9f, ID2 7061
> Delock AX88279 ID1 03a2, ID2 a411
air_en8811h.c:#define EN8811H_PHY_ID 0x03a2a411
> UGreen AX88772D ID1 e65b, ID2 2c61
> TP-Link AX88179A ID1 e65b, ID2 2c61
The two ID registers contain part of an OUI, but it has some bits
missing. So it is not so easy to look it up.
However, anything using the MII framework basically assumes a very
simple PHY and only looks at the 802.3 defined registers. So the
genphy generic PHY driver might be sufficient for when there is not a
specific driver. At lot depends on how much extra code there is
accessing the PHY registers in the driver.
Andrew
next prev parent reply other threads:[~2026-07-01 17:05 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-01 5:42 [PATCH 0/9] ax88179_178a: Add support for AX88179A-based chips Birger Koblitz
2026-07-01 5:42 ` [PATCH 1/9] ax88179_178a: Fix endianness of pause watermark register Birger Koblitz
2026-07-01 14:57 ` Andrew Lunn
2026-07-01 5:42 ` [PATCH 2/9] ax88179_178a: Add HW support for AX179A-based chips Birger Koblitz
2026-07-01 15:05 ` Andrew Lunn
2026-07-01 5:42 ` [PATCH 3/9] ax88179_178a: Add support for AX88179A MMD access Birger Koblitz
2026-07-01 9:53 ` Maxime Chevallier
2026-07-01 5:42 ` [PATCH 4/9] ax88179_178a: Obtain speed and duplex from Interrupt URB Birger Koblitz
2026-07-01 5:42 ` [PATCH 5/9] ax88179_178a: Add support for ethtool pause parameter configuration Birger Koblitz
2026-07-01 10:04 ` Maxime Chevallier
2026-07-01 15:08 ` Andrew Lunn
2026-07-01 16:22 ` Birger Koblitz
2026-07-01 17:05 ` Andrew Lunn [this message]
2026-07-01 17:45 ` Birger Koblitz
2026-07-01 18:41 ` Andrew Lunn
2026-07-01 5:42 ` [PATCH 6/9] ax88179_178a: Add VLAN offload support for AX88179A Birger Koblitz
2026-07-01 5:42 ` [PATCH 7/9] ax88179_178a: Add ethtool get_drvinfo Birger Koblitz
2026-07-01 5:42 ` [PATCH 8/9] ax88179_178a: Add support for AX88179A/772D/279 EEPROM access Birger Koblitz
2026-07-01 5:42 ` [PATCH 9/9] ax88179_178a: Add AX179A/AX279 multicast configuration Birger Koblitz
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