* SRIOV fails with "not enough MMIO resources"
@ 2009-06-08 15:59 Sreenivasa Honnur
2009-06-09 6:10 ` Yu Zhao
0 siblings, 1 reply; 6+ messages in thread
From: Sreenivasa Honnur @ 2009-06-08 15:59 UTC (permalink / raw)
To: netdev; +Cc: Sivakumar Subramani
Hi,
I added pci_enable_sriov / pci_disable_sriov in probe and remove
function for Neterion X3100 card to test SRIOV feature. While testing I
got following error.
Jun 8 00:02:59 bethweidel kernel: vxge: Copyright(c) 2002-2009 Neterion
Inc Jun 8 00:02:59 bethweidel kernel: vxge: Driver version:
2.0.1.17129-k Jun 8 00:02:59 bethweidel kernel: vxge 0000:03:00.0: PCI
INT A -> GSI 16 (level, low) -> IRQ 16 Jun 8 00:02:59 bethweidel kernel:
res->parent is ffff88013f129d28 for 2 Jun 8 00:02:59 bethweidel kernel:
res->parent is ffff88013f129d28 for 4 Jun 8 00:02:59 bethweidel kernel:
nres = 2 - iov->nres = 3 Jun 8 00:02:59 bethweidel kernel: vxge
0000:03:00.0: not enough MMIO resources for SR-IOV ----> ERROR Jun 8
00:02:59 bethweidel kernel: pci_enable_sriov returned -12 Jun 8 00:02:59
bethweidel kernel: eth2: SERIAL NUMBER: SXC0919196 Jun 8 00:02:59
bethweidel kernel: eth2: PART NUMBER: X3110SR0003
When I dumped the config space of SRIOV Capability, I found BAR0 of VFs
was not configured by BIOS and it was zero. So I added following
"quirk_vxge_sriov" quirk function to configure the BAR2 of PF as BAR0 of
VFs.
Now lspci shows proper value. But I am still get same error. The code
that dumps this error is as follow. Here I trying to find out the reason
why res->parent is not updated for BAR0 of VF. From the above log, I can
see that Bar2 and BAR4's res->parent are update.
Any possible reason why res->parent of VF's BAR0 is not updated?
sriov_enable :
--------------
nres = 0;
for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
res = dev->resource + PCI_IOV_RESOURCES + i;
if (res->parent) {
printk("res->parent is %llx for %d \n", res->parent,i );
nres++;
}
}
printk("nres = %d - iov->nres = %d \n", nres, iov->nres);
if (nres != iov->nres) {
dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
return -ENOMEM;
}
quirk_vxge_sriov:
-----------------
static void __devinit quirk_vxge_sriov(struct pci_dev *dev) {
int pos, flags;
u32 bar, start, size;
printk("Entering quirk_vxge_sriov ...\n");
if (PAGE_SIZE > 0x10000) {
printk("Returning quirk_vxge_sriov @%d \n", __LINE__);
return;
}
pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
printk("the pos is %d \n", pos);
if (!pos) {
printk("Returning quirk_vxge_sriov @%d \n", __LINE__);
return;
}
pci_read_config_dword(dev, pos + PCI_SRIOV_BAR, &bar);
if (bar & PCI_BASE_ADDRESS_MEM_MASK)
{
printk("Returning quirk_vxge_sriov @%d \n", __LINE__);
return;
}
start = pci_resource_start(dev, 4);
size = pci_resource_len(dev, 4);
printk("Bar4 start %llx - size %llx \n", start, size);
if (!start || size != 0x2000000 || start & (size - 1)) {
printk("Returning quirk_vxge_sriov @%d \n", __LINE__);
return;
}
pci_resource_flags(dev, 4) = 0;
pci_write_config_dword(dev, PCI_BASE_ADDRESS_4, 0);
pci_write_config_dword(dev, pos + PCI_SRIOV_BAR, start);
pci_read_config_dword(dev, pos+PCI_SRIOV_BAR,&bar);
printk("VF's Bar0 is %llx \n", bar);
dev_info(&dev->dev, "use Flash Memory Space for SR-IOV BARs\n");
printk("Exiting quirk_vxge_sriov ...\n"); }
Thanks,
~Siva
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: SRIOV fails with "not enough MMIO resources"
2009-06-08 15:59 SRIOV fails with "not enough MMIO resources" Sreenivasa Honnur
@ 2009-06-09 6:10 ` Yu Zhao
2009-06-16 12:49 ` Sivakumar Subramani
0 siblings, 1 reply; 6+ messages in thread
From: Yu Zhao @ 2009-06-09 6:10 UTC (permalink / raw)
To: Sreenivasa Honnur; +Cc: netdev@vger.kernel.org, Sivakumar Subramani
Sreenivasa Honnur wrote:
> Hi,
>
> I added pci_enable_sriov / pci_disable_sriov in probe and remove
> function for Neterion X3100 card to test SRIOV feature. While testing I
> got following error.
>
> Jun 8 00:02:59 bethweidel kernel: vxge: Copyright(c) 2002-2009 Neterion
> Inc Jun 8 00:02:59 bethweidel kernel: vxge: Driver version:
> 2.0.1.17129-k Jun 8 00:02:59 bethweidel kernel: vxge 0000:03:00.0: PCI
> INT A -> GSI 16 (level, low) -> IRQ 16 Jun 8 00:02:59 bethweidel kernel:
> res->parent is ffff88013f129d28 for 2 Jun 8 00:02:59 bethweidel kernel:
> res->parent is ffff88013f129d28 for 4 Jun 8 00:02:59 bethweidel kernel:
> nres = 2 - iov->nres = 3 Jun 8 00:02:59 bethweidel kernel: vxge
> 0000:03:00.0: not enough MMIO resources for SR-IOV ----> ERROR Jun 8
> 00:02:59 bethweidel kernel: pci_enable_sriov returned -12 Jun 8 00:02:59
> bethweidel kernel: eth2: SERIAL NUMBER: SXC0919196 Jun 8 00:02:59
> bethweidel kernel: eth2: PART NUMBER: X3110SR0003
>
>
>
> When I dumped the config space of SRIOV Capability, I found BAR0 of VFs
> was not configured by BIOS and it was zero. So I added following
> "quirk_vxge_sriov" quirk function to configure the BAR2 of PF as BAR0 of
> VFs.
>
> Now lspci shows proper value. But I am still get same error. The code
> that dumps this error is as follow. Here I trying to find out the reason
> why res->parent is not updated for BAR0 of VF. From the above log, I can
> see that Bar2 and BAR4's res->parent are update.
>
> Any possible reason why res->parent of VF's BAR0 is not updated?
Is the size of the PF BAR 4 big enough to cover the VF MMIO area
indicated by VF BAR 0? (size of the PF BAR 4 >= size of VF BAR 0 * NumVFs).
Can you please post the whole dmesg? I might be able to root cause the
problem after looking at it.
>
> sriov_enable :
>
> --------------
>
> nres = 0;
>
> for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
>
> res = dev->resource + PCI_IOV_RESOURCES + i;
>
> if (res->parent) {
>
> printk("res->parent is %llx for %d \n", res->parent,i );
>
> nres++;
>
> }
>
> }
>
> printk("nres = %d - iov->nres = %d \n", nres, iov->nres);
>
> if (nres != iov->nres) {
>
> dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
>
> return -ENOMEM;
>
> }
>
>
>
> quirk_vxge_sriov:
>
> -----------------
>
> static void __devinit quirk_vxge_sriov(struct pci_dev *dev) {
>
> int pos, flags;
>
> u32 bar, start, size;
>
> printk("Entering quirk_vxge_sriov ...\n");
>
> if (PAGE_SIZE > 0x10000) {
>
> printk("Returning quirk_vxge_sriov @%d \n", __LINE__);
>
> return;
>
> }
>
> pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
>
> printk("the pos is %d \n", pos);
>
> if (!pos) {
>
> printk("Returning quirk_vxge_sriov @%d \n", __LINE__);
>
> return;
>
> }
>
> pci_read_config_dword(dev, pos + PCI_SRIOV_BAR, &bar);
>
> if (bar & PCI_BASE_ADDRESS_MEM_MASK)
>
> {
>
> printk("Returning quirk_vxge_sriov @%d \n", __LINE__);
>
> return;
>
> }
>
> start = pci_resource_start(dev, 4);
>
> size = pci_resource_len(dev, 4);
>
> printk("Bar4 start %llx - size %llx \n", start, size);
>
> if (!start || size != 0x2000000 || start & (size - 1)) {
>
> printk("Returning quirk_vxge_sriov @%d \n", __LINE__);
>
> return;
>
> }
>
> pci_resource_flags(dev, 4) = 0;
>
> pci_write_config_dword(dev, PCI_BASE_ADDRESS_4, 0);
>
> pci_write_config_dword(dev, pos + PCI_SRIOV_BAR, start);
>
> pci_read_config_dword(dev, pos+PCI_SRIOV_BAR,&bar);
>
> printk("VF's Bar0 is %llx \n", bar);
>
> dev_info(&dev->dev, "use Flash Memory Space for SR-IOV BARs\n");
>
> printk("Exiting quirk_vxge_sriov ...\n"); }
>
>
>
> Thanks,
>
> ~Siva
>
>
>
>
>
>
>
>
>
>
>
> --
> To unsubscribe from this list: send the line "unsubscribe netdev" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: SRIOV fails with "not enough MMIO resources"
2009-06-09 6:10 ` Yu Zhao
@ 2009-06-16 12:49 ` Sivakumar Subramani
2009-06-17 4:58 ` Yu Zhao
0 siblings, 1 reply; 6+ messages in thread
From: Sivakumar Subramani @ 2009-06-16 12:49 UTC (permalink / raw)
To: Yu Zhao; +Cc: netdev
[-- Attachment #1: Type: text/plain, Size: 4982 bytes --]
Hi,
Is the size of the PF BAR 4 big enough to cover the VF MMIO area
indicated by VF BAR 0? (size of the PF BAR 4 >= size of VF BAR 0 *
NumVFs).
Can you please post the whole dmesg? I might be able to root cause the
problem after looking at it.
<Siva>
Sorry for the delay in reply. I got the setup back today. The PF BAR4
size is 32M. BAR0 of each VF is 8M. I loading the driver with 4 VFs. I
am facing this problem, even if I load it with 3 VFs.
I have attached the code of sriov_init / sriov_enable / quirk_vxge_sriov
and the log of the debug statements that I have added in these function.
Please let you know your comments.
</Siva>
Thanks,
~Siva
-----Original Message-----
From: Yu Zhao [mailto:yu.zhao@intel.com]
Sent: Tuesday, June 09, 2009 11:40 AM
To: Sreenivasa Honnur
Cc: netdev@vger.kernel.org; Sivakumar Subramani
Subject: Re: SRIOV fails with "not enough MMIO resources"
Sreenivasa Honnur wrote:
> Hi,
>
> I added pci_enable_sriov / pci_disable_sriov in probe and remove
> function for Neterion X3100 card to test SRIOV feature. While testing
I
> got following error.
>
> Jun 8 00:02:59 bethweidel kernel: vxge: Copyright(c) 2002-2009
Neterion
> Inc Jun 8 00:02:59 bethweidel kernel: vxge: Driver version:
> 2.0.1.17129-k Jun 8 00:02:59 bethweidel kernel: vxge 0000:03:00.0: PCI
> INT A -> GSI 16 (level, low) -> IRQ 16 Jun 8 00:02:59 bethweidel
kernel:
> res->parent is ffff88013f129d28 for 2 Jun 8 00:02:59 bethweidel
kernel:
> res->parent is ffff88013f129d28 for 4 Jun 8 00:02:59 bethweidel
kernel:
> nres = 2 - iov->nres = 3 Jun 8 00:02:59 bethweidel kernel: vxge
> 0000:03:00.0: not enough MMIO resources for SR-IOV ----> ERROR Jun 8
> 00:02:59 bethweidel kernel: pci_enable_sriov returned -12 Jun 8
00:02:59
> bethweidel kernel: eth2: SERIAL NUMBER: SXC0919196 Jun 8 00:02:59
> bethweidel kernel: eth2: PART NUMBER: X3110SR0003
>
>
>
> When I dumped the config space of SRIOV Capability, I found BAR0 of
VFs
> was not configured by BIOS and it was zero. So I added following
> "quirk_vxge_sriov" quirk function to configure the BAR2 of PF as BAR0
of
> VFs.
>
> Now lspci shows proper value. But I am still get same error. The code
> that dumps this error is as follow. Here I trying to find out the
reason
> why res->parent is not updated for BAR0 of VF. From the above log, I
can
> see that Bar2 and BAR4's res->parent are update.
>
> Any possible reason why res->parent of VF's BAR0 is not updated?
Is the size of the PF BAR 4 big enough to cover the VF MMIO area
indicated by VF BAR 0? (size of the PF BAR 4 >= size of VF BAR 0 *
NumVFs).
Can you please post the whole dmesg? I might be able to root cause the
problem after looking at it.
>
> sriov_enable :
>
> --------------
>
> nres = 0;
>
> for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
>
> res = dev->resource + PCI_IOV_RESOURCES + i;
>
> if (res->parent) {
>
> printk("res->parent is %llx for %d \n", res->parent,i );
>
> nres++;
>
> }
>
> }
>
> printk("nres = %d - iov->nres = %d \n", nres, iov->nres);
>
> if (nres != iov->nres) {
>
> dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
>
> return -ENOMEM;
>
> }
>
>
>
> quirk_vxge_sriov:
>
> -----------------
>
> static void __devinit quirk_vxge_sriov(struct pci_dev *dev) {
>
> int pos, flags;
>
> u32 bar, start, size;
>
> printk("Entering quirk_vxge_sriov ...\n");
>
> if (PAGE_SIZE > 0x10000) {
>
> printk("Returning quirk_vxge_sriov @%d \n", __LINE__);
>
> return;
>
> }
>
> pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
>
> printk("the pos is %d \n", pos);
>
> if (!pos) {
>
> printk("Returning quirk_vxge_sriov @%d \n", __LINE__);
>
> return;
>
> }
>
> pci_read_config_dword(dev, pos + PCI_SRIOV_BAR, &bar);
>
> if (bar & PCI_BASE_ADDRESS_MEM_MASK)
>
> {
>
> printk("Returning quirk_vxge_sriov @%d \n", __LINE__);
>
> return;
>
> }
>
> start = pci_resource_start(dev, 4);
>
> size = pci_resource_len(dev, 4);
>
> printk("Bar4 start %llx - size %llx \n", start, size);
>
> if (!start || size != 0x2000000 || start & (size - 1)) {
>
> printk("Returning quirk_vxge_sriov @%d \n", __LINE__);
>
> return;
>
> }
>
> pci_resource_flags(dev, 4) = 0;
>
> pci_write_config_dword(dev, PCI_BASE_ADDRESS_4, 0);
>
> pci_write_config_dword(dev, pos + PCI_SRIOV_BAR, start);
>
> pci_read_config_dword(dev, pos+PCI_SRIOV_BAR,&bar);
>
> printk("VF's Bar0 is %llx \n", bar);
>
> dev_info(&dev->dev, "use Flash Memory Space for SR-IOV BARs\n");
>
> printk("Exiting quirk_vxge_sriov ...\n"); }
>
>
>
> Thanks,
>
> ~Siva
>
>
>
>
>
>
>
>
>
>
>
> --
> To unsubscribe from this list: send the line "unsubscribe netdev" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
[-- Attachment #2: src_code --]
[-- Type: application/octet-stream, Size: 9205 bytes --]
static int sriov_init(struct pci_dev *dev, int pos)
{
int i;
int rc;
int nres;
u32 pgsz;
u16 ctrl, total, offset, stride;
struct pci_sriov *iov;
struct resource *res;
struct pci_dev *pdev;
printk("Entering sriov_init ... %lx \n",dev->vendor);
if (dev->pcie_type != PCI_EXP_TYPE_RC_END &&
dev->pcie_type != PCI_EXP_TYPE_ENDPOINT)
return -ENODEV;
pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
if (ctrl & PCI_SRIOV_CTRL_VFE) {
pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
ssleep(1);
}
pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
if (!total)
return 0;
ctrl = 0;
list_for_each_entry(pdev, &dev->bus->devices, bus_list)
if (pdev->is_physfn)
goto found;
pdev = NULL;
if (pci_ari_enabled(dev->bus))
ctrl |= PCI_SRIOV_CTRL_ARI;
found:
pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
pci_write_config_word(dev, pos + PCI_SRIOV_NUM_VF, total);
pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
if (!offset || (total > 1 && !stride))
return -EIO;
pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
pgsz &= ~((1 << i) - 1);
if (!pgsz)
return -EIO;
pgsz &= ~(pgsz - 1);
pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
nres = 0;
for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
printk("Loop is %d \n", i);
res = dev->resource + PCI_IOV_RESOURCES + i;
i += __pci_read_base(dev, pci_bar_unknown, res,
pos + PCI_SRIOV_BAR + i * 4);
printk("i is %d \n", i);
if (!res->flags)
continue;
if (resource_size(res) & (PAGE_SIZE - 1)) {
rc = -EIO;
goto failed;
}
res->end = res->start + resource_size(res) * total - 1;
printk("res->start - %llx \n", res->start);
printk("res->end- %llx \n", res->end);
printk("total is %d \n", total);
printk("size is %llx \n", resource_size(res) );
nres++;
}
iov = kzalloc(sizeof(*iov), GFP_KERNEL);
if (!iov) {
rc = -ENOMEM;
goto failed;
}
iov->pos = pos;
iov->nres = nres;
iov->ctrl = ctrl;
iov->total = total;
iov->offset = offset;
iov->stride = stride;
iov->pgsz = pgsz;
iov->self = dev;
pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
if (pdev)
iov->dev = pci_dev_get(pdev);
else {
iov->dev = dev;
mutex_init(&iov->lock);
}
dev->sriov = iov;
dev->is_physfn = 1;
printk("Exiting sriov_init ... \n");
return 0;
failed:
for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
res = dev->resource + PCI_IOV_RESOURCES + i;
res->flags = 0;
}
return rc;
}
static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
{
int rc;
int i, j;
int nres;
u16 offset, stride, initial;
struct resource *res;
struct pci_dev *pdev;
struct pci_sriov *iov = dev->sriov;
if (!nr_virtfn)
return 0;
if (iov->nr_virtfn)
return -EINVAL;
pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
if (initial > iov->total ||
(!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total)))
return -EIO;
if (nr_virtfn < 0 || nr_virtfn > iov->total ||
(!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
return -EINVAL;
pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &offset);
pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &stride);
if (!offset || (nr_virtfn > 1 && !stride))
return -EIO;
nres = 0;
for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
res = dev->resource + PCI_IOV_RESOURCES + i;
if (res->parent) {
printk("res->parent is %llx for %d \n", res->parent,i );
nres++;
}
}
printk("nres = %d - iov->nres = %d \n", nres, iov->nres);
if (nres != iov->nres) {
dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
return -ENOMEM;
}
iov->offset = offset;
iov->stride = stride;
if (virtfn_bus(dev, nr_virtfn - 1) > dev->bus->subordinate) {
dev_err(&dev->dev, "SR-IOV: bus number out of range\n");
return -ENOMEM;
}
if (iov->link != dev->devfn) {
pdev = pci_get_slot(dev->bus, iov->link);
if (!pdev)
return -ENODEV;
pci_dev_put(pdev);
if (!pdev->is_physfn)
return -ENODEV;
rc = sysfs_create_link(&dev->dev.kobj,
&pdev->dev.kobj, "dep_link");
if (rc)
return rc;
}
iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
pci_block_user_cfg_access(dev);
pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
msleep(100);
pci_unblock_user_cfg_access(dev);
iov->initial = initial;
if (nr_virtfn < initial)
initial = nr_virtfn;
for (i = 0; i < initial; i++) {
rc = virtfn_add(dev, i, 0);
if (rc)
goto failed;
}
if (iov->cap & PCI_SRIOV_CAP_VFM) {
rc = sriov_enable_migration(dev, nr_virtfn);
if (rc)
goto failed;
}
kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
iov->nr_virtfn = nr_virtfn;
return 0;
failed:
for (j = 0; j < i; j++)
virtfn_remove(dev, j, 0);
iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
pci_block_user_cfg_access(dev);
pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
ssleep(1);
pci_unblock_user_cfg_access(dev);
if (iov->link != dev->devfn)
sysfs_remove_link(&dev->dev.kobj, "dep_link");
return rc;
}
#ifdef CONFIG_PCI_IOV
/*
* For Xframe 3100 SR-IOV NIC, if BIOS doesn't allocate resources for the
* SR-IOV BARs, zero the Flash BAR and program the SR-IOV BARs to use the
* old Flash Memory Space.
*/
static void __devinit quirk_vxge_sriov(struct pci_dev *dev)
{
int pos, flags;
u32 bar, start, size;
printk("Entering quirk_vxge_sriov ...\n");
if (PAGE_SIZE > 0x10000) {
printk("Returning quirk_vxge_sriov @%d \n", __LINE__);
return;
}
#if 0
flags = pci_resource_flags(dev, 0);
if ((flags & PCI_BASE_ADDRESS_SPACE) !=
PCI_BASE_ADDRESS_SPACE_MEMORY ||
(flags & PCI_BASE_ADDRESS_MEM_TYPE_MASK) !=
PCI_BASE_ADDRESS_MEM_TYPE_32) {
printk("Returning quirk_vxge_sriov @%d \n", __LINE__);
return;
}
#endif
pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
printk("the pos is %x \n", pos);
if (!pos) {
printk("Returning quirk_vxge_sriov @%d \n", __LINE__);
return;
}
pci_read_config_dword(dev, pos + PCI_SRIOV_BAR, &bar);
printk("Initially the VF's BAR0 is %llx \n", bar);
if (bar & PCI_BASE_ADDRESS_MEM_MASK)
{
printk("Returning quirk_vxge_sriov @%d \n", __LINE__);
return;
}
start = pci_resource_start(dev, 4);
size = pci_resource_len(dev, 4);
printk("Bar4 start : %llx - size : %llx \n", start, size);
if (!start || size != 0x2000000 || start & (size - 1)) {
printk("Returning quirk_vxge_sriov @%d \n", __LINE__);
return;
}
pci_resource_flags(dev, 4) = 0;
pci_write_config_dword(dev, PCI_BASE_ADDRESS_4, 0);
pci_write_config_dword(dev, pos + PCI_SRIOV_BAR, start);
pci_read_config_dword(dev, pos+PCI_SRIOV_BAR,&bar);
printk("VF's Bar0 is %llx \n", bar);
dev_info(&dev->dev, "use Flash Memory Space for SR-IOV BARs\n");
printk("Exiting quirk_vxge_sriov ...\n");
}
[-- Attachment #3: log --]
[-- Type: application/octet-stream, Size: 44392 bytes --]
Linux version 2.6.30-rc8 (root@arctic.pc.s2io.com) (gcc version 4.1.2 20080704 (Red Hat 4.1.2-44)) #13 SMP Tue Jun 16 05:24:45 PDT 2009
Command line: ro root=/dev/VolGroup00/LogVol00 rhgb quiet crashkernel=128M@16M
KERNEL supported cpus:
Intel GenuineIntel
AMD AuthenticAMD
Centaur CentaurHauls
BIOS-provided physical RAM map:
BIOS-e820: 0000000000000000 - 000000000009e800 (usable)
BIOS-e820: 000000000009e800 - 00000000000a0000 (reserved)
BIOS-e820: 00000000000e4000 - 0000000000100000 (reserved)
BIOS-e820: 0000000000100000 - 00000000bf7b0000 (usable)
BIOS-e820: 00000000bf7b0000 - 00000000bf7be000 (ACPI data)
BIOS-e820: 00000000bf7be000 - 00000000bf7d0000 (ACPI NVS)
BIOS-e820: 00000000bf7d0000 - 00000000bf7e0000 (reserved)
BIOS-e820: 00000000bf7ec000 - 00000000c0000000 (reserved)
BIOS-e820: 00000000fee00000 - 00000000fee01000 (reserved)
BIOS-e820: 00000000ffc00000 - 0000000100000000 (reserved)
BIOS-e820: 0000000100000000 - 0000000140000000 (usable)
DMI present.
AMI BIOS detected: BIOS may corrupt low RAM, working around it.
e820 update range: 0000000000000000 - 0000000000010000 (usable) ==> (reserved)
last_pfn = 0x140000 max_arch_pfn = 0x100000000
MTRR default type: uncachable
MTRR fixed ranges enabled:
00000-9FFFF write-back
A0000-BFFFF uncachable
C0000-CFFFF write-protect
D0000-DFFFF uncachable
E0000-E7FFF write-through
E8000-FFFFF write-protect
MTRR variable ranges enabled:
0 base 0000000000 mask FF00000000 write-back
1 base 0100000000 mask FFC0000000 write-back
2 base 00C0000000 mask FFC0000000 uncachable
3 base 00BF800000 mask FFFF800000 uncachable
4 disabled
5 disabled
6 disabled
7 disabled
e820 update range: 00000000bf800000 - 0000000100000000 (usable) ==> (reserved)
last_pfn = 0xbf7b0 max_arch_pfn = 0x100000000
init_memory_mapping: 0000000000000000-00000000bf7b0000
0000000000 - 00bf600000 page 2M
00bf600000 - 00bf7b0000 page 4k
kernel direct mapping tables up to bf7b0000 @ 10000-15000
init_memory_mapping: 0000000100000000-0000000140000000
0100000000 - 0140000000 page 2M
kernel direct mapping tables up to 140000000 @ 13000-19000
RAMDISK: 37ccc000 - 37fef489
ACPI: RSDP 00000000000f9a20 00014 (v00 ACPIAM)
ACPI: RSDT 00000000bf7b0000 0003C (v01 033009 RSDT1418 20090330 MSFT 00000097)
ACPI: FACP 00000000bf7b0200 00084 (v01 033009 FACP1418 20090330 MSFT 00000097)
ACPI: DSDT 00000000bf7b04c0 0604F (v01 1F280 1F280000 00000000 INTL 20051117)
ACPI: FACS 00000000bf7be000 00040
ACPI: APIC 00000000bf7b0390 000EA (v01 033009 APIC1418 20090330 MSFT 00000097)
ACPI: MCFG 00000000bf7b0480 0003C (v01 033009 OEMMCFG 20090330 MSFT 00000097)
ACPI: OEMB 00000000bf7be040 0007A (v01 033009 OEMB1418 20090330 MSFT 00000097)
ACPI: DMAR 00000000bf7be0c0 00128 (v01 AMI OEMDMAR 00000001 MSFT 00000097)
ACPI: SSDT 00000000bf7bf160 0249F (v01 DpgPmm CpuPm 00000012 INTL 20051117)
ACPI: Local APIC address 0xfee00000
No NUMA configuration found
Faking a node at 0000000000000000-0000000140000000
Bootmem setup node 0 0000000000000000-0000000140000000
NODE_DATA [0000000000014000 - 0000000000019fff]
bootmap [000000000001a000 - 0000000000041fff] pages 28
(8 early reservations) ==> bootmem [0000000000 - 0140000000]
#0 [0000000000 - 0000001000] BIOS data page ==> [0000000000 - 0000001000]
#1 [0000006000 - 0000008000] TRAMPOLINE ==> [0000006000 - 0000008000]
#2 [0000200000 - 0000d10ad0] TEXT DATA BSS ==> [0000200000 - 0000d10ad0]
#3 [0037ccc000 - 0037fef489] RAMDISK ==> [0037ccc000 - 0037fef489]
#4 [000009e800 - 0000100000] BIOS reserved ==> [000009e800 - 0000100000]
#5 [0000d11000 - 0000d111b8] BRK ==> [0000d11000 - 0000d111b8]
#6 [0000010000 - 0000013000] PGTABLE ==> [0000010000 - 0000013000]
#7 [0000013000 - 0000014000] PGTABLE ==> [0000013000 - 0000014000]
found SMP MP-table at [ffff8800000ff780] ff780
Reserving 128MB of memory at 16MB for crashkernel (System RAM: 5120MB)
[ffffe20000000000-ffffe200045fffff] PMD -> [ffff880028200000-ffff88002b9fffff] on node 0
Zone PFN ranges:
DMA 0x00000010 -> 0x00001000
DMA32 0x00001000 -> 0x00100000
Normal 0x00100000 -> 0x00140000
Movable zone start PFN for each node
early_node_map[3] active PFN ranges
0: 0x00000010 -> 0x0000009e
0: 0x00000100 -> 0x000bf7b0
0: 0x00100000 -> 0x00140000
On node 0 totalpages: 1046334
DMA zone: 56 pages used for memmap
DMA zone: 2936 pages reserved
DMA zone: 990 pages, LIFO batch:0
DMA32 zone: 14280 pages used for memmap
DMA32 zone: 765928 pages, LIFO batch:31
Normal zone: 3584 pages used for memmap
Normal zone: 258560 pages, LIFO batch:31
ACPI: PM-Timer IO Port: 0x808
ACPI: Local APIC address 0xfee00000
ACPI: LAPIC (acpi_id[0x01] lapic_id[0x10] enabled)
ACPI: LAPIC (acpi_id[0x02] lapic_id[0x12] enabled)
ACPI: LAPIC (acpi_id[0x03] lapic_id[0x14] enabled)
ACPI: LAPIC (acpi_id[0x04] lapic_id[0x16] enabled)
ACPI: LAPIC (acpi_id[0x05] lapic_id[0x84] disabled)
ACPI: LAPIC (acpi_id[0x06] lapic_id[0x85] disabled)
ACPI: LAPIC (acpi_id[0x07] lapic_id[0x86] disabled)
ACPI: LAPIC (acpi_id[0x08] lapic_id[0x87] disabled)
ACPI: LAPIC (acpi_id[0x09] lapic_id[0x88] disabled)
ACPI: LAPIC (acpi_id[0x0a] lapic_id[0x89] disabled)
ACPI: LAPIC (acpi_id[0x0b] lapic_id[0x8a] disabled)
ACPI: LAPIC (acpi_id[0x0c] lapic_id[0x8b] disabled)
ACPI: LAPIC (acpi_id[0x0d] lapic_id[0x8c] disabled)
ACPI: LAPIC (acpi_id[0x0e] lapic_id[0x8d] disabled)
ACPI: LAPIC (acpi_id[0x0f] lapic_id[0x8e] disabled)
ACPI: LAPIC (acpi_id[0x10] lapic_id[0x8f] disabled)
ACPI: LAPIC_NMI (acpi_id[0xff] dfl dfl lint[0x1])
ACPI: IOAPIC (id[0x01] address[0xfec00000] gsi_base[0])
IOAPIC[0]: apic_id 1, version 0, address 0xfec00000, GSI 0-23
ACPI: IOAPIC (id[0x03] address[0xfec80000] gsi_base[24])
IOAPIC[1]: apic_id 3, version 0, address 0xfec80000, GSI 24-47
ACPI: IOAPIC (id[0x05] address[0xfec80400] gsi_base[48])
IOAPIC[2]: apic_id 5, version 0, address 0xfec80400, GSI 48-71
ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level)
ACPI: IRQ0 used by override.
ACPI: IRQ2 used by override.
ACPI: IRQ9 used by override.
Using ACPI (MADT) for SMP configuration information
SMP: Allowing 16 CPUs, 12 hotplug CPUs
nr_irqs_gsi: 72
Allocating PCI resources starting at c4000000 (gap: c0000000:3ee00000)
NR_CPUS:255 nr_cpumask_bits:255 nr_cpu_ids:16 nr_node_ids:1
PERCPU: Embedded 24 pages at ffff88002ba00000, static data 69536 bytes
Built 1 zonelists in Node order, mobility grouping on. Total pages: 1025478
Policy zone: Normal
Kernel command line: ro root=/dev/VolGroup00/LogVol00 rhgb quiet crashkernel=128M@16M
Initializing CPU#0
NR_IRQS:4352
PID hash table entries: 4096 (order: 12, 32768 bytes)
Fast TSC calibration using PIT
Detected 2000.039 MHz processor.
Console: colour VGA+ 80x25
console [tty0] enabled
Checking aperture...
No AGP bridge found
PCI-DMA: Using software bounce buffering for IO (SWIOTLB)
Placing 64MB software IO TLB between ffff880020000000 - ffff880024000000
software IO TLB at phys 0x20000000 - 0x24000000
Memory: 3914408k/5242880k available (2832k kernel code, 1057544k absent, 270928k reserved, 1948k data, 416k init)
Calibrating delay loop (skipped), value calculated using timer frequency.. 4000.07 BogoMIPS (lpj=2000039)
Security Framework initialized
SELinux: Initializing.
SELinux: Starting in permissive mode
Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes)
Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes)
Mount-cache hash table entries: 256
CPU: Physical Processor ID: 1
CPU: Processor Core ID: 0
CPU: L1 I cache: 32K, L1 D cache: 32K
CPU: L2 cache: 256K
CPU: L3 cache: 4096K
CPU 0/0x10 -> Node 0
CPU0: Thermal monitoring enabled (TM1)
CPU 0 MCA banks CMCI:2 CMCI:3 CMCI:5 CMCI:6 SHD:8
using mwait in idle threads.
ACPI: Core revision 20090320
Setting APIC routing to physical flat
..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
CPU0: Intel(R) Xeon(R) CPU E5504 @ 2.00GHz stepping 05
Booting processor 1 APIC 0x12 ip 0x6000
Initializing CPU#1
Calibrating delay using timer specific routine.. 3998.91 BogoMIPS (lpj=1999457)
CPU: Physical Processor ID: 1
CPU: Processor Core ID: 1
CPU: L1 I cache: 32K, L1 D cache: 32K
CPU: L2 cache: 256K
CPU: L3 cache: 4096K
CPU 1/0x12 -> Node 0
CPU1: Thermal monitoring enabled (TM1)
CPU 1 MCA banks CMCI:2 CMCI:3 CMCI:5 SHD:6 SHD:8
CPU1: Intel(R) Xeon(R) CPU E5504 @ 2.00GHz stepping 05
Skipping synchronization checks as TSC is reliable.
Booting processor 2 APIC 0x14 ip 0x6000
Initializing CPU#2
Calibrating delay using timer specific routine.. 3998.91 BogoMIPS (lpj=1999458)
CPU: Physical Processor ID: 1
CPU: Processor Core ID: 2
CPU: L1 I cache: 32K, L1 D cache: 32K
CPU: L2 cache: 256K
CPU: L3 cache: 4096K
CPU 2/0x14 -> Node 0
CPU2: Thermal monitoring enabled (TM1)
CPU 2 MCA banks CMCI:2 CMCI:3 CMCI:5 SHD:6 SHD:8
CPU2: Intel(R) Xeon(R) CPU E5504 @ 2.00GHz stepping 05
Skipping synchronization checks as TSC is reliable.
Booting processor 3 APIC 0x16 ip 0x6000
Initializing CPU#3
Calibrating delay using timer specific routine.. 3998.91 BogoMIPS (lpj=1999457)
CPU: Physical Processor ID: 1
CPU: Processor Core ID: 3
CPU: L1 I cache: 32K, L1 D cache: 32K
CPU: L2 cache: 256K
CPU: L3 cache: 4096K
CPU 3/0x16 -> Node 0
CPU3: Thermal monitoring enabled (TM1)
CPU 3 MCA banks CMCI:2 CMCI:3 CMCI:5 SHD:6 SHD:8
CPU3: Intel(R) Xeon(R) CPU E5504 @ 2.00GHz stepping 05
Skipping synchronization checks as TSC is reliable.
Brought up 4 CPUs
Total of 4 processors activated (15996.82 BogoMIPS).
CPU0 attaching sched-domain:
domain 0: span 0-3 level MC
groups: 0 1 2 3
CPU1 attaching sched-domain:
domain 0: span 0-3 level MC
groups: 1 2 3 0
CPU2 attaching sched-domain:
domain 0: span 0-3 level MC
groups: 2 3 0 1
CPU3 attaching sched-domain:
domain 0: span 0-3 level MC
groups: 3 0 1 2
net_namespace: 1736 bytes
NET: Registered protocol family 16
ACPI: bus type pci registered
PCI: MCFG configuration 0: base e0000000 segment 0 buses 0 - 255
PCI: Not using MMCONFIG.
PCI: Using configuration type 1 for base access
bio: create slab <bio-0> at 0
ACPI: EC: Look up EC in DSDT
ACPI: Interpreter enabled
ACPI: (supports S0 S1 S5)
ACPI: Using IOAPIC for interrupt routing
PCI: MCFG configuration 0: base e0000000 segment 0 buses 0 - 255
PCI: MCFG area at e0000000 reserved in ACPI motherboard resources
PCI: Using MMCONFIG at e0000000 - efffffff
ACPI Warning (tbutils-0246): Incorrect checksum in table [OEMB] - EB, should be E8 [20090320]
ACPI: No dock devices found.
ACPI: PCI Root Bridge [PCI0] (0000:00)
pci 0000:00:00.0: PME# supported from D0 D3hot D3cold
pci 0000:00:00.0: PME# disabled
pci 0000:00:01.0: PME# supported from D0 D3hot D3cold
pci 0000:00:01.0: PME# disabled
pci 0000:00:03.0: PME# supported from D0 D3hot D3cold
pci 0000:00:03.0: PME# disabled
pci 0000:00:05.0: PME# supported from D0 D3hot D3cold
pci 0000:00:05.0: PME# disabled
pci 0000:00:07.0: PME# supported from D0 D3hot D3cold
pci 0000:00:07.0: PME# disabled
pci 0000:00:09.0: PME# supported from D0 D3hot D3cold
pci 0000:00:09.0: PME# disabled
pci 0000:00:16.0: reg 10 64bit mmio: [0xfbad8000-0xfbadbfff]
pci 0000:00:16.1: reg 10 64bit mmio: [0xfbadc000-0xfbadffff]
pci 0000:00:16.2: reg 10 64bit mmio: [0xfbae0000-0xfbae3fff]
pci 0000:00:16.3: reg 10 64bit mmio: [0xfbae4000-0xfbae7fff]
pci 0000:00:16.4: reg 10 64bit mmio: [0xfbae8000-0xfbaebfff]
pci 0000:00:16.5: reg 10 64bit mmio: [0xfbaec000-0xfbaeffff]
pci 0000:00:16.6: reg 10 64bit mmio: [0xfbaf0000-0xfbaf3fff]
pci 0000:00:16.7: reg 10 64bit mmio: [0xfbaf4000-0xfbaf7fff]
pci 0000:00:1a.0: reg 20 io port: [0xa080-0xa09f]
pci 0000:00:1a.1: reg 20 io port: [0xa400-0xa41f]
pci 0000:00:1a.2: reg 20 io port: [0xa480-0xa49f]
pci 0000:00:1a.7: reg 10 32bit mmio: [0xfbafa000-0xfbafa3ff]
pci 0000:00:1a.7: PME# supported from D0 D3hot D3cold
pci 0000:00:1a.7: PME# disabled
pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold
pci 0000:00:1c.0: PME# disabled
pci 0000:00:1c.4: PME# supported from D0 D3hot D3cold
pci 0000:00:1c.4: PME# disabled
pci 0000:00:1d.0: reg 20 io port: [0xa800-0xa81f]
pci 0000:00:1d.1: reg 20 io port: [0xa880-0xa89f]
pci 0000:00:1d.2: reg 20 io port: [0xac00-0xac1f]
pci 0000:00:1d.7: reg 10 32bit mmio: [0xfbafc000-0xfbafc3ff]
pci 0000:00:1d.7: PME# supported from D0 D3hot D3cold
pci 0000:00:1d.7: PME# disabled
pci 0000:00:1f.0: Force enabled HPET at 0xfed00000
pci 0000:00:1f.0: quirk: region 0800-087f claimed by ICH6 ACPI/GPIO/TCO
pci 0000:00:1f.0: quirk: region 0500-053f claimed by ICH6 GPIO
pci 0000:00:1f.0: ICH7 LPC Generic IO decode 1 PIO at 0a00 (mask 00ff)
pci 0000:00:1f.0: ICH7 LPC Generic IO decode 3 PIO at 0290 (mask 001f)
pci 0000:00:1f.0: ICH7 LPC Generic IO decode 4 PIO at 0ca0 (mask 000f)
pci 0000:00:1f.2: reg 10 io port: [0x00-0x07]
pci 0000:00:1f.2: reg 14 io port: [0x00-0x03]
pci 0000:00:1f.2: reg 18 io port: [0x00-0x07]
pci 0000:00:1f.2: reg 1c io port: [0x00-0x03]
pci 0000:00:1f.2: reg 20 io port: [0xff90-0xff9f]
pci 0000:00:1f.2: reg 24 io port: [0xffa0-0xffaf]
pci 0000:00:1f.3: reg 10 64bit mmio: [0xfbafe000-0xfbafe0ff]
pci 0000:00:1f.3: reg 20 io port: [0x400-0x41f]
pci 0000:00:1f.5: reg 10 io port: [0xbc00-0xbc07]
pci 0000:00:1f.5: reg 14 io port: [0xb880-0xb883]
pci 0000:00:1f.5: reg 18 io port: [0xb800-0xb807]
pci 0000:00:1f.5: reg 1c io port: [0xb480-0xb483]
pci 0000:00:1f.5: reg 20 io port: [0xb400-0xb40f]
pci 0000:00:1f.5: reg 24 io port: [0xb080-0xb08f]
pci 0000:0a:00.0: reg 10 32bit mmio: [0xfbe60000-0xfbe7ffff]
pci 0000:0a:00.0: reg 14 32bit mmio: [0xfbe40000-0xfbe5ffff]
pci 0000:0a:00.0: reg 18 io port: [0xe880-0xe89f]
pci 0000:0a:00.0: reg 1c 32bit mmio: [0xfbeb8000-0xfbebbfff]
pci 0000:0a:00.0: reg 30 32bit mmio: [0xfbe20000-0xfbe3ffff]
pci 0000:0a:00.0: PME# supported from D0 D3hot D3cold
pci 0000:0a:00.0: PME# disabled
Entering sriov_init ... 8086
Loop is 0
pci 0000:0a:00.0: reg 184 64bit mmio: [0x000000-0x003fff]
i is 1
res->start - 0
res->end- 1ffff
total is 8
size is 20000
Loop is 2
i is 2
Loop is 3
pci 0000:0a:00.0: reg 190 64bit mmio: [0x000000-0x003fff]
i is 4
res->start - 0
res->end- 1ffff
total is 8
size is 20000
Loop is 5
i is 5
Exiting sriov_init ...
pci 0000:0a:00.1: reg 10 32bit mmio: [0xfbee0000-0xfbefffff]
pci 0000:0a:00.1: reg 14 32bit mmio: [0xfbec0000-0xfbedffff]
pci 0000:0a:00.1: reg 18 io port: [0xec00-0xec1f]
pci 0000:0a:00.1: reg 1c 32bit mmio: [0xfbebc000-0xfbebffff]
pci 0000:0a:00.1: reg 30 32bit mmio: [0xfbe80000-0xfbe9ffff]
pci 0000:0a:00.1: PME# supported from D0 D3hot D3cold
pci 0000:0a:00.1: PME# disabled
Entering sriov_init ... 8086
Loop is 0
pci 0000:0a:00.1: reg 184 64bit mmio: [0x000000-0x003fff]
i is 1
res->start - 0
res->end- 1ffff
total is 8
size is 20000
Loop is 2
i is 2
Loop is 3
pci 0000:0a:00.1: reg 190 64bit mmio: [0x000000-0x003fff]
i is 4
res->start - 0
res->end- 1ffff
total is 8
size is 20000
Loop is 5
i is 5
Exiting sriov_init ...
pci 0000:00:01.0: bridge io port: [0xe000-0xefff]
pci 0000:00:01.0: bridge 32bit mmio: [0xfbe00000-0xfbefffff]
pci 0000:09:00.0: reg 10 64bit mmio: [0xfa800000-0xfaffffff]
pci 0000:09:00.0: reg 18 64bit mmio: [0xfa7ff000-0xfa7fffff]
pci 0000:09:00.0: reg 20 64bit mmio: [0xf8000000-0xf9ffffff]
pci 0000:09:00.0: reg 30 32bit mmio: [0xfbd80000-0xfbdfffff]
Entering quirk_vxge_sriov ...
the pos is 170
Initially the VF's BAR0 is c
Bar4 start : f8000000 - size : 2000000
VF's Bar0 is f800000c
pci 0000:09:00.0: use Flash Memory Space for SR-IOV BARs
Exiting quirk_vxge_sriov ...
pci 0000:09:00.0: supports D1 D2
pci 0000:09:00.0: PME# supported from D0 D1 D2 D3hot
pci 0000:09:00.0: PME# disabled
Entering sriov_init ... 17d5
Loop is 0
pci 0000:09:00.0: reg 194 64bit mmio: [0xf8000000-0xf87fffff]
i is 1
res->start - f8000000
res->end- ffffffff
total is 16
size is 8000000
Loop is 2
pci 0000:09:00.0: reg 19c 64bit mmio: [0x000000-0x001fff]
i is 3
res->start - 0
res->end- 1ffff
total is 16
size is 20000
Loop is 4
pci 0000:09:00.0: reg 1a4 64bit mmio: [0x000000-0x001fff]
i is 5
res->start - 0
res->end- 1ffff
total is 16
size is 20000
Exiting sriov_init ...
pci 0000:00:03.0: bridge 32bit mmio: [0xfbd00000-0xfbdfffff]
pci 0000:00:03.0: bridge 64bit mmio pref: [0xf8000000-0xfaffffff]
pci 0000:04:00.0: PXH quirk detected; SHPC device MSI disabled
pci 0000:04:00.0: PME# supported from D0 D3hot D3cold
pci 0000:04:00.0: PME# disabled
pci 0000:04:00.2: PXH quirk detected; SHPC device MSI disabled
pci 0000:04:00.2: PME# supported from D0 D3hot D3cold
pci 0000:04:00.2: PME# disabled
pci 0000:02:00.0: reg 10 io port: [0xdc00-0xdc07]
pci 0000:02:00.0: reg 14 io port: [0xd880-0xd883]
pci 0000:02:00.0: reg 18 io port: [0xd800-0xd807]
pci 0000:02:00.0: reg 1c io port: [0xd480-0xd483]
pci 0000:02:00.0: reg 20 io port: [0xd400-0xd40f]
pci 0000:02:00.0: reg 30 32bit mmio: [0xfbcf0000-0xfbcfffff]
pci 0000:00:1c.4: bridge io port: [0xd000-0xdfff]
pci 0000:00:1c.4: bridge 32bit mmio: [0xfbc00000-0xfbcfffff]
pci 0000:01:01.0: reg 10 32bit mmio: [0xf0000000-0xf7ffffff]
pci 0000:01:01.0: reg 14 io port: [0xc000-0xc0ff]
pci 0000:01:01.0: reg 18 32bit mmio: [0xfbbf0000-0xfbbfffff]
pci 0000:01:01.0: reg 30 32bit mmio: [0xfbbc0000-0xfbbdffff]
pci 0000:01:01.0: supports D1 D2
pci 0000:00:1e.0: transparent bridge
pci 0000:00:1e.0: bridge io port: [0xc000-0xcfff]
pci 0000:00:1e.0: bridge 32bit mmio: [0xfbb00000-0xfbbfffff]
pci 0000:00:1e.0: bridge 64bit mmio pref: [0xf0000000-0xf7ffffff]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.P0P1._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.P0P4._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.P0P8._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.NPE1._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.NPE3._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.NPE5._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.NPE7._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.NPE9._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.NPE9.PXHA._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.NPE9.PXHB._PRT]
ACPI: PCI Interrupt Link [LNKA] (IRQs 3 4 5 6 7 *10 11 12 14 15)
ACPI: PCI Interrupt Link [LNKB] (IRQs 3 4 5 6 7 *10 11 12 14 15)
ACPI: PCI Interrupt Link [LNKC] (IRQs 3 4 5 6 7 10 *11 12 14 15)
ACPI: PCI Interrupt Link [LNKD] (IRQs 3 4 *5 6 7 10 11 12 14 15)
ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 5 6 7 10 11 12 14 15) *0, disabled.
ACPI: PCI Interrupt Link [LNKF] (IRQs 3 4 5 *6 7 10 11 12 14 15)
ACPI: PCI Interrupt Link [LNKG] (IRQs 3 4 5 6 7 10 11 12 14 15) *0, disabled.
ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 5 6 *7 10 11 12 14 15)
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
PCI: Using ACPI for IRQ routing
pci 0000:09:00.0: BAR 4: can't allocate resource
NetLabel: Initializing
NetLabel: domain hash size = 128
NetLabel: protocols = UNLABELED CIPSOv4
NetLabel: unlabeled traffic allowed by default
DMAR:Host address width 40
DMAR:DRHD (flags: 0x00000001)base: 0x00000000fbffe000
DMAR:RMRR base: 0x00000000000ec000 end: 0x00000000000effff
DMAR:RMRR base: 0x00000000bf7ec000 end: 0x00000000bf7fffff
DMAR:Unknown DMAR structure type
hpet clockevent registered
HPET: 4 timers in total, 0 timers will be used for per-cpu timer
hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0, 0
hpet0: 4 comparators, 64-bit 14.318180 MHz counter
pnp: PnP ACPI init
ACPI: bus type pnp registered
pnp 00:01: mem resource (0xfbf00000-0xfbffffff) overlaps 0000:09:00.0 BAR 7 (0xf8000000-0xffffffff), disabling
pnp 00:01: mem resource (0xfc000000-0xfcffffff) overlaps 0000:09:00.0 BAR 7 (0xf8000000-0xffffffff), disabling
pnp 00:01: mem resource (0xfd000000-0xfdffffff) overlaps 0000:09:00.0 BAR 7 (0xf8000000-0xffffffff), disabling
pnp 00:01: mem resource (0xfe000000-0xfebfffff) overlaps 0000:09:00.0 BAR 7 (0xf8000000-0xffffffff), disabling
pnp 00:01: mem resource (0xfec8a000-0xfec8afff) overlaps 0000:09:00.0 BAR 7 (0xf8000000-0xffffffff), disabling
pnp 00:01: mem resource (0xfed10000-0xfed10fff) overlaps 0000:09:00.0 BAR 7 (0xf8000000-0xffffffff), disabling
pnp 00:0b: mem resource (0xfed1c000-0xfed1ffff) overlaps 0000:09:00.0 BAR 7 (0xf8000000-0xffffffff), disabling
pnp 00:0b: mem resource (0xfed20000-0xfed3ffff) overlaps 0000:09:00.0 BAR 7 (0xf8000000-0xffffffff), disabling
pnp 00:0b: mem resource (0xfed40000-0xfed8ffff) overlaps 0000:09:00.0 BAR 7 (0xf8000000-0xffffffff), disabling
pnp 00:0c: mem resource (0xfec00000-0xfec00fff) overlaps 0000:09:00.0 BAR 7 (0xf8000000-0xffffffff), disabling
pnp 00:0c: mem resource (0xfee00000-0xfee00fff) overlaps 0000:09:00.0 BAR 7 (0xf8000000-0xffffffff), disabling
pnp 00:0e: mem resource (0xfed90000-0xffffffff) overlaps 0000:09:00.0 BAR 7 (0xf8000000-0xffffffff), disabling
pnp: PnP ACPI: found 15 devices
ACPI: ACPI bus type pnp unregistered
system 00:0a: ioport range 0xa00-0xa0f has been reserved
system 00:0b: ioport range 0x4d0-0x4d1 has been reserved
system 00:0b: ioport range 0x800-0x87f has been reserved
system 00:0b: ioport range 0x500-0x57f could not be reserved
system 00:0d: iomem range 0xe0000000-0xefffffff has been reserved
system 00:0e: iomem range 0x0-0x9ffff could not be reserved
system 00:0e: iomem range 0xc0000-0xcffff has been reserved
system 00:0e: iomem range 0xe0000-0xfffff could not be reserved
system 00:0e: iomem range 0x100000-0xbf8fffff could not be reserved
pci 0000:0a:00.0: BAR 10: can't allocate mem resource [0xfbf00000-0xfbefffff]
pci 0000:0a:00.1: BAR 7: can't allocate mem resource [0xfbf00000-0xfbefffff]
pci 0000:0a:00.1: BAR 10: can't allocate mem resource [0xfbf00000-0xfbefffff]
pci 0000:00:01.0: PCI bridge, secondary bus 0000:0a
pci 0000:00:01.0: IO window: 0xe000-0xefff
pci 0000:00:01.0: MEM window: 0xfbe00000-0xfbefffff
pci 0000:00:01.0: PREFETCH window: disabled
pci 0000:09:00.0: BAR 7: can't allocate mem resource [0x100000000-0xfaffffff]
pci 0000:00:03.0: PCI bridge, secondary bus 0000:09
pci 0000:00:03.0: IO window: disabled
pci 0000:00:03.0: MEM window: 0xfbd00000-0xfbdfffff
pci 0000:00:03.0: PREFETCH window: 0x000000f8000000-0x000000faffffff
pci 0000:00:05.0: PCI bridge, secondary bus 0000:08
pci 0000:00:05.0: IO window: disabled
pci 0000:00:05.0: MEM window: disabled
pci 0000:00:05.0: PREFETCH window: disabled
pci 0000:00:07.0: PCI bridge, secondary bus 0000:07
pci 0000:00:07.0: IO window: disabled
pci 0000:00:07.0: MEM window: disabled
pci 0000:00:07.0: PREFETCH window: disabled
pci 0000:04:00.0: PCI bridge, secondary bus 0000:06
pci 0000:04:00.0: IO window: disabled
pci 0000:04:00.0: MEM window: disabled
pci 0000:04:00.0: PREFETCH window: disabled
pci 0000:04:00.2: PCI bridge, secondary bus 0000:05
pci 0000:04:00.2: IO window: disabled
pci 0000:04:00.2: MEM window: disabled
pci 0000:04:00.2: PREFETCH window: disabled
pci 0000:00:09.0: PCI bridge, secondary bus 0000:04
pci 0000:00:09.0: IO window: disabled
pci 0000:00:09.0: MEM window: disabled
pci 0000:00:09.0: PREFETCH window: disabled
pci 0000:00:1c.0: PCI bridge, secondary bus 0000:03
pci 0000:00:1c.0: IO window: disabled
pci 0000:00:1c.0: MEM window: disabled
pci 0000:00:1c.0: PREFETCH window: disabled
pci 0000:00:1c.4: PCI bridge, secondary bus 0000:02
pci 0000:00:1c.4: IO window: 0xd000-0xdfff
pci 0000:00:1c.4: MEM window: 0xfbc00000-0xfbcfffff
pci 0000:00:1c.4: PREFETCH window: disabled
pci 0000:00:1e.0: PCI bridge, secondary bus 0000:01
pci 0000:00:1e.0: IO window: 0xc000-0xcfff
pci 0000:00:1e.0: MEM window: 0xfbb00000-0xfbbfffff
pci 0000:00:1e.0: PREFETCH window: 0x000000f0000000-0x000000f7ffffff
pci 0000:00:01.0: setting latency timer to 64
pci 0000:00:03.0: setting latency timer to 64
pci 0000:00:05.0: setting latency timer to 64
pci 0000:00:07.0: setting latency timer to 64
pci 0000:00:09.0: setting latency timer to 64
pci 0000:04:00.0: setting latency timer to 64
pci 0000:04:00.2: setting latency timer to 64
pci 0000:00:1c.0: PCI INT A -> GSI 17 (level, low) -> IRQ 17
pci 0000:00:1c.0: setting latency timer to 64
pci 0000:00:1c.4: PCI INT A -> GSI 17 (level, low) -> IRQ 17
pci 0000:00:1c.4: setting latency timer to 64
pci 0000:00:1e.0: setting latency timer to 64
pci_bus 0000:00: resource 0 io: [0x00-0xffff]
pci_bus 0000:00: resource 1 mem: [0x000000-0xffffffffffffffff]
pci_bus 0000:0a: resource 0 io: [0xe000-0xefff]
pci_bus 0000:0a: resource 1 mem: [0xfbe00000-0xfbefffff]
pci_bus 0000:09: resource 1 mem: [0xfbd00000-0xfbdfffff]
pci_bus 0000:09: resource 2 pref mem [0xf8000000-0xfaffffff]
pci_bus 0000:02: resource 0 io: [0xd000-0xdfff]
pci_bus 0000:02: resource 1 mem: [0xfbc00000-0xfbcfffff]
pci_bus 0000:01: resource 0 io: [0xc000-0xcfff]
pci_bus 0000:01: resource 1 mem: [0xfbb00000-0xfbbfffff]
pci_bus 0000:01: resource 2 pref mem [0xf0000000-0xf7ffffff]
pci_bus 0000:01: resource 3 io: [0x00-0xffff]
pci_bus 0000:01: resource 4 mem: [0x000000-0xffffffffffffffff]
NET: Registered protocol family 2
IP route cache hash table entries: 131072 (order: 8, 1048576 bytes)
TCP established hash table entries: 524288 (order: 11, 8388608 bytes)
TCP bind hash table entries: 65536 (order: 8, 1048576 bytes)
TCP: Hash tables configured (established 524288 bind 65536)
TCP reno registered
NET: Registered protocol family 1
Trying to unpack rootfs image as initramfs...
Freeing initrd memory: 3213k freed
audit: initializing netlink socket (disabled)
type=2000 audit(1245155346.436:1): initialized
HugeTLB registered 2 MB page size, pre-allocated 0 pages
VFS: Disk quotas dquot_6.5.2
Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
msgmni has been set to 7651
SELinux: Registering netfilter hooks
alg: No test for stdrng (krng)
io scheduler noop registered
io scheduler anticipatory registered
io scheduler deadline registered
io scheduler cfq registered (default)
pci 0000:01:01.0: Boot video device
pcieport-driver 0000:00:01.0: irq 72 for MSI/MSI-X
pcieport-driver 0000:00:01.0: setting latency timer to 64
pcieport-driver 0000:00:03.0: irq 73 for MSI/MSI-X
pcieport-driver 0000:00:03.0: setting latency timer to 64
pcieport-driver 0000:00:05.0: irq 74 for MSI/MSI-X
pcieport-driver 0000:00:05.0: setting latency timer to 64
pcieport-driver 0000:00:07.0: irq 75 for MSI/MSI-X
pcieport-driver 0000:00:07.0: setting latency timer to 64
pcieport-driver 0000:00:09.0: irq 76 for MSI/MSI-X
pcieport-driver 0000:00:09.0: setting latency timer to 64
pcieport-driver 0000:00:1c.0: irq 77 for MSI/MSI-X
pcieport-driver 0000:00:1c.0: setting latency timer to 64
pcieport-driver 0000:00:1c.4: irq 78 for MSI/MSI-X
pcieport-driver 0000:00:1c.4: setting latency timer to 64
aer 0000:00:01.0:pcie02: AER service couldn't init device: no _OSC support
aer 0000:00:03.0:pcie02: AER service couldn't init device: no _OSC support
aer 0000:00:05.0:pcie02: AER service couldn't init device: no _OSC support
aer 0000:00:07.0:pcie02: AER service couldn't init device: no _OSC support
aer 0000:00:09.0:pcie02: AER service couldn't init device: no _OSC support
pci_hotplug: PCI Hot Plug PCI Core version: 0.5
ACPI: SSDT 00000000bf7be1f0 00277 (v01 DpgPmm P001Ist 00000011 INTL 20051117)
ACPI: SSDT 00000000bf7bebf0 003B2 (v01 PmRef P001Cst 00003001 INTL 20051117)
Monitor-Mwait will be used to enter C-1 state
Monitor-Mwait will be used to enter C-2 state
Monitor-Mwait will be used to enter C-3 state
ACPI: CPU0 (power states: C1[C1] C2[C2] C3[C3])
processor ACPI_CPU:00: registered as cooling_device0
ACPI: SSDT 00000000bf7be470 00277 (v01 DpgPmm P002Ist 00000012 INTL 20051117)
ACPI: SSDT 00000000bf7befb0 00085 (v01 PmRef P002Cst 00003000 INTL 20051117)
ACPI: CPU1 (power states: C1[C1] C2[C2] C3[C3])
processor ACPI_CPU:01: registered as cooling_device1
ACPI: SSDT 00000000bf7be6f0 00277 (v01 DpgPmm P003Ist 00000012 INTL 20051117)
ACPI: SSDT 00000000bf7bf040 00085 (v01 PmRef P003Cst 00003000 INTL 20051117)
ACPI: CPU2 (power states: C1[C1] C2[C2] C3[C3])
processor ACPI_CPU:02: registered as cooling_device2
ACPI: SSDT 00000000bf7be970 00277 (v01 DpgPmm P004Ist 00000012 INTL 20051117)
ACPI: SSDT 00000000bf7bf0d0 00085 (v01 PmRef P004Cst 00003000 INTL 20051117)
ACPI: CPU3 (power states: C1[C1] C2[C2] C3[C3])
processor ACPI_CPU:03: registered as cooling_device3
Non-volatile memory driver v1.3
Linux agpgart interface v0.103
Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
serial8250: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A
serial8250: ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A
00:08: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A
00:09: ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A
brd: module loaded
Uniform Multi-Platform E-IDE driver
ide_generic: please use "probe_mask=0x3f" module parameter for probing all legacy ISA IDE ports
ide-gd driver 1.18
PNP: PS/2 Controller [PNP0303:PS2K,PNP0f03:PS2M] at 0x60,0x64 irq 1,12
serio: i8042 KBD port at 0x60,0x64 irq 1
serio: i8042 AUX port at 0x60,0x64 irq 12
mice: PS/2 mouse device common for all mice
cpuidle: using governor ladder
usbcore: registered new interface driver hiddev
usbcore: registered new interface driver usbhid
usbhid: v2.6:USB HID core driver
TCP bic registered
Initializing XFRM netlink socket
NET: Registered protocol family 17
registered taskstats version 1
Initalizing network drop monitor service
Freeing unused kernel memory: 416k freed
Write protecting the kernel read-only data: 3980k
ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
ehci_hcd 0000:00:1a.7: PCI INT C -> GSI 18 (level, low) -> IRQ 18
ehci_hcd 0000:00:1a.7: setting latency timer to 64
ehci_hcd 0000:00:1a.7: EHCI Host Controller
ehci_hcd 0000:00:1a.7: new USB bus registered, assigned bus number 1
ehci_hcd 0000:00:1a.7: debug port 1
ehci_hcd 0000:00:1a.7: cache line size of 32 is not supported
ehci_hcd 0000:00:1a.7: irq 18, io mem 0xfbafa000
ehci_hcd 0000:00:1a.7: USB 2.0 started, EHCI 1.00
usb usb1: configuration #1 chosen from 1 choice
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 6 ports detected
ehci_hcd 0000:00:1d.7: PCI INT A -> GSI 23 (level, low) -> IRQ 23
ehci_hcd 0000:00:1d.7: setting latency timer to 64
ehci_hcd 0000:00:1d.7: EHCI Host Controller
ehci_hcd 0000:00:1d.7: new USB bus registered, assigned bus number 2
ehci_hcd 0000:00:1d.7: debug port 1
ehci_hcd 0000:00:1d.7: cache line size of 32 is not supported
ehci_hcd 0000:00:1d.7: irq 23, io mem 0xfbafc000
ehci_hcd 0000:00:1d.7: USB 2.0 started, EHCI 1.00
usb usb2: configuration #1 chosen from 1 choice
hub 2-0:1.0: USB hub found
hub 2-0:1.0: 6 ports detected
ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
uhci_hcd: USB Universal Host Controller Interface driver
uhci_hcd 0000:00:1a.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
uhci_hcd 0000:00:1a.0: setting latency timer to 64
uhci_hcd 0000:00:1a.0: UHCI Host Controller
uhci_hcd 0000:00:1a.0: new USB bus registered, assigned bus number 3
uhci_hcd 0000:00:1a.0: irq 16, io base 0x0000a080
usb usb3: configuration #1 chosen from 1 choice
hub 3-0:1.0: USB hub found
hub 3-0:1.0: 2 ports detected
uhci_hcd 0000:00:1a.1: PCI INT B -> GSI 21 (level, low) -> IRQ 21
uhci_hcd 0000:00:1a.1: setting latency timer to 64
uhci_hcd 0000:00:1a.1: UHCI Host Controller
uhci_hcd 0000:00:1a.1: new USB bus registered, assigned bus number 4
uhci_hcd 0000:00:1a.1: irq 21, io base 0x0000a400
usb usb4: configuration #1 chosen from 1 choice
hub 4-0:1.0: USB hub found
hub 4-0:1.0: 2 ports detected
uhci_hcd 0000:00:1a.2: PCI INT D -> GSI 19 (level, low) -> IRQ 19
uhci_hcd 0000:00:1a.2: setting latency timer to 64
uhci_hcd 0000:00:1a.2: UHCI Host Controller
uhci_hcd 0000:00:1a.2: new USB bus registered, assigned bus number 5
uhci_hcd 0000:00:1a.2: irq 19, io base 0x0000a480
usb usb5: configuration #1 chosen from 1 choice
hub 5-0:1.0: USB hub found
hub 5-0:1.0: 2 ports detected
uhci_hcd 0000:00:1d.0: PCI INT A -> GSI 23 (level, low) -> IRQ 23
uhci_hcd 0000:00:1d.0: setting latency timer to 64
uhci_hcd 0000:00:1d.0: UHCI Host Controller
uhci_hcd 0000:00:1d.0: new USB bus registered, assigned bus number 6
uhci_hcd 0000:00:1d.0: irq 23, io base 0x0000a800
usb usb6: configuration #1 chosen from 1 choice
hub 6-0:1.0: USB hub found
hub 6-0:1.0: 2 ports detected
uhci_hcd 0000:00:1d.1: PCI INT B -> GSI 19 (level, low) -> IRQ 19
uhci_hcd 0000:00:1d.1: setting latency timer to 64
uhci_hcd 0000:00:1d.1: UHCI Host Controller
uhci_hcd 0000:00:1d.1: new USB bus registered, assigned bus number 7
uhci_hcd 0000:00:1d.1: irq 19, io base 0x0000a880
usb usb7: configuration #1 chosen from 1 choice
hub 7-0:1.0: USB hub found
hub 7-0:1.0: 2 ports detected
uhci_hcd 0000:00:1d.2: PCI INT C -> GSI 18 (level, low) -> IRQ 18
uhci_hcd 0000:00:1d.2: setting latency timer to 64
uhci_hcd 0000:00:1d.2: UHCI Host Controller
uhci_hcd 0000:00:1d.2: new USB bus registered, assigned bus number 8
uhci_hcd 0000:00:1d.2: irq 18, io base 0x0000ac00
usb usb8: configuration #1 chosen from 1 choice
hub 8-0:1.0: USB hub found
hub 8-0:1.0: 2 ports detected
SCSI subsystem initialized
Driver 'sd' needs updating - please use bus_type methods
libata version 3.00 loaded.
ata_piix 0000:00:1f.2: version 2.13
ata_piix 0000:00:1f.2: PCI INT B -> GSI 19 (level, low) -> IRQ 19
ata_piix 0000:00:1f.2: MAP [ P0 P2 P1 P3 ]
ata_piix 0000:00:1f.2: setting latency timer to 64
scsi0 : ata_piix
scsi1 : ata_piix
ata1: SATA max UDMA/133 cmd 0x1f0 ctl 0x3f6 bmdma 0xff90 irq 14
ata2: SATA max UDMA/133 cmd 0x170 ctl 0x376 bmdma 0xff98 irq 15
ata_piix 0000:00:1f.5: PCI INT B -> GSI 19 (level, low) -> IRQ 19
ata_piix 0000:00:1f.5: MAP [ P0 -- P1 -- ]
ata_piix 0000:00:1f.5: setting latency timer to 64
scsi2 : ata_piix
scsi3 : ata_piix
ata3: SATA max UDMA/133 cmd 0xbc00 ctl 0xb880 bmdma 0xb400 irq 19
ata4: SATA max UDMA/133 cmd 0xb800 ctl 0xb480 bmdma 0xb408 irq 19
ata3: SATA link down (SStatus 0 SControl 300)
input: ImPS/2 Logitech Wheel Mouse as /class/input/input0
input: AT Translated Set 2 keyboard as /class/input/input1
ata2.00: SATA link down (SStatus 0 SControl 300)
ata2.01: SATA link down (SStatus 0 SControl 300)
ata1.00: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
ata1.01: SATA link down (SStatus 0 SControl 300)
ata1.00: ATA-7: HITACHI HDS7225SBSUN250G 0527N810BS, V44OA81A, max UDMA/133
ata1.00: 488390625 sectors, multi 16: LBA48 NCQ (depth 0/32)
ata1.00: configured for UDMA/133
scsi 0:0:0:0: Direct-Access ATA HITACHI HDS7225S V44O PQ: 0 ANSI: 5
sd 0:0:0:0: [sda] 488390625 512-byte hardware sectors: (250 GB/232 GiB)
sd 0:0:0:0: [sda] Write Protect is off
sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
sda: sda1 sda2
sd 0:0:0:0: [sda] Attached SCSI disk
ata4: SATA link down (SStatus 0 SControl 300)
device-mapper: uevent: version 1.0.3
device-mapper: ioctl: 4.14.0-ioctl (2008-04-23) initialised: dm-devel@redhat.com
kjournald starting. Commit interval 5 seconds
EXT3-fs: mounted filesystem with writeback data mode.
type=1404 audit(1245155368.933:2): enforcing=1 old_enforcing=0 auid=4294967295 ses=4294967295
SELinux: 8192 avtab hash slots, 69080 rules.
SELinux: 8192 avtab hash slots, 69080 rules.
SELinux: 3 users, 6 roles, 1914 types, 234 bools, 1 sens, 1024 cats
SELinux: 61 classes, 69080 rules
SELinux: class peer not defined in policy
SELinux: class capability2 not defined in policy
SELinux: class kernel_service not defined in policy
SELinux: permission open in class dir not defined in policy
SELinux: permission open in class file not defined in policy
SELinux: permission open in class chr_file not defined in policy
SELinux: permission open in class blk_file not defined in policy
SELinux: permission open in class sock_file not defined in policy
SELinux: permission open in class fifo_file not defined in policy
SELinux: permission recvfrom in class node not defined in policy
SELinux: permission sendto in class node not defined in policy
SELinux: permission ingress in class netif not defined in policy
SELinux: permission egress in class netif not defined in policy
SELinux: permission setfcap in class capability not defined in policy
SELinux: permission nlmsg_tty_audit in class netlink_audit_socket not defined in policy
SELinux: permission forward_in in class packet not defined in policy
SELinux: permission forward_out in class packet not defined in policy
SELinux: the above unknown classes and permissions will be denied
SELinux: Completing initialization.
SELinux: Setting up existing superblocks.
SELinux: initialized (dev dm-0, type ext3), uses xattr
SELinux: initialized (dev usbfs, type usbfs), uses genfs_contexts
SELinux: initialized (dev tmpfs, type tmpfs), uses transition SIDs
SELinux: initialized (dev selinuxfs, type selinuxfs), uses genfs_contexts
SELinux: initialized (dev mqueue, type mqueue), uses transition SIDs
SELinux: initialized (dev hugetlbfs, type hugetlbfs), uses genfs_contexts
SELinux: initialized (dev devpts, type devpts), uses transition SIDs
SELinux: initialized (dev inotifyfs, type inotifyfs), uses genfs_contexts
SELinux: initialized (dev tmpfs, type tmpfs), uses transition SIDs
SELinux: initialized (dev anon_inodefs, type anon_inodefs), uses genfs_contexts
SELinux: initialized (dev pipefs, type pipefs), uses task SIDs
SELinux: initialized (dev debugfs, type debugfs), uses genfs_contexts
SELinux: initialized (dev sockfs, type sockfs), uses task SIDs
SELinux: initialized (dev proc, type proc), uses genfs_contexts
SELinux: initialized (dev bdev, type bdev), uses genfs_contexts
SELinux: initialized (dev rootfs, type rootfs), uses genfs_contexts
SELinux: initialized (dev sysfs, type sysfs), uses genfs_contexts
type=1403 audit(1245155369.248:3): policy loaded auid=4294967295 ses=4294967295
input: PC Speaker as /class/input/input2
shpchp: Standard Hot Plug PCI Controller Driver version: 0.4
i801_smbus 0000:00:1f.3: PCI INT C -> GSI 18 (level, low) -> IRQ 18
Intel(R) Gigabit Ethernet Network Driver - version 1.3.16-k2
Copyright (c) 2007-2009 Intel Corporation.
igb 0000:0a:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
igb 0000:0a:00.0: setting latency timer to 64
igb 0000:0a:00.0: irq 79 for MSI/MSI-X
igb 0000:0a:00.0: irq 80 for MSI/MSI-X
igb 0000:0a:00.0: irq 81 for MSI/MSI-X
igb 0000:0a:00.0: irq 82 for MSI/MSI-X
igb 0000:0a:00.0: irq 83 for MSI/MSI-X
igb 0000:0a:00.0: irq 84 for MSI/MSI-X
igb 0000:0a:00.0: irq 85 for MSI/MSI-X
igb 0000:0a:00.0: irq 86 for MSI/MSI-X
igb 0000:0a:00.0: irq 87 for MSI/MSI-X
input: Power Button as /class/input/input3
ACPI: Power Button [PWRF]
input: Power Button as /class/input/input4
ACPI: Power Button [PWRB]
igb 0000:0a:00.0: Intel(R) Gigabit Ethernet Network Connection
igb 0000:0a:00.0: eth0: (PCIe:2.5Gb/s:Width x4) 00:30:48:c8:92:42
igb 0000:0a:00.0: eth0: PBA No: 0010ff-0ff
igb 0000:0a:00.0: Using MSI-X interrupts. 4 rx queue(s), 4 tx queue(s)
igb 0000:0a:00.1: PCI INT B -> GSI 17 (level, low) -> IRQ 17
igb 0000:0a:00.1: setting latency timer to 64
igb 0000:0a:00.1: irq 88 for MSI/MSI-X
igb 0000:0a:00.1: irq 89 for MSI/MSI-X
igb 0000:0a:00.1: irq 90 for MSI/MSI-X
igb 0000:0a:00.1: irq 91 for MSI/MSI-X
igb 0000:0a:00.1: irq 92 for MSI/MSI-X
igb 0000:0a:00.1: irq 93 for MSI/MSI-X
igb 0000:0a:00.1: irq 94 for MSI/MSI-X
igb 0000:0a:00.1: irq 95 for MSI/MSI-X
igb 0000:0a:00.1: irq 96 for MSI/MSI-X
rtc_cmos 00:03: RTC can wake from S4
rtc_cmos 00:03: rtc core: registered rtc_cmos as rtc0
rtc0: alarms up to one month, y3k, 114 bytes nvram, hpet irqs
igb 0000:0a:00.1: Intel(R) Gigabit Ethernet Network Connection
igb 0000:0a:00.1: eth1: (PCIe:2.5Gb/s:Width x4) 00:30:48:c8:92:43
igb 0000:0a:00.1: eth1: PBA No: 0010ff-0ff
igb 0000:0a:00.1: Using MSI-X interrupts. 4 rx queue(s), 4 tx queue(s)
Floppy drive(s): fd0 is 1.44M
sd 0:0:0:0: Attached scsi generic sg0 type 0
floppy0: no floppy controllers found
Floppy drive(s): fd0 is 1.44M
floppy0: no floppy controllers found
lp: driver loaded but no devices found
ramfs: bad mount option: maxsize=512
md: Autodetecting RAID arrays.
md: Scanned 0 and added 0 devices.
md: autorun ...
md: ... autorun DONE.
device-mapper: multipath: version 1.0.5 loaded
EXT3 FS on dm-0, internal journal
kjournald starting. Commit interval 5 seconds
EXT3 FS on sda1, internal journal
EXT3-fs: mounted filesystem with writeback data mode.
SELinux: initialized (dev sda1, type ext3), uses xattr
SELinux: initialized (dev tmpfs, type tmpfs), uses transition SIDs
Adding 6094840k swap on /dev/VolGroup00/LogVol01. Priority:-1 extents:1 across:6094840k
SELinux: initialized (dev binfmt_misc, type binfmt_misc), uses genfs_contexts
platform microcode: firmware: requesting intel-ucode/06-1a-05
platform microcode: firmware: requesting intel-ucode/06-1a-05
platform microcode: firmware: requesting intel-ucode/06-1a-05
platform microcode: firmware: requesting intel-ucode/06-1a-05
Microcode Update Driver: v2.00 <tigran@aivazian.fsnet.co.uk>, Peter Oruba
Microcode Update Driver: v2.00 removed.
warning: process `kudzu' used the deprecated sysctl system call with 1.23.
warning: `mcstransd' uses 32-bit capabilities (legacy support in use)
igb: eth0 NIC Link is Up 10 Mbps Half Duplex, Flow Control: None
type=1400 audit(1245155386.754:4): avc: denied { sys_tty_config } for pid=3068 comm="consoletype" capability=26 scontext=system_u:system_r:consoletype_t:s0 tcontext=system_u:system_r:consoletype_t:s0 tclass=capability
type=1400 audit(1245155386.758:5): avc: denied { sys_tty_config } for pid=3070 comm="consoletype" capability=26 scontext=system_u:system_r:consoletype_t:s0 tcontext=system_u:system_r:consoletype_t:s0 tclass=capability
type=1400 audit(1245155386.768:6): avc: denied { sys_tty_config } for pid=3072 comm="consoletype" capability=26 scontext=system_u:system_r:consoletype_t:s0 tcontext=system_u:system_r:consoletype_t:s0 tclass=capability
type=1400 audit(1245155386.833:7): avc: denied { sys_tty_config } for pid=3103 comm="consoletype" capability=26 scontext=system_u:system_r:consoletype_t:s0 tcontext=system_u:system_r:consoletype_t:s0 tclass=capability
type=1400 audit(1245155386.836:8): avc: denied { sys_tty_config } for pid=3105 comm="consoletype" capability=26 scontext=system_u:system_r:consoletype_t:s0 tcontext=system_u:system_r:consoletype_t:s0 tclass=capability
type=1400 audit(1245155386.850:9): avc: denied { sys_tty_config } for pid=3107 comm="consoletype" capability=26 scontext=system_u:system_r:consoletype_t:s0 tcontext=system_u:system_r:consoletype_t:s0 tclass=capability
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
SELinux: initialized (dev rpc_pipefs, type rpc_pipefs), uses genfs_contexts
warning: process `kudzu' used the deprecated sysctl system call with 1.23.
Bluetooth: Core ver 2.15
NET: Registered protocol family 31
Bluetooth: HCI device and connection manager initialized
Bluetooth: HCI socket layer initialized
Bluetooth: L2CAP ver 2.13
Bluetooth: L2CAP socket layer initialized
Bluetooth: RFCOMM socket layer initialized
Bluetooth: RFCOMM TTY layer initialized
Bluetooth: RFCOMM ver 1.11
Bluetooth: HIDP (Human Interface Emulation) ver 1.2
SELinux: initialized (dev autofs, type autofs), uses genfs_contexts
SELinux: initialized (dev autofs, type autofs), uses genfs_contexts
SELinux: initialized (dev autofs, type autofs), uses genfs_contexts
NET: Registered protocol family 10
lo: Disabled Privacy Extensions
eth0: no IPv6 routers present
mtrr: type mismatch for f0000000,2000000 old: write-back new: write-combining
vxge: Copyright(c) 2002-2009 Neterion Inc
vxge: Driver version: 0.0.0.0-svn
vxge 0000:09:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
vxge 0000:09:00.0: setting latency timer to 64
res->parent is ffff88013f127528 for 2
res->parent is ffff88013f127528 for 4
nres = 2 - iov->nres = 3
vxge 0000:09:00.0: not enough MMIO resources for SR-IOV
eth2: SERIAL NUMBER: SXJ0839017
eth2: PART NUMBER: X3110SR0001
eth2: Neterion X3110 Single-Port SR 10GbE Server Adapter
eth2: MAC ADDR: 00:0C:FC:00:B1:10
eth2: Link Width x8
eth2: Firmware version : 1.0.0 Date : 06/03/2009
eth2: 1 Vpath(s) opened
eth2: Interrupt type MSI-X
eth2: RTH steering disabled
eth2: Tx steering disabled
eth2: Large receive offload enabled
eth2: NAPI enabled
eth2: Rx doorbell mode enabled
eth2: VLAN tag stripping enabled
eth2: Ring blocks : 2
eth2: Fifo blocks : 12
vxge 0000:09:00.0: irq 97 for MSI/MSI-X
vxge 0000:09:00.0: irq 98 for MSI/MSI-X
vxge 0000:09:00.0: irq 99 for MSI/MSI-X
eth2: MTU is 1500
eth2: Link Up
eth2: no IPv6 routers present
eth2: Link Down
vxge 0000:09:00.0: PCI INT A disabled
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: SRIOV fails with "not enough MMIO resources"
2009-06-16 12:49 ` Sivakumar Subramani
@ 2009-06-17 4:58 ` Yu Zhao
2009-07-20 8:16 ` SRIOV fails with "SR-IOV: bus number out of range" Sivakumar Subramani
0 siblings, 1 reply; 6+ messages in thread
From: Yu Zhao @ 2009-06-17 4:58 UTC (permalink / raw)
To: Sivakumar Subramani; +Cc: netdev@vger.kernel.org
Sivakumar Subramani wrote:
> Sorry for the delay in reply. I got the setup back today. The PF BAR4
> size is 32M. BAR0 of each VF is 8M. I loading the driver with 4 VFs. I
> am facing this problem, even if I load it with 3 VFs.
OK, I see the problem. The total VFs supported by your SR-IOV device is
8 (0a:00.0/1) and 16 (09:00.0). And the VF MMIO area is calculated by
size of VF BAR multiplied total VFs. Passing 3 or 4 to
pci_enable_sriov() can not reduce the VF MMIO area size.
So please hardcode the total VFs to 4 before you get a BIOS that
supports the SR-IOV:
diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
index b497daa..5ba6da0 100644
--- a/drivers/pci/iov.c
+++ b/drivers/pci/iov.c
@@ -430,6 +430,7 @@ static int sriov_init(struct pci_dev *dev, int pos)
if (!total)
return 0;
+ total = 4;
ctrl = 0;
list_for_each_entry(pdev, &dev->bus->devices, bus_list)
if (pdev->is_physfn)
> I have attached the code of sriov_init / sriov_enable / quirk_vxge_sriov
> and the log of the debug statements that I have added in these function.
> Please let you know your comments.
>
> </Siva>
>
> Thanks,
> ~Siva
> -----Original Message-----
> From: Yu Zhao [mailto:yu.zhao@intel.com]
> Sent: Tuesday, June 09, 2009 11:40 AM
> To: Sreenivasa Honnur
> Cc: netdev@vger.kernel.org; Sivakumar Subramani
> Subject: Re: SRIOV fails with "not enough MMIO resources"
>
> Sreenivasa Honnur wrote:
>> Hi,
>>
>> I added pci_enable_sriov / pci_disable_sriov in probe and remove
>> function for Neterion X3100 card to test SRIOV feature. While testing
> I
>> got following error.
>>
>> Jun 8 00:02:59 bethweidel kernel: vxge: Copyright(c) 2002-2009
> Neterion
>> Inc Jun 8 00:02:59 bethweidel kernel: vxge: Driver version:
>> 2.0.1.17129-k Jun 8 00:02:59 bethweidel kernel: vxge 0000:03:00.0: PCI
>> INT A -> GSI 16 (level, low) -> IRQ 16 Jun 8 00:02:59 bethweidel
> kernel:
>> res->parent is ffff88013f129d28 for 2 Jun 8 00:02:59 bethweidel
> kernel:
>> res->parent is ffff88013f129d28 for 4 Jun 8 00:02:59 bethweidel
> kernel:
>> nres = 2 - iov->nres = 3 Jun 8 00:02:59 bethweidel kernel: vxge
>> 0000:03:00.0: not enough MMIO resources for SR-IOV ----> ERROR Jun 8
>> 00:02:59 bethweidel kernel: pci_enable_sriov returned -12 Jun 8
> 00:02:59
>> bethweidel kernel: eth2: SERIAL NUMBER: SXC0919196 Jun 8 00:02:59
>> bethweidel kernel: eth2: PART NUMBER: X3110SR0003
>>
>>
>>
>> When I dumped the config space of SRIOV Capability, I found BAR0 of
> VFs
>> was not configured by BIOS and it was zero. So I added following
>> "quirk_vxge_sriov" quirk function to configure the BAR2 of PF as BAR0
> of
>> VFs.
>>
>> Now lspci shows proper value. But I am still get same error. The code
>> that dumps this error is as follow. Here I trying to find out the
> reason
>> why res->parent is not updated for BAR0 of VF. From the above log, I
> can
>> see that Bar2 and BAR4's res->parent are update.
>>
>> Any possible reason why res->parent of VF's BAR0 is not updated?
>
> Is the size of the PF BAR 4 big enough to cover the VF MMIO area
> indicated by VF BAR 0? (size of the PF BAR 4 >= size of VF BAR 0 *
> NumVFs).
>
> Can you please post the whole dmesg? I might be able to root cause the
> problem after looking at it.
>
>> sriov_enable :
>>
>> --------------
>>
>> nres = 0;
>>
>> for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
>>
>> res = dev->resource + PCI_IOV_RESOURCES + i;
>>
>> if (res->parent) {
>>
>> printk("res->parent is %llx for %d \n", res->parent,i );
>>
>> nres++;
>>
>> }
>>
>> }
>>
>> printk("nres = %d - iov->nres = %d \n", nres, iov->nres);
>>
>> if (nres != iov->nres) {
>>
>> dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
>>
>> return -ENOMEM;
>>
>> }
>>
>>
>>
>> quirk_vxge_sriov:
>>
>> -----------------
>>
>> static void __devinit quirk_vxge_sriov(struct pci_dev *dev) {
>>
>> int pos, flags;
>>
>> u32 bar, start, size;
>>
>> printk("Entering quirk_vxge_sriov ...\n");
>>
>> if (PAGE_SIZE > 0x10000) {
>>
>> printk("Returning quirk_vxge_sriov @%d \n", __LINE__);
>>
>> return;
>>
>> }
>>
>> pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
>>
>> printk("the pos is %d \n", pos);
>>
>> if (!pos) {
>>
>> printk("Returning quirk_vxge_sriov @%d \n", __LINE__);
>>
>> return;
>>
>> }
>>
>> pci_read_config_dword(dev, pos + PCI_SRIOV_BAR, &bar);
>>
>> if (bar & PCI_BASE_ADDRESS_MEM_MASK)
>>
>> {
>>
>> printk("Returning quirk_vxge_sriov @%d \n", __LINE__);
>>
>> return;
>>
>> }
>>
>> start = pci_resource_start(dev, 4);
>>
>> size = pci_resource_len(dev, 4);
>>
>> printk("Bar4 start %llx - size %llx \n", start, size);
>>
>> if (!start || size != 0x2000000 || start & (size - 1)) {
>>
>> printk("Returning quirk_vxge_sriov @%d \n", __LINE__);
>>
>> return;
>>
>> }
>>
>> pci_resource_flags(dev, 4) = 0;
>>
>> pci_write_config_dword(dev, PCI_BASE_ADDRESS_4, 0);
>>
>> pci_write_config_dword(dev, pos + PCI_SRIOV_BAR, start);
>>
>> pci_read_config_dword(dev, pos+PCI_SRIOV_BAR,&bar);
>>
>> printk("VF's Bar0 is %llx \n", bar);
>>
>> dev_info(&dev->dev, "use Flash Memory Space for SR-IOV BARs\n");
>>
>> printk("Exiting quirk_vxge_sriov ...\n"); }
>>
>>
>>
>> Thanks,
>>
>> ~Siva
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe netdev" in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related [flat|nested] 6+ messages in thread
* RE: SRIOV fails with "SR-IOV: bus number out of range"
2009-06-17 4:58 ` Yu Zhao
@ 2009-07-20 8:16 ` Sivakumar Subramani
2009-07-21 0:58 ` Yu Zhao
0 siblings, 1 reply; 6+ messages in thread
From: Sivakumar Subramani @ 2009-07-20 8:16 UTC (permalink / raw)
To: Yu Zhao; +Cc: netdev
[-- Attachment #1: Type: text/plain, Size: 7811 bytes --]
Hi,
Our card supports 4 virtual function. And I am getting following error
message from srio_enable function. Any idea on this error message? I
have attached the lspci output for reference.
Thanks,
~Siva
Jul 20 01:11:58 SuSE11 kernel: vxge: Copyright(c) 2002-2009 Neterion Inc
Jul 20 01:11:58 SuSE11 kernel: vxge: Driver version: 0.0.0.0-svn
Jul 20 01:11:58 SuSE11 kernel: vxge 0000:03:00.0: PCI INT A -> GSI 16
(level, low) -> IRQ 16
Jul 20 01:11:58 SuSE11 kernel: vxge 0000:03:00.0: setting latency timer
to 64
Jul 20 01:11:58 SuSE11 kernel: virtfn_bus is 4
Jul 20 01:11:58 SuSE11 kernel: nr_virtfn is 4
Jul 20 01:11:58 SuSE11 kernel: dev->bus->subordinate is 3
Jul 20 01:11:58 SuSE11 kernel: vxge 0000:03:00.0: SR-IOV: bus number out
of range <<===============================Error
Jul 20 01:11:58 SuSE11 kernel: eth2: SERIAL NUMBER: SXJ0841025
Jul 20 01:11:58 SuSE11 kernel: eth2: PART NUMBER: X3110SR0001
Jul 20 01:11:58 SuSE11 kernel: eth2: Neterion PCIe 10 GbE Adapter,
single port, SFP+ SR Server Adapter
Jul 20 01:11:58 SuSE11 kernel: eth2: MAC ADDR: 00:0C:FC:00:B6:B5
Jul 20 01:11:58 SuSE11 kernel: eth2: Link Width x4
Jul 20 01:11:58 SuSE11 kernel: eth2: Firmware version : 1.1.0 Date :
06/17/2009
Jul 20 01:11:58 SuSE11 kernel: eth2: Single Root IOV Mode Enabled
Jul 20 01:11:58 SuSE11 kernel: eth2: 1 Vpath(s) opened
Jul 20 01:11:58 SuSE11 kernel: eth2: Interrupt type MSI-X
Jul 20 01:11:58 SuSE11 kernel: eth2: RTH steering disabled
Jul 20 01:11:58 SuSE11 kernel: eth2: Tx steering disabled
Jul 20 01:11:58 SuSE11 kernel: eth2: Large receive offload enabled
Jul 20 01:11:58 SuSE11 kernel: eth2: NAPI enabled
Jul 20 01:11:58 SuSE11 kernel: eth2: Rx doorbell mode enabled
Jul 20 01:11:58 SuSE11 kernel: eth2: VLAN tag stripping enabled
Jul 20 01:11:58 SuSE11 kernel: eth2: Ring blocks : 2
Jul 20 01:11:58 SuSE11 kernel: eth2: Fifo blocks : 12
Thanks,
~Siva
-----Original Message-----
From: Yu Zhao [mailto:yu.zhao@intel.com]
Sent: Wednesday, June 17, 2009 10:28 AM
To: Sivakumar Subramani
Cc: netdev@vger.kernel.org
Subject: Re: SRIOV fails with "not enough MMIO resources"
Sivakumar Subramani wrote:
> Sorry for the delay in reply. I got the setup back today. The PF BAR4
> size is 32M. BAR0 of each VF is 8M. I loading the driver with 4 VFs.
I
> am facing this problem, even if I load it with 3 VFs.
OK, I see the problem. The total VFs supported by your SR-IOV device is
8 (0a:00.0/1) and 16 (09:00.0). And the VF MMIO area is calculated by
size of VF BAR multiplied total VFs. Passing 3 or 4 to
pci_enable_sriov() can not reduce the VF MMIO area size.
So please hardcode the total VFs to 4 before you get a BIOS that
supports the SR-IOV:
diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
index b497daa..5ba6da0 100644
--- a/drivers/pci/iov.c
+++ b/drivers/pci/iov.c
@@ -430,6 +430,7 @@ static int sriov_init(struct pci_dev *dev, int pos)
if (!total)
return 0;
+ total = 4;
ctrl = 0;
list_for_each_entry(pdev, &dev->bus->devices, bus_list)
if (pdev->is_physfn)
> I have attached the code of sriov_init / sriov_enable /
quirk_vxge_sriov
> and the log of the debug statements that I have added in these
function.
> Please let you know your comments.
>
> </Siva>
>
> Thanks,
> ~Siva
> -----Original Message-----
> From: Yu Zhao [mailto:yu.zhao@intel.com]
> Sent: Tuesday, June 09, 2009 11:40 AM
> To: Sreenivasa Honnur
> Cc: netdev@vger.kernel.org; Sivakumar Subramani
> Subject: Re: SRIOV fails with "not enough MMIO resources"
>
> Sreenivasa Honnur wrote:
>> Hi,
>>
>> I added pci_enable_sriov / pci_disable_sriov in probe and remove
>> function for Neterion X3100 card to test SRIOV feature. While testing
> I
>> got following error.
>>
>> Jun 8 00:02:59 bethweidel kernel: vxge: Copyright(c) 2002-2009
> Neterion
>> Inc Jun 8 00:02:59 bethweidel kernel: vxge: Driver version:
>> 2.0.1.17129-k Jun 8 00:02:59 bethweidel kernel: vxge 0000:03:00.0:
PCI
>> INT A -> GSI 16 (level, low) -> IRQ 16 Jun 8 00:02:59 bethweidel
> kernel:
>> res->parent is ffff88013f129d28 for 2 Jun 8 00:02:59 bethweidel
> kernel:
>> res->parent is ffff88013f129d28 for 4 Jun 8 00:02:59 bethweidel
> kernel:
>> nres = 2 - iov->nres = 3 Jun 8 00:02:59 bethweidel kernel: vxge
>> 0000:03:00.0: not enough MMIO resources for SR-IOV ----> ERROR Jun 8
>> 00:02:59 bethweidel kernel: pci_enable_sriov returned -12 Jun 8
> 00:02:59
>> bethweidel kernel: eth2: SERIAL NUMBER: SXC0919196 Jun 8 00:02:59
>> bethweidel kernel: eth2: PART NUMBER: X3110SR0003
>>
>>
>>
>> When I dumped the config space of SRIOV Capability, I found BAR0 of
> VFs
>> was not configured by BIOS and it was zero. So I added following
>> "quirk_vxge_sriov" quirk function to configure the BAR2 of PF as BAR0
> of
>> VFs.
>>
>> Now lspci shows proper value. But I am still get same error. The code
>> that dumps this error is as follow. Here I trying to find out the
> reason
>> why res->parent is not updated for BAR0 of VF. From the above log, I
> can
>> see that Bar2 and BAR4's res->parent are update.
>>
>> Any possible reason why res->parent of VF's BAR0 is not updated?
>
> Is the size of the PF BAR 4 big enough to cover the VF MMIO area
> indicated by VF BAR 0? (size of the PF BAR 4 >= size of VF BAR 0 *
> NumVFs).
>
> Can you please post the whole dmesg? I might be able to root cause the
> problem after looking at it.
>
>> sriov_enable :
>>
>> --------------
>>
>> nres = 0;
>>
>> for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
>>
>> res = dev->resource + PCI_IOV_RESOURCES + i;
>>
>> if (res->parent) {
>>
>> printk("res->parent is %llx for %d \n", res->parent,i );
>>
>> nres++;
>>
>> }
>>
>> }
>>
>> printk("nres = %d - iov->nres = %d \n", nres, iov->nres);
>>
>> if (nres != iov->nres) {
>>
>> dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
>>
>> return -ENOMEM;
>>
>> }
>>
>>
>>
>> quirk_vxge_sriov:
>>
>> -----------------
>>
>> static void __devinit quirk_vxge_sriov(struct pci_dev *dev) {
>>
>> int pos, flags;
>>
>> u32 bar, start, size;
>>
>> printk("Entering quirk_vxge_sriov ...\n");
>>
>> if (PAGE_SIZE > 0x10000) {
>>
>> printk("Returning quirk_vxge_sriov @%d \n", __LINE__);
>>
>> return;
>>
>> }
>>
>> pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
>>
>> printk("the pos is %d \n", pos);
>>
>> if (!pos) {
>>
>> printk("Returning quirk_vxge_sriov @%d \n", __LINE__);
>>
>> return;
>>
>> }
>>
>> pci_read_config_dword(dev, pos + PCI_SRIOV_BAR, &bar);
>>
>> if (bar & PCI_BASE_ADDRESS_MEM_MASK)
>>
>> {
>>
>> printk("Returning quirk_vxge_sriov @%d \n", __LINE__);
>>
>> return;
>>
>> }
>>
>> start = pci_resource_start(dev, 4);
>>
>> size = pci_resource_len(dev, 4);
>>
>> printk("Bar4 start %llx - size %llx \n", start, size);
>>
>> if (!start || size != 0x2000000 || start & (size - 1)) {
>>
>> printk("Returning quirk_vxge_sriov @%d \n", __LINE__);
>>
>> return;
>>
>> }
>>
>> pci_resource_flags(dev, 4) = 0;
>>
>> pci_write_config_dword(dev, PCI_BASE_ADDRESS_4, 0);
>>
>> pci_write_config_dword(dev, pos + PCI_SRIOV_BAR, start);
>>
>> pci_read_config_dword(dev, pos+PCI_SRIOV_BAR,&bar);
>>
>> printk("VF's Bar0 is %llx \n", bar);
>>
>> dev_info(&dev->dev, "use Flash Memory Space for SR-IOV BARs\n");
>>
>> printk("Exiting quirk_vxge_sriov ...\n"); }
>>
>>
>>
>> Thanks,
>>
>> ~Siva
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe netdev" in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
[-- Attachment #2: lspci_log --]
[-- Type: application/octet-stream, Size: 16654 bytes --]
03:00.0 Ethernet controller: S2io Inc. Device 5833 (rev 01)
Subsystem: S2io Inc. Device 6030
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 16
Region 0: Memory at fa800000 (64-bit, prefetchable) [size=8M]
Region 2: Memory at fa7ff000 (64-bit, prefetchable) [size=4K]
Region 4: Memory at <unassigned> (64-bit, prefetchable)
Expansion ROM at fbd80000 [disabled] [size=512K]
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [70] Express (v1) Endpoint, MSI 08
DevCap: MaxPayload 4096 bytes, PhantFunc 0, Latency L0s <2us, L1 <2us
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ FLReset-
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x8, ASPM L0s L1, Latency L0 <256ns, L1 <4us
ClockPM- Suprise- LLActRep+ BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
Capabilities: [a0] MSI-X: Enable- Mask- TabSize=4
Vector table: BAR=2 offset=00000000
PBA: BAR=2 offset=00000800
Capabilities: [c0] Vital Product Data <?>
Capabilities: [50] Message Signalled Interrupts: Mask+ 64bit+ Count=1/32 Enable-
Address: 0000000000000000 Data: 0000
Masking: 00000000 Pending: 00000000
Capabilities: [100] Alternative Routing-ID Interpretation (ARI)
ARICap: MFVC- ACS-, Next Function: 0
ARICtl: MFVC- ACS-, Function Group: 0
Capabilities: [110] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSVoil-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSVoil-
UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSVoil-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn-
Capabilities: [150] Power Budgeting <?>
Capabilities: [160] Device Serial Number b5-b6-00-00-00-fc-0c-00
Capabilities: [170] Single Root I/O Virtualization (SR-IOV)
IOVCap: Migration-, Interrupt Message Number: 000
IOVCtl: Enable- Migration- Interrupt- MSE- ARIHierarchy-
IOVSta: Migration-
Initial VFs: 4, Total VFs: 4, Number of VFs: 4, Function Dependency Link: 00
VF offset: 257, stride: 1, Device ID: 5833
Supported Page Size: 000007ff, System Page Size: 00000001
VF Migration: offset: 00000000, BIR: 1
Capabilities: [1b0] #11
Kernel driver in use: vxge
00: d5 17 33 58 46 01 10 00 01 00 00 02 10 00 00 00
10: 0c 00 80 fa 00 00 00 00 0c f0 7f fa 00 00 00 00
20: 0c 00 00 00 00 00 00 00 00 00 00 00 d5 17 30 60
30: 00 00 d8 fb 40 00 00 00 00 00 00 00 0a 01 00 00
40: 01 70 23 7e 00 00 00 00 00 00 00 00 00 00 00 00
50: 05 00 8a 01 00 00 00 00 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 10 a0 01 10 45 83 00 10 10 28 00 00 81 2c 11 00
80: 40 00 41 30 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 11 00 00 00 03 00 00 00 00 00 00 00
a0: 11 c0 03 00 02 00 00 00 02 08 00 00 00 00 00 00
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100: 0e 00 01 11 00 00 00 00 00 00 00 00 00 00 00 00
110: 01 00 01 15 00 00 00 00 00 00 00 00 10 20 06 00
120: 00 20 00 00 00 20 00 00 a0 00 00 00 00 00 00 00
130: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
140: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
150: 04 00 01 16 00 00 00 00 00 00 01 00 01 00 00 00
160: 03 00 01 17 b5 b6 00 00 00 fc 0c 00 00 00 00 00
170: 10 00 01 1b 00 00 00 00 00 00 00 00 04 00 04 00
180: 04 00 00 00 01 01 01 00 00 00 33 58 ff 07 00 00
190: 01 00 00 00 0c 00 00 f8 00 00 00 00 0c 00 00 fa
1a0: 00 00 00 00 0c 80 00 fa 00 00 00 00 00 00 00 00
1b0: 11 00 01 00 38 00 00 00 00 00 00 00 00 00 00 00
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^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: SRIOV fails with "SR-IOV: bus number out of range"
2009-07-20 8:16 ` SRIOV fails with "SR-IOV: bus number out of range" Sivakumar Subramani
@ 2009-07-21 0:58 ` Yu Zhao
0 siblings, 0 replies; 6+ messages in thread
From: Yu Zhao @ 2009-07-21 0:58 UTC (permalink / raw)
To: Sivakumar Subramani; +Cc: netdev@vger.kernel.org
Sivakumar Subramani wrote:
> Hi,
>
> Our card supports 4 virtual function. And I am getting following error
> message from srio_enable function. Any idea on this error message? I
> have attached the lspci output for reference.
Your BIOS doesn't support SR-IOV. Please contact the vendor for a new
one. Or plug the device into a PCIe slot that supports ARI Forwarding.
If neither of the ways are easy for you, use pci=assign-busses to boot
kernel.
>
> Thanks,
> ~Siva
>
>
> Jul 20 01:11:58 SuSE11 kernel: vxge: Copyright(c) 2002-2009 Neterion Inc
> Jul 20 01:11:58 SuSE11 kernel: vxge: Driver version: 0.0.0.0-svn
> Jul 20 01:11:58 SuSE11 kernel: vxge 0000:03:00.0: PCI INT A -> GSI 16
> (level, low) -> IRQ 16
> Jul 20 01:11:58 SuSE11 kernel: vxge 0000:03:00.0: setting latency timer
> to 64
> Jul 20 01:11:58 SuSE11 kernel: virtfn_bus is 4
> Jul 20 01:11:58 SuSE11 kernel: nr_virtfn is 4
> Jul 20 01:11:58 SuSE11 kernel: dev->bus->subordinate is 3
> Jul 20 01:11:58 SuSE11 kernel: vxge 0000:03:00.0: SR-IOV: bus number out
> of range <<===============================Error
> Jul 20 01:11:58 SuSE11 kernel: eth2: SERIAL NUMBER: SXJ0841025
> Jul 20 01:11:58 SuSE11 kernel: eth2: PART NUMBER: X3110SR0001
> Jul 20 01:11:58 SuSE11 kernel: eth2: Neterion PCIe 10 GbE Adapter,
> single port, SFP+ SR Server Adapter
> Jul 20 01:11:58 SuSE11 kernel: eth2: MAC ADDR: 00:0C:FC:00:B6:B5
> Jul 20 01:11:58 SuSE11 kernel: eth2: Link Width x4
> Jul 20 01:11:58 SuSE11 kernel: eth2: Firmware version : 1.1.0 Date :
> 06/17/2009
> Jul 20 01:11:58 SuSE11 kernel: eth2: Single Root IOV Mode Enabled
> Jul 20 01:11:58 SuSE11 kernel: eth2: 1 Vpath(s) opened
> Jul 20 01:11:58 SuSE11 kernel: eth2: Interrupt type MSI-X
> Jul 20 01:11:58 SuSE11 kernel: eth2: RTH steering disabled
> Jul 20 01:11:58 SuSE11 kernel: eth2: Tx steering disabled
> Jul 20 01:11:58 SuSE11 kernel: eth2: Large receive offload enabled
> Jul 20 01:11:58 SuSE11 kernel: eth2: NAPI enabled
> Jul 20 01:11:58 SuSE11 kernel: eth2: Rx doorbell mode enabled
> Jul 20 01:11:58 SuSE11 kernel: eth2: VLAN tag stripping enabled
> Jul 20 01:11:58 SuSE11 kernel: eth2: Ring blocks : 2
> Jul 20 01:11:58 SuSE11 kernel: eth2: Fifo blocks : 12
> Thanks,
> ~Siva
>
> -----Original Message-----
> From: Yu Zhao [mailto:yu.zhao@intel.com]
> Sent: Wednesday, June 17, 2009 10:28 AM
> To: Sivakumar Subramani
> Cc: netdev@vger.kernel.org
> Subject: Re: SRIOV fails with "not enough MMIO resources"
>
> Sivakumar Subramani wrote:
>> Sorry for the delay in reply. I got the setup back today. The PF BAR4
>> size is 32M. BAR0 of each VF is 8M. I loading the driver with 4 VFs.
> I
>> am facing this problem, even if I load it with 3 VFs.
>
> OK, I see the problem. The total VFs supported by your SR-IOV device is
> 8 (0a:00.0/1) and 16 (09:00.0). And the VF MMIO area is calculated by
> size of VF BAR multiplied total VFs. Passing 3 or 4 to
> pci_enable_sriov() can not reduce the VF MMIO area size.
>
> So please hardcode the total VFs to 4 before you get a BIOS that
> supports the SR-IOV:
>
> diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
> index b497daa..5ba6da0 100644
> --- a/drivers/pci/iov.c
> +++ b/drivers/pci/iov.c
> @@ -430,6 +430,7 @@ static int sriov_init(struct pci_dev *dev, int pos)
> if (!total)
> return 0;
>
> + total = 4;
> ctrl = 0;
> list_for_each_entry(pdev, &dev->bus->devices, bus_list)
> if (pdev->is_physfn)
>
>
>> I have attached the code of sriov_init / sriov_enable /
> quirk_vxge_sriov
>> and the log of the debug statements that I have added in these
> function.
>> Please let you know your comments.
>>
>> </Siva>
>>
>> Thanks,
>> ~Siva
>> -----Original Message-----
>> From: Yu Zhao [mailto:yu.zhao@intel.com]
>> Sent: Tuesday, June 09, 2009 11:40 AM
>> To: Sreenivasa Honnur
>> Cc: netdev@vger.kernel.org; Sivakumar Subramani
>> Subject: Re: SRIOV fails with "not enough MMIO resources"
>>
>> Sreenivasa Honnur wrote:
>>> Hi,
>>>
>>> I added pci_enable_sriov / pci_disable_sriov in probe and remove
>>> function for Neterion X3100 card to test SRIOV feature. While testing
>> I
>>> got following error.
>>>
>>> Jun 8 00:02:59 bethweidel kernel: vxge: Copyright(c) 2002-2009
>> Neterion
>>> Inc Jun 8 00:02:59 bethweidel kernel: vxge: Driver version:
>>> 2.0.1.17129-k Jun 8 00:02:59 bethweidel kernel: vxge 0000:03:00.0:
> PCI
>>> INT A -> GSI 16 (level, low) -> IRQ 16 Jun 8 00:02:59 bethweidel
>> kernel:
>>> res->parent is ffff88013f129d28 for 2 Jun 8 00:02:59 bethweidel
>> kernel:
>>> res->parent is ffff88013f129d28 for 4 Jun 8 00:02:59 bethweidel
>> kernel:
>>> nres = 2 - iov->nres = 3 Jun 8 00:02:59 bethweidel kernel: vxge
>>> 0000:03:00.0: not enough MMIO resources for SR-IOV ----> ERROR Jun 8
>>> 00:02:59 bethweidel kernel: pci_enable_sriov returned -12 Jun 8
>> 00:02:59
>>> bethweidel kernel: eth2: SERIAL NUMBER: SXC0919196 Jun 8 00:02:59
>>> bethweidel kernel: eth2: PART NUMBER: X3110SR0003
>>>
>>>
>>>
>>> When I dumped the config space of SRIOV Capability, I found BAR0 of
>> VFs
>>> was not configured by BIOS and it was zero. So I added following
>>> "quirk_vxge_sriov" quirk function to configure the BAR2 of PF as BAR0
>> of
>>> VFs.
>>>
>>> Now lspci shows proper value. But I am still get same error. The code
>>> that dumps this error is as follow. Here I trying to find out the
>> reason
>>> why res->parent is not updated for BAR0 of VF. From the above log, I
>> can
>>> see that Bar2 and BAR4's res->parent are update.
>>>
>>> Any possible reason why res->parent of VF's BAR0 is not updated?
>> Is the size of the PF BAR 4 big enough to cover the VF MMIO area
>> indicated by VF BAR 0? (size of the PF BAR 4 >= size of VF BAR 0 *
>> NumVFs).
>>
>> Can you please post the whole dmesg? I might be able to root cause the
>
>> problem after looking at it.
>>
>>> sriov_enable :
>>>
>>> --------------
>>>
>>> nres = 0;
>>>
>>> for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
>>>
>>> res = dev->resource + PCI_IOV_RESOURCES + i;
>>>
>>> if (res->parent) {
>>>
>>> printk("res->parent is %llx for %d \n", res->parent,i );
>>>
>>> nres++;
>>>
>>> }
>>>
>>> }
>>>
>>> printk("nres = %d - iov->nres = %d \n", nres, iov->nres);
>>>
>>> if (nres != iov->nres) {
>>>
>>> dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
>>>
>>> return -ENOMEM;
>>>
>>> }
>>>
>>>
>>>
>>> quirk_vxge_sriov:
>>>
>>> -----------------
>>>
>>> static void __devinit quirk_vxge_sriov(struct pci_dev *dev) {
>>>
>>> int pos, flags;
>>>
>>> u32 bar, start, size;
>>>
>>> printk("Entering quirk_vxge_sriov ...\n");
>>>
>>> if (PAGE_SIZE > 0x10000) {
>>>
>>> printk("Returning quirk_vxge_sriov @%d \n", __LINE__);
>>>
>>> return;
>>>
>>> }
>>>
>>> pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
>>>
>>> printk("the pos is %d \n", pos);
>>>
>>> if (!pos) {
>>>
>>> printk("Returning quirk_vxge_sriov @%d \n", __LINE__);
>>>
>>> return;
>>>
>>> }
>>>
>>> pci_read_config_dword(dev, pos + PCI_SRIOV_BAR, &bar);
>>>
>>> if (bar & PCI_BASE_ADDRESS_MEM_MASK)
>>>
>>> {
>>>
>>> printk("Returning quirk_vxge_sriov @%d \n", __LINE__);
>>>
>>> return;
>>>
>>> }
>>>
>>> start = pci_resource_start(dev, 4);
>>>
>>> size = pci_resource_len(dev, 4);
>>>
>>> printk("Bar4 start %llx - size %llx \n", start, size);
>>>
>>> if (!start || size != 0x2000000 || start & (size - 1)) {
>>>
>>> printk("Returning quirk_vxge_sriov @%d \n", __LINE__);
>>>
>>> return;
>>>
>>> }
>>>
>>> pci_resource_flags(dev, 4) = 0;
>>>
>>> pci_write_config_dword(dev, PCI_BASE_ADDRESS_4, 0);
>>>
>>> pci_write_config_dword(dev, pos + PCI_SRIOV_BAR, start);
>>>
>>> pci_read_config_dword(dev, pos+PCI_SRIOV_BAR,&bar);
>>>
>>> printk("VF's Bar0 is %llx \n", bar);
>>>
>>> dev_info(&dev->dev, "use Flash Memory Space for SR-IOV BARs\n");
>>>
>>> printk("Exiting quirk_vxge_sriov ...\n"); }
>>>
>>>
>>>
>>> Thanks,
>>>
>>> ~Siva
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>> --
>>> To unsubscribe from this list: send the line "unsubscribe netdev" in
>>> the body of a message to majordomo@vger.kernel.org
>>> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2009-07-21 1:01 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2009-06-08 15:59 SRIOV fails with "not enough MMIO resources" Sreenivasa Honnur
2009-06-09 6:10 ` Yu Zhao
2009-06-16 12:49 ` Sivakumar Subramani
2009-06-17 4:58 ` Yu Zhao
2009-07-20 8:16 ` SRIOV fails with "SR-IOV: bus number out of range" Sivakumar Subramani
2009-07-21 0:58 ` Yu Zhao
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