From: deepaksi <deepak.sikri@st.com>
To: Giuseppe CAVALLARO <peppe.cavallaro@st.com>
Cc: spear-devel <spear-devel@list.st.com>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
Shiraz HASHIM <shiraz.hashim@st.com>,
Vikas MANOCHA <vikas.manocha@st.com>
Subject: Re: [PATCH 5/6] stmmac: configure burst related GMAC DMA parameters
Date: Wed, 7 Mar 2012 11:48:01 +0530 [thread overview]
Message-ID: <4F56FD99.4040702@st.com> (raw)
In-Reply-To: <4F55C00C.6030208@st.com>
Hellp Giuseppe,
>
> bit 24 in the Bus Mode Register represents the 8xPBL in databooks newer
> than the 3.50a. In older databook it is 4xPBL.
> So maybe, the DMA_BUS_MODE_4PBL define should be renamed as
> DMA_BUS_PBL_MODE (to be more generic and surrounded by a nice comment
> that details its meaning for different devices).
>
> but ...
Ok, will do that
>> @@ -56,6 +56,18 @@ static int dwmac1000_dma_init(void __iomem *ioaddr, int pbl, u32 dma_tx,
>> value |= DMA_BUS_MODE_DA; /* Rx has priority over tx */
>> #endif
>> writel(value, ioaddr + DMA_BUS_MODE);
>> + /*
>> + * We need to program DMA_AXI_BUS_MODE for supported bursts in
>> + * case DMA_BUS_MODE_FB mode is selected
>> + * Note: This is applicable only for revision GMACv3.61a. For
>> + * older version this register is reserved and shall have no
>> + * effect.
>> + * Further we directly write 0xFF to this register. This would
>> + * ensure that all bursts supported by platform is set and those
>> + * which are not supported would remain ineffective.
>> + */
>> + if (value& DMA_BUS_MODE_FB)
>> + writel(0xFF, ioaddr + DMA_AXI_BUS_MODE);
> ... this patch sets the FB: Fixed Burst (not set on other GMAC!) and
> then always writes into the DMA_AXI_BUS_MODE register.
>
> I agree that the DMA_AXI_BUS_MODE Reg is reserved in old devices but I'd
> like to have a new platform parameter to do this kind of thing.
>
> We could have .fixed_burst in the linux/stmmac.h (like .pbl).
>
> If it is passed, so we set the DMA_BUS_MODE_FB in the DMA Reg 0.
>
> In this case, we can also set the DMA reg11 but, pls, not using 0xff.
> I wonder if you could improve the code adding the defines for this register.
>
> With this approach we have no impact on other GMAC!
>
> peppe
Looks good, will use the <include/linux/stmmac.h> for passing the fixed
burst option, and also
program the DMA register accordingly.
Along with that, we may need to program following things.
- For Fixed burst mode, the fixed burst length that has to be programmed.
- For no-fixed burst mode, the maximum allowed burst length need to be set.
This is in sync with the following information captured from the stmmac
core manual for the
bit-0 of the DMA AXI Bus Mode register
**********************************************************************
UNDEF: AXI Undefined Burst Length
This bit is read-only bit and indicates the complement (invert) value of
FB bit
in Register0 (Bus Mode Register[16]).
• When this bit is set to 1, the GMAC-AXI is allowed to perform any burst
length equal to or below the maximum allowed burst length as
programmed in bits[7:1]
• When this bit is set to 0, the GMAC-AXI is allowed to perform only fixed
burst lengths as indicated by BLEN256/128/64/32/16/8/4, or a burst
length of 1.
*********************************************************************
It would be better if additionally we pass the burst length, signifying the
- Fixed burst length for fixed burst mode
- Max Burst length for non-fixed burst mode.
Regards
Deepak
next prev parent reply other threads:[~2012-03-07 6:18 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-03-02 12:55 [PATCH 0/6] stmmac: Driver Updates Deepak Sikri
2012-03-02 12:55 ` [PATCH 1/6] stmmac: Define CSUM offload engine Types Deepak Sikri
2012-03-02 12:55 ` [PATCH 2/6] stmmac: Define MDC clock selection macros Deepak Sikri
2012-03-02 12:55 ` [PATCH 3/6] stmmac: Add support for CPU freq notifiers Deepak Sikri
2012-03-02 12:55 ` [PATCH 4/6] stmmac: Update stmmac descriptor checks for stmmac core prior to Rev-3.5 Deepak Sikri
2012-03-02 12:55 ` [PATCH 5/6] stmmac: configure burst related GMAC DMA parameters Deepak Sikri
2012-03-02 12:55 ` [PATCH 6/6] stmmac: Replace infinite loops by timeouts in mdio r/w Deepak Sikri
2012-03-06 7:55 ` Giuseppe CAVALLARO
2012-03-05 1:52 ` [PATCH 5/6] stmmac: configure burst related GMAC DMA parameters David Miller
2012-03-07 5:39 ` deepaksi
2012-03-06 7:43 ` Giuseppe CAVALLARO
2012-03-07 6:18 ` deepaksi [this message]
2012-03-05 1:51 ` [PATCH 4/6] stmmac: Update stmmac descriptor checks for stmmac core prior to Rev-3.5 David Miller
2012-03-05 4:01 ` Shiraz Hashim
2012-03-05 4:59 ` David Miller
2012-03-07 8:26 ` deepaksi
2012-03-06 7:10 ` Giuseppe CAVALLARO
2012-03-07 8:25 ` deepaksi
2012-03-07 8:45 ` Giuseppe CAVALLARO
2012-03-05 1:50 ` [PATCH 3/6] stmmac: Add support for CPU freq notifiers David Miller
2012-03-07 7:18 ` deepaksi
2012-03-05 15:05 ` Giuseppe CAVALLARO
2012-03-06 8:04 ` Giuseppe CAVALLARO
2012-03-07 8:28 ` deepaksi
2012-03-07 7:17 ` deepaksi
2012-03-05 14:34 ` [PATCH 2/6] stmmac: Define MDC clock selection macros Giuseppe CAVALLARO
2012-03-07 6:55 ` deepaksi
2012-03-07 7:19 ` Giuseppe CAVALLARO
2012-03-07 8:30 ` deepaksi
2012-03-05 14:13 ` [PATCH 1/6] stmmac: Define CSUM offload engine Types Giuseppe CAVALLARO
2012-03-07 6:50 ` deepaksi
2012-03-05 15:31 ` [PATCH 0/6] stmmac: Driver Updates Giuseppe CAVALLARO
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