From: deepaksi <deepak.sikri@st.com>
To: Giuseppe CAVALLARO <peppe.cavallaro@st.com>
Cc: "netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"davem@davemloft.net" <davem@davemloft.net>,
Srinivas KANDAGATLA <srinivas.kandagatla@st.com>,
spear-devel <spear-devel@list.st.com>,
Shiraz HASHIM <shiraz.hashim@st.com>,
Viresh KUMAR <viresh.kumar@st.com>,
"bhutchings@solarflare.com" <bhutchings@solarflare.com>
Subject: Re: [PATCH 03/10] stmmac: sanitize the rx coe and add the type-1 csum
Date: Mon, 2 Apr 2012 21:48:07 +0530 [thread overview]
Message-ID: <4F79D13F.6020609@st.com> (raw)
In-Reply-To: <4F79887A.50804@st.com>
On 4/2/2012 4:37 PM, Giuseppe CAVALLARO wrote:
> On 3/24/2012 10:21 AM, Deepak SIKRI wrote:
>>
>>
>> On 3/23/2012 2:38 PM, Giuseppe CAVALLARO wrote:
>>> [snip]
>>>
>>>
>>> - priv->rx_coe = priv->hw->mac->rx_coe(priv->ioaddr);
>>> - if (priv->rx_coe)
>>> - pr_info(" RX Checksum Offload Engine supported\n");
>>> + if (priv->plat->rx_coe)
>>> + pr_info(" RX Checksum Offload Engine supported (type %d)\n",
>>> + priv->plat->rx_coe);
>>> if (priv->plat->tx_coe)
>>> pr_info(" TX Checksum insertion supported\n");
>>>
>> rx_coe needs to be enabled. Earlier it was being done. Any specific
>> reasons to remove this.
>> Instead this code needs to be moved post mac reset has been done.
> Hello Deepak
>
> sorry for this delay.
>
> I've not clear at all your question.
> The driver well uses the rx_coe as briefly described below:
>
> probe funct
> |__ hw_init
> |_ check the RX type from HW cap reg
> |__ Override the rx_coe if required
>
> After that the rx_coe is used and passed to the core as expected.
> In case of there is no HW cap register so the rx_coe from platform will
> be used.
>
> Peppe
In the same patch, this portion of the code has been removed.
-static int dwmac1000_rx_coe_supported(void __iomem *ioaddr)
-{
- u32 value = readl(ioaddr + GMAC_CONTROL);
-
- value |= GMAC_CONTROL_IPC;
- writel(value, ioaddr + GMAC_CONTROL);
-
- value = readl(ioaddr + GMAC_CONTROL);
-
- return !!(value& GMAC_CONTROL_IPC);
-}
Earlier this was taking care of setting the IP Checksum offloading feature
in case its available. This code has to be present, as I do not see any
other location where the IPC bit is being programmed.
Also, the location of setting the IPC should be post the mac has been reset.
I hope this clears the things a bit. Sorry for the miscommunication.
Rgds
Deepak
>> Regards
>> Deepak
>>
> .
>
next prev parent reply other threads:[~2012-04-02 16:19 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-03-23 9:08 [PATCH 00/10] stmmac update: March 2012 Giuseppe CAVALLARO
2012-03-23 9:08 ` [PATCH 01/10] stmmac: Allow stmmac to work with other PHY buses(v3) Giuseppe CAVALLARO
2012-03-23 9:08 ` [PATCH 02/10] stmmac: Define CSUM offload engine Types Giuseppe CAVALLARO
2012-03-23 9:08 ` [PATCH 03/10] stmmac: sanitize the rx coe and add the type-1 csum Giuseppe CAVALLARO
2012-03-24 9:21 ` deepaksi
2012-04-02 11:07 ` Giuseppe CAVALLARO
2012-04-02 16:18 ` deepaksi [this message]
2012-04-03 6:49 ` Giuseppe CAVALLARO
2012-04-03 7:56 ` deepaksi
2012-04-03 13:03 ` Giuseppe CAVALLARO
2012-03-23 9:08 ` [PATCH 04/10] stmmac: Define MDC clock selection macros Giuseppe CAVALLARO
2012-03-23 9:08 ` [PATCH 05/10] stmmac: re-work the internal GMAC DMA platf parameters Giuseppe CAVALLARO
2012-03-23 9:08 ` [PATCH 06/10] stmmac: Replace infinite loops by timeouts in mdio r/w Giuseppe CAVALLARO
2012-03-23 9:08 ` [PATCH 07/10] stmmac: add clk management support Giuseppe CAVALLARO
2012-03-23 9:08 ` [PATCH 08/10] stmmac: extend CSR Clock Range programming Giuseppe CAVALLARO
2012-03-23 9:08 ` [PATCH 09/10] stmmac: MDC clock dynamically based on the csr clock input Giuseppe CAVALLARO
2012-03-23 9:53 ` David Laight
2012-04-02 11:17 ` Giuseppe CAVALLARO
2012-03-23 9:08 ` [PATCH 10/10] stmmac: update the driver version March 2012 Giuseppe CAVALLARO
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=4F79D13F.6020609@st.com \
--to=deepak.sikri@st.com \
--cc=bhutchings@solarflare.com \
--cc=davem@davemloft.net \
--cc=netdev@vger.kernel.org \
--cc=peppe.cavallaro@st.com \
--cc=shiraz.hashim@st.com \
--cc=spear-devel@list.st.com \
--cc=srinivas.kandagatla@st.com \
--cc=viresh.kumar@st.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).