From: deepaksi <deepak.sikri@st.com>
To: Giuseppe CAVALLARO <peppe.cavallaro@st.com>
Cc: "netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"davem@davemloft.net" <davem@davemloft.net>,
Srinivas KANDAGATLA <srinivas.kandagatla@st.com>,
spear-devel <spear-devel@list.st.com>,
Shiraz HASHIM <shiraz.hashim@st.com>,
Viresh KUMAR <viresh.kumar@st.com>,
"bhutchings@solarflare.com" <bhutchings@solarflare.com>
Subject: Re: [PATCH 03/10] stmmac: sanitize the rx coe and add the type-1 csum
Date: Tue, 3 Apr 2012 13:26:59 +0530 [thread overview]
Message-ID: <4F7AAD4B.1010606@st.com> (raw)
In-Reply-To: <4F7A9D7E.8080007@st.com>
Ciao Peppe,
On 4/3/2012 12:19 PM, Giuseppe CAVALLARO wrote:
>
> [snip]
>> reset.
> Previously, the stmmac called the dwmac1000_rx_coe_supported to verify
> it could do the CSUM in Hw. If true the driver used the type 2 by default.
>
> I've voluntarily removed this function because not necessary anymore.
> In fact, YOU improved the rx_coe from the platform. If it is passed as
> STMMAC_RX_COE_NONE then it means the driver is not able to perform any
> csum for the incoming frames. This is actually used on old gmac/mac
> cores. In new cores, the HW cap register will be used to manage and fix
> this logic.
> I could restore the core you are mentioning but just to do another
> safety check at run-time in case of the user provided a broken setting
> from the platform and there is not the HW cap register. Hmm, I do not
> know if this actually could help indeed... just an extra check IMHO.
These are the updates required in the code.
In function dwmac1000_core_init(), you may need to set the IPC bit based
on the fact that
if rx_coe has been setup through the platform code.
This bit set is a must for the checksum offload to be enabled. Rest of
the code looks good.
Deepak
>> I hope this clears the things a bit. Sorry for the miscommunication.
> No problem for the miscommunication ;-)
>
> Let me know
> Ciao
> Peppe
>
>> Rgds
>> Deepak
>>
>>
>>
>>
>>
>>
>>>> Regards
>>>> Deepak
>>>>
>>> .
>>>
>>
> .
>
next prev parent reply other threads:[~2012-04-03 7:58 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-03-23 9:08 [PATCH 00/10] stmmac update: March 2012 Giuseppe CAVALLARO
2012-03-23 9:08 ` [PATCH 01/10] stmmac: Allow stmmac to work with other PHY buses(v3) Giuseppe CAVALLARO
2012-03-23 9:08 ` [PATCH 02/10] stmmac: Define CSUM offload engine Types Giuseppe CAVALLARO
2012-03-23 9:08 ` [PATCH 03/10] stmmac: sanitize the rx coe and add the type-1 csum Giuseppe CAVALLARO
2012-03-24 9:21 ` deepaksi
2012-04-02 11:07 ` Giuseppe CAVALLARO
2012-04-02 16:18 ` deepaksi
2012-04-03 6:49 ` Giuseppe CAVALLARO
2012-04-03 7:56 ` deepaksi [this message]
2012-04-03 13:03 ` Giuseppe CAVALLARO
2012-03-23 9:08 ` [PATCH 04/10] stmmac: Define MDC clock selection macros Giuseppe CAVALLARO
2012-03-23 9:08 ` [PATCH 05/10] stmmac: re-work the internal GMAC DMA platf parameters Giuseppe CAVALLARO
2012-03-23 9:08 ` [PATCH 06/10] stmmac: Replace infinite loops by timeouts in mdio r/w Giuseppe CAVALLARO
2012-03-23 9:08 ` [PATCH 07/10] stmmac: add clk management support Giuseppe CAVALLARO
2012-03-23 9:08 ` [PATCH 08/10] stmmac: extend CSR Clock Range programming Giuseppe CAVALLARO
2012-03-23 9:08 ` [PATCH 09/10] stmmac: MDC clock dynamically based on the csr clock input Giuseppe CAVALLARO
2012-03-23 9:53 ` David Laight
2012-04-02 11:17 ` Giuseppe CAVALLARO
2012-03-23 9:08 ` [PATCH 10/10] stmmac: update the driver version March 2012 Giuseppe CAVALLARO
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