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(dynamic-2a01-0c23-c18f-4600-8999-0532-b66e-c213.c23.pool.telefonica.de. [2a01:c23:c18f:4600:8999:532:b66e:c213]) by smtp.googlemail.com with ESMTPSA id d25-20020a50fb19000000b0050cc4461fc5sm6101880edq.92.2023.05.31.12.08.53 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 31 May 2023 12:08:54 -0700 (PDT) Message-ID: <4a6c413c-8791-fd00-a73e-7a12413693e3@gmail.com> Date: Wed, 31 May 2023 21:08:53 +0200 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.11.2 Subject: Re: [PATCH 2/2] net: phy: realtek: Add optional external PHY clock To: Detlev Casanova , linux-kernel@vger.kernel.org Cc: Andrew Lunn , Russell King , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , netdev@vger.kernel.org, devicetree@vger.kernel.org References: <20230531150340.522994-1-detlev.casanova@collabora.com> <20230531150340.522994-2-detlev.casanova@collabora.com> Content-Language: en-US From: Heiner Kallweit In-Reply-To: <20230531150340.522994-2-detlev.casanova@collabora.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM,NICE_REPLY_A,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net On 31.05.2023 17:03, Detlev Casanova wrote: > In some cases, the PHY can use an external clock source instead of a > crystal. > > Add an optional clock in the phy node to make sure that the clock source > is enabled, if specified, before probing. > > Signed-off-by: Detlev Casanova > --- > drivers/net/phy/realtek.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c > index 3d99fd6664d7..70c75dbbf799 100644 > --- a/drivers/net/phy/realtek.c > +++ b/drivers/net/phy/realtek.c > @@ -12,6 +12,7 @@ > #include > #include > #include > +#include > > #define RTL821x_PHYSR 0x11 > #define RTL821x_PHYSR_DUPLEX BIT(13) > @@ -80,6 +81,7 @@ struct rtl821x_priv { > u16 phycr1; > u16 phycr2; > bool has_phycr2; > + struct clk *clk; > }; > > static int rtl821x_read_page(struct phy_device *phydev) > @@ -103,6 +105,11 @@ static int rtl821x_probe(struct phy_device *phydev) > if (!priv) > return -ENOMEM; > > + priv->clk = devm_clk_get_optional_enabled(dev, "xtal"); Why add priv->clk if it isn't used outside probe()? How about suspend/resume? Would it make sense to stop the clock whilst PHY is suspended? > + if (IS_ERR(priv->clk)) > + return dev_err_probe(dev, PTR_ERR(priv->clk), > + "failed to get phy xtal clock\n"); > + > ret = phy_read_paged(phydev, 0xa43, RTL8211F_PHYCR1); > if (ret < 0) > return ret;