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From: <Parthiban.Veerasooran@microchip.com>
To: <andrew@lunn.ch>
Cc: <hkallweit1@gmail.com>, <linux@armlinux.org.uk>,
	<davem@davemloft.net>, <edumazet@google.com>, <kuba@kernel.org>,
	<pabeni@redhat.com>, <netdev@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<ramon.nordin.rodriguez@ferroamp.se>,
	<Horatiu.Vultur@microchip.com>, <Woojung.Huh@microchip.com>,
	<Nicolas.Ferre@microchip.com>,
	<Thorsten.Kummermehr@microchip.com>
Subject: Re: [PATCH net-next v2 6/6] net: phy: microchip_t1s: add support for Microchip LAN865x Rev.B0 PHYs
Date: Wed, 24 May 2023 07:25:16 +0000	[thread overview]
Message-ID: <4b873053-38d8-f642-a5be-d9eba1f408fe@microchip.com> (raw)
In-Reply-To: <819531cd-ebd7-4734-b35b-8f8c3d138004@lunn.ch>

Hi Andrew,

On 23/05/23 5:59 pm, Andrew Lunn wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
>>> Is this doing a read from fuses? Is anything documented about this?
>>> What the values mean? Would a board designer ever need to use
>>> different values? Or is this just a case of 'trust us', you don't need
>>> to understand this magic.
>> Yes, it is a read from fuses and those values are specific/unique for
>> each PHY chip. Those values are calculated based on some characteristics
>> of the PHY chip behavior for optimal performance and they are fused in
>> the PHY chip for the driver to configure it during the initialization.
>> This is done in the production/testing stage of the PHY chip. As it is
>> specific to PHY chip, a board designer doesn't have any influence on
>> this and need not to worry about it. Unfortunately they can't be
>> documented anywhere as they are design specific. So simply 'trust us'.
> 
> O.K. Please consider for future generations that you move all this
> magic into the PHY firmware. There does not seem to be any reason the
> OS needs to know about this.
Thanks for the feedback.

Best Regards,
Parthiban V
> 
>       Andrew


  reply	other threads:[~2023-05-24  7:25 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-22 11:33 [PATCH net-next v2 0/6] microchip_t1s: Update on Microchip 10BASE-T1S PHY driver Parthiban Veerasooran
2023-05-22 11:33 ` [PATCH net-next v2 1/6] net: phy: microchip_t1s: modify driver description to be more generic Parthiban Veerasooran
2023-05-22 12:27   ` Andrew Lunn
2023-05-22 11:33 ` [PATCH net-next v2 2/6] net: phy: microchip_t1s: replace read-modify-write code with phy_modify_mmd Parthiban Veerasooran
2023-05-22 12:31   ` Andrew Lunn
2023-05-23  6:15     ` Parthiban.Veerasooran
2023-05-22 11:33 ` [PATCH net-next v2 3/6] net: phy: microchip_t1s: update LAN867x PHY supported revision number Parthiban Veerasooran
2023-05-22 12:38   ` Andrew Lunn
2023-05-23  6:25     ` Parthiban.Veerasooran
2023-05-22 11:33 ` [PATCH net-next v2 4/6] net: phy: microchip_t1s: fix reset complete status handling Parthiban Veerasooran
2023-05-22 12:43   ` Andrew Lunn
2023-05-23  5:30     ` Parthiban.Veerasooran
2023-05-23 12:23       ` Andrew Lunn
2023-05-24  7:24         ` Parthiban.Veerasooran
2023-05-24  7:31         ` Parthiban.Veerasooran
2023-05-24 12:03           ` Andrew Lunn
2023-05-24 13:21             ` Parthiban.Veerasooran
2023-05-22 11:33 ` [PATCH net-next v2 5/6] net: phy: microchip_t1s: remove unnecessary interrupts disabling code Parthiban Veerasooran
2023-05-22 12:45   ` Andrew Lunn
2023-05-22 11:33 ` [PATCH net-next v2 6/6] net: phy: microchip_t1s: add support for Microchip LAN865x Rev.B0 PHYs Parthiban Veerasooran
2023-05-22 12:56   ` Andrew Lunn
2023-05-23  6:13     ` Parthiban.Veerasooran
2023-05-23 12:29       ` Andrew Lunn
2023-05-24  7:25         ` Parthiban.Veerasooran [this message]
2023-05-22 15:02   ` Simon Horman
2023-05-23  5:33     ` Parthiban.Veerasooran

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