From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 082E8E57E for ; Tue, 8 Aug 2023 11:03:50 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 15FDFC433C8; Tue, 8 Aug 2023 11:03:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691492630; bh=A+mqCpN+QuFAcnM1ap+yOp5utSXZlVUNIHG5R4odB6M=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=Lik0sr/+SSNBgc79MfJ0720gb9FA9wUR4ajKbE4hlQU6LR65Rua/0DtXWZPnb1DcG O8S9x3mi3rg6f3b/25KTN1yGu+//8gTrvLdJNpL6MBlgN+OL7yD/a5LCCQ7s5wRz+W il/KbU0sOxJm3PI2uS15NacnsFKi4D8/aNvPGNKTSu+f1v7cEoyXzlOm9qUZGjOjBo 2XjDDJUpf9x71LBBoQtAEXWcTLpdyF0gxg1ikRhp+ZMePGOLAGme6a9c6PjX0IYCCl sPPm2ZRYpnLlp42kQv2Vr5psLo4DHDAqcZCzE+6CtOX/1phyAG/52byRnUO6ef2GKQ HrZXAh5+GT4WA== Message-ID: <4c0dfd1c-2b61-b954-73ad-ac8d4b82487d@kernel.org> Date: Tue, 8 Aug 2023 06:03:47 -0500 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: Re: [PATCH v2 4/5] clk: socfpga: agilex: add clock driver for the Agilex5 Content-Language: en-US To: niravkumar.l.rabara@intel.com Cc: adrian.ho.yin.ng@intel.com, andrew@lunn.ch, conor+dt@kernel.org, devicetree@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, mturquette@baylibre.com, netdev@vger.kernel.org, p.zabel@pengutronix.de, richardcochran@gmail.com, robh+dt@kernel.org, sboyd@kernel.org, wen.ping.teh@intel.com References: <20230618132235.728641-1-niravkumar.l.rabara@intel.com> <20230801010234.792557-1-niravkumar.l.rabara@intel.com> <20230801010234.792557-5-niravkumar.l.rabara@intel.com> From: Dinh Nguyen In-Reply-To: <20230801010234.792557-5-niravkumar.l.rabara@intel.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi Stephen/Mike, On 7/31/23 20:02, niravkumar.l.rabara@intel.com wrote: > From: Niravkumar L Rabara > > Add support for Intel's SoCFPGA Agilex5 platform. The clock manager > driver for the Agilex5 is very similar to the Agilex platform,we can > re-use most of the Agilex clock driver. > > Signed-off-by: Teh Wen Ping > Reviewed-by: Dinh Nguyen > Signed-off-by: Niravkumar L Rabara > --- > drivers/clk/socfpga/clk-agilex.c | 433 ++++++++++++++++++++++++++++++- > 1 file changed, 431 insertions(+), 2 deletions(-) > If you're ok with this patch, can I take this through armsoc? Dinh