* [PATCH net-next] net: phy: mscc: the extended page access register is 16 bits
@ 2018-07-30 12:53 Quentin Schulz
2018-07-30 14:01 ` Andrew Lunn
` (3 more replies)
0 siblings, 4 replies; 6+ messages in thread
From: Quentin Schulz @ 2018-07-30 12:53 UTC (permalink / raw)
To: andrew, f.fainelli, davem
Cc: netdev, alexandre.belloni, linux-kernel, thomas.petazzoni,
Quentin Schulz
The Extended Page Access is a 16-bit register, so change the page
parameter of vsc85xx_phy_page_set to a u16.
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
---
drivers/net/phy/mscc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/phy/mscc.c b/drivers/net/phy/mscc.c
index 650c2667d523..84ca9ff40ae0 100644
--- a/drivers/net/phy/mscc.c
+++ b/drivers/net/phy/mscc.c
@@ -123,7 +123,7 @@ static const struct vsc8531_edge_rate_table edge_table[] = {
};
#endif /* CONFIG_OF_MDIO */
-static int vsc85xx_phy_page_set(struct phy_device *phydev, u8 page)
+static int vsc85xx_phy_page_set(struct phy_device *phydev, u16 page)
{
int rc;
--
2.17.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH net-next] net: phy: mscc: the extended page access register is 16 bits
2018-07-30 12:53 [PATCH net-next] net: phy: mscc: the extended page access register is 16 bits Quentin Schulz
@ 2018-07-30 14:01 ` Andrew Lunn
2018-07-30 14:13 ` Alexandre Belloni
` (2 subsequent siblings)
3 siblings, 0 replies; 6+ messages in thread
From: Andrew Lunn @ 2018-07-30 14:01 UTC (permalink / raw)
To: Quentin Schulz
Cc: f.fainelli, davem, netdev, alexandre.belloni, linux-kernel,
thomas.petazzoni
On Mon, Jul 30, 2018 at 02:53:13PM +0200, Quentin Schulz wrote:
> The Extended Page Access is a 16-bit register, so change the page
> parameter of vsc85xx_phy_page_set to a u16.
>
> Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH net-next] net: phy: mscc: the extended page access register is 16 bits
2018-07-30 12:53 [PATCH net-next] net: phy: mscc: the extended page access register is 16 bits Quentin Schulz
2018-07-30 14:01 ` Andrew Lunn
@ 2018-07-30 14:13 ` Alexandre Belloni
2018-07-30 16:43 ` David Miller
2018-07-30 16:53 ` Florian Fainelli
3 siblings, 0 replies; 6+ messages in thread
From: Alexandre Belloni @ 2018-07-30 14:13 UTC (permalink / raw)
To: Quentin Schulz
Cc: andrew, f.fainelli, davem, netdev, linux-kernel, thomas.petazzoni
On 30/07/2018 14:53:13+0200, Quentin Schulz wrote:
> The Extended Page Access is a 16-bit register, so change the page
> parameter of vsc85xx_phy_page_set to a u16.
>
> Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
> ---
> drivers/net/phy/mscc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/net/phy/mscc.c b/drivers/net/phy/mscc.c
> index 650c2667d523..84ca9ff40ae0 100644
> --- a/drivers/net/phy/mscc.c
> +++ b/drivers/net/phy/mscc.c
> @@ -123,7 +123,7 @@ static const struct vsc8531_edge_rate_table edge_table[] = {
> };
> #endif /* CONFIG_OF_MDIO */
>
> -static int vsc85xx_phy_page_set(struct phy_device *phydev, u8 page)
> +static int vsc85xx_phy_page_set(struct phy_device *phydev, u16 page)
> {
> int rc;
>
> --
> 2.17.1
>
--
Alexandre Belloni, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH net-next] net: phy: mscc: the extended page access register is 16 bits
2018-07-30 12:53 [PATCH net-next] net: phy: mscc: the extended page access register is 16 bits Quentin Schulz
2018-07-30 14:01 ` Andrew Lunn
2018-07-30 14:13 ` Alexandre Belloni
@ 2018-07-30 16:43 ` David Miller
2018-07-30 16:53 ` Florian Fainelli
3 siblings, 0 replies; 6+ messages in thread
From: David Miller @ 2018-07-30 16:43 UTC (permalink / raw)
To: quentin.schulz
Cc: andrew, f.fainelli, netdev, alexandre.belloni, linux-kernel,
thomas.petazzoni
From: Quentin Schulz <quentin.schulz@bootlin.com>
Date: Mon, 30 Jul 2018 14:53:13 +0200
> The Extended Page Access is a 16-bit register, so change the page
> parameter of vsc85xx_phy_page_set to a u16.
>
> Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Applied.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH net-next] net: phy: mscc: the extended page access register is 16 bits
2018-07-30 12:53 [PATCH net-next] net: phy: mscc: the extended page access register is 16 bits Quentin Schulz
` (2 preceding siblings ...)
2018-07-30 16:43 ` David Miller
@ 2018-07-30 16:53 ` Florian Fainelli
2018-07-31 6:43 ` Quentin Schulz
3 siblings, 1 reply; 6+ messages in thread
From: Florian Fainelli @ 2018-07-30 16:53 UTC (permalink / raw)
To: Quentin Schulz, andrew, davem
Cc: netdev, alexandre.belloni, linux-kernel, thomas.petazzoni
On 07/30/2018 05:53 AM, Quentin Schulz wrote:
> The Extended Page Access is a 16-bit register, so change the page
> parameter of vsc85xx_phy_page_set to a u16.
>
> Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Since you targeted net-next for this patch, I am assuming this is not
yet a problem, but would soon be one with the changes you plan on
introducing?
> ---
> drivers/net/phy/mscc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/net/phy/mscc.c b/drivers/net/phy/mscc.c
> index 650c2667d523..84ca9ff40ae0 100644
> --- a/drivers/net/phy/mscc.c
> +++ b/drivers/net/phy/mscc.c
> @@ -123,7 +123,7 @@ static const struct vsc8531_edge_rate_table edge_table[] = {
> };
> #endif /* CONFIG_OF_MDIO */
>
> -static int vsc85xx_phy_page_set(struct phy_device *phydev, u8 page)
> +static int vsc85xx_phy_page_set(struct phy_device *phydev, u16 page)
> {
> int rc;
>
>
--
Florian
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH net-next] net: phy: mscc: the extended page access register is 16 bits
2018-07-30 16:53 ` Florian Fainelli
@ 2018-07-31 6:43 ` Quentin Schulz
0 siblings, 0 replies; 6+ messages in thread
From: Quentin Schulz @ 2018-07-31 6:43 UTC (permalink / raw)
To: Florian Fainelli
Cc: andrew, davem, netdev, alexandre.belloni, linux-kernel,
thomas.petazzoni
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Hi Florian,
On Mon, Jul 30, 2018 at 09:53:31AM -0700, Florian Fainelli wrote:
> On 07/30/2018 05:53 AM, Quentin Schulz wrote:
> > The Extended Page Access is a 16-bit register, so change the page
> > parameter of vsc85xx_phy_page_set to a u16.
> >
> > Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
>
> Since you targeted net-next for this patch, I am assuming this is not
> yet a problem, but would soon be one with the changes you plan on
> introducing?
>
Yes indeed. When I get the quad-port PHY things to go as planned, then
I'll need sometimes to change to a page that is above the size of a u16.
For now, all the pages are accessed with a number that is lower than the
size of a u16, so it isn't a problem.
Quentin
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^ permalink raw reply [flat|nested] 6+ messages in thread
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2018-07-30 12:53 [PATCH net-next] net: phy: mscc: the extended page access register is 16 bits Quentin Schulz
2018-07-30 14:01 ` Andrew Lunn
2018-07-30 14:13 ` Alexandre Belloni
2018-07-30 16:43 ` David Miller
2018-07-30 16:53 ` Florian Fainelli
2018-07-31 6:43 ` Quentin Schulz
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