From: Paolo Abeni <pabeni@redhat.com>
To: Vimlesh Kumar <vimleshk@marvell.com>,
netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: sedara@marvell.com, srasheed@marvell.com, hgani@marvell.com,
Veerasenareddy Burru <vburru@marvell.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>,
Satananda Burla <sburla@marvell.com>,
Abhijit Ayarekar <aayarekar@marvell.com>
Subject: Re: [PATCH RESEND net v1 1/2] octeon_ep: avoid compiler and IQ/OQ reordering
Date: Tue, 17 Feb 2026 10:56:43 +0100 [thread overview]
Message-ID: <4e07f6b8-5225-46e0-b3ac-d02495392835@redhat.com> (raw)
In-Reply-To: <20260212121634.360252-2-vimleshk@marvell.com>
On 2/12/26 1:16 PM, Vimlesh Kumar wrote:
> Utilize READ_ONCE and WRITE_ONCE APIs for IO queue Tx/Rx
> variable access to prevent compiler optimization and reordering.
You must include into the commit message a more detalied description of
what could possibly go wrong and way. Also why wmb/rmb are not enough?
AFAICS this is the only driver requiring such annotations to cooperate
with the H/W and/or the firmware.
> Additionally, ensure IO queue OUT/IN_CNT registers are flushed
> by performing a read-back after writing.
>
> Relocate IQ/OQ IN/OUT_CNTS updates to occur before NAPI completion,
> and replace napi_complete with napi_complete_done.
This looks like a separate change, and again requires a more complete
explaination of what could possibly go wrong and why.
/P
next prev parent reply other threads:[~2026-02-17 9:56 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-12 12:16 [PATCH RESEND net v1 0/2] avoid compiler and IQ/OQ reordering Vimlesh Kumar
2026-02-12 12:16 ` [PATCH RESEND net v1 1/2] octeon_ep: " Vimlesh Kumar
2026-02-17 9:56 ` Paolo Abeni [this message]
2026-02-20 9:05 ` [EXTERNAL] " Vimlesh Kumar
2026-02-12 12:16 ` [PATCH RESEND net v1 2/2] octeon_ep_vf: " Vimlesh Kumar
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