From: Jiri Pirko <jiri@resnulli.us>
To: Grzegorz Nitka <grzegorz.nitka@intel.com>
Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
intel-wired-lan@lists.osuosl.org, poros@redhat.com,
richardcochran@gmail.com, andrew+netdev@lunn.ch,
przemyslaw.kitszel@intel.com, anthony.l.nguyen@intel.com,
Prathosh.Satish@microchip.com, ivecera@redhat.com,
arkadiusz.kubalewski@intel.com, vadim.fedorenko@linux.dev,
donald.hunter@gmail.com, horms@kernel.org, pabeni@redhat.com,
kuba@kernel.org, davem@davemloft.net, edumazet@google.com,
Aleksandr Loktionov <aleksandr.loktionov@intel.com>
Subject: Re: [PATCH v2 net-next 2/8] dpll: allow registering FW-identified pin with a different DPLL
Date: Tue, 24 Mar 2026 13:31:16 +0100 [thread overview]
Message-ID: <4h6vp6vzu54okdnckxd52tg6oz3lhf3wy52xfkbluytc3gs6bn@dyu32dx4pnii> (raw)
In-Reply-To: <20260321222627.1193603-3-grzegorz.nitka@intel.com>
Sat, Mar 21, 2026 at 11:26:21PM +0100, grzegorz.nitka@intel.com wrote:
>Relax the (module, clock_id) equality requirement when registering a
>pin identified by firmware (pin->fwnode). Some platforms associate a
>FW-described pin with a DPLL instance that differs from the pin's
>(module, clock_id) tuple. For such pins, permit registration without
>requiring the strict match. Non-FW pins still require equality.
>
>Reviewed-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
>Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
>Signed-off-by: Grzegorz Nitka <grzegorz.nitka@intel.com>
Reviewed-by: Jiri Pirko <jiri@nvidia.com>
next prev parent reply other threads:[~2026-03-24 12:31 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-21 22:26 [PATCH v2 net-next 0/8] dpll/ice: Add TXC DPLL type and full TX reference clock control for E825 Grzegorz Nitka
2026-03-21 22:26 ` [PATCH v2 net-next 1/8] dpll: add new DPLL type for transmit clock (TXC) usage Grzegorz Nitka
2026-03-24 12:31 ` Jiri Pirko
2026-03-21 22:26 ` [PATCH v2 net-next 2/8] dpll: allow registering FW-identified pin with a different DPLL Grzegorz Nitka
2026-03-24 12:31 ` Jiri Pirko [this message]
2026-03-21 22:26 ` [PATCH v2 net-next 3/8] dpll: extend pin notifier and netlink events with notification source ID Grzegorz Nitka
2026-03-24 12:30 ` Jiri Pirko
2026-03-21 22:26 ` [PATCH v2 net-next 4/8] dpll: zl3073x: allow SyncE_Ref pin state change Grzegorz Nitka
2026-03-24 14:43 ` Ivan Vecera
2026-03-25 16:34 ` Nitka, Grzegorz
2026-03-21 22:26 ` [PATCH v2 net-next 5/8] ice: add TX clock (TXC) DPLL interface for E825 devices Grzegorz Nitka
2026-03-21 22:26 ` [PATCH v2 net-next 6/8] ice: implement CPI support for E825C Grzegorz Nitka
2026-03-21 22:26 ` [PATCH v2 net-next 7/8] ice: add Tx reference clock index handling to AN restart command Grzegorz Nitka
2026-03-21 22:26 ` [PATCH v2 net-next 8/8] ice: add TX reference clock (tx_clk) control for E825 devices Grzegorz Nitka
2026-03-24 8:20 ` [Intel-wired-lan] " Loktionov, Aleksandr
2026-03-26 10:14 ` Nitka, Grzegorz
2026-03-23 21:19 ` [PATCH v2 net-next 0/8] dpll/ice: Add TXC DPLL type and full TX reference clock control for E825 Jakub Kicinski
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