Re: [PATCH RFC net-next v2 1/7] net: stmmac: add BASE-X support to integrated PCS

[Maxime Chevallier <maxime.chevallier@bootlin.com>]

Hello Russell,

On 04/03/2026 09:48, Russell King (Oracle) wrote:
> The integrated PCS supports 802.3z (BASE-X) modes when the Synopsys
> IP is coupled with an appropriate SerDes to provide the electrical
> interface. The PCS presents a TBI interface to the SerDes for this.
> Thus, the BASE-X related registers are only present when TBI mode is
> supported.
> 
> dwmac-qcom-ethqos added support for using 2.5G with the integrated PCS
> by calling dwmac_ctrl_ane() directly.
> 
> Add support for the following to the integrated PCS:
> - 1000BASE-X protocol unconditionally.
> - 2500BASE-X if the coupled SerDes supports 2.5G speed.
> - The above without autonegotiation.
> - If the PCS supports TBI, then optional BASE-X autonegotiation for each
>   of the above.
> 
> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>

Haven't tested ofc, but this patch looks good to me (well, my knowledge
about 1000BaseX vs SGMII w.r.t aneg mostly comes from you in the first
place).

Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com>

Maxime
> ---
>  .../net/ethernet/stmicro/stmmac/stmmac_pcs.c  | 96 ++++++++++++++++++-
>  .../net/ethernet/stmicro/stmmac/stmmac_pcs.h  |  1 +
>  include/linux/stmmac.h                        |  1 +
>  3 files changed, 95 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c
> index 88fa359ea716..e606dfb85f94 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c
> @@ -16,6 +16,27 @@
>  #define GMAC_ANE_LPA	0x0c	/* ANE link partener ability */
>  #define GMAC_TBI	0x14	/* TBI extend status */
>  
> +static unsigned int dwmac_integrated_pcs_inband_caps(struct phylink_pcs *pcs,
> +						     phy_interface_t interface)
> +{
> +	struct stmmac_pcs *spcs = phylink_pcs_to_stmmac_pcs(pcs);
> +	unsigned int ib_caps;
> +
> +	if (phy_interface_mode_is_8023z(interface)) {
> +		ib_caps = LINK_INBAND_DISABLE;
> +
> +		/* If the PCS supports TBI/RTBI, then BASE-X negotiation is
> +		 * supported.
> +		 */
> +		if (spcs->support_tbi_rtbi)
> +			ib_caps |= LINK_INBAND_ENABLE;
> +
> +		return ib_caps;
> +	}
> +
> +	return 0;
> +}
> +
>  static int dwmac_integrated_pcs_enable(struct phylink_pcs *pcs)
>  {
>  	struct stmmac_pcs *spcs = phylink_pcs_to_stmmac_pcs(pcs);
> @@ -36,7 +57,39 @@ static void dwmac_integrated_pcs_get_state(struct phylink_pcs *pcs,
>  					   unsigned int neg_mode,
>  					   struct phylink_link_state *state)
>  {
> -	state->link = false;
> +	struct stmmac_pcs *spcs = phylink_pcs_to_stmmac_pcs(pcs);
> +	u32 status, lpa;
> +
> +	status = readl(spcs->base + GMAC_AN_STATUS);
> +
> +	if (phy_interface_mode_is_8023z(state->interface)) {
> +		/* For BASE-X modes, the PCS block supports the advertisement
> +		 * and link partner advertisement registers using standard
> +		 * 802.3 format. The status register also has the link status
> +		 * and AN complete bits in the same bit location. This will
> +		 * only be used when AN is enabled.
> +		 */
> +		lpa = readl(spcs->base + GMAC_ANE_LPA);
> +
> +		phylink_mii_c22_pcs_decode_state(state, neg_mode, status, lpa);
> +	} else {
> +		state->link = false;
> +	}
> +}
> +
> +static int dwmac_integrated_pcs_config_aneg(struct stmmac_pcs *spcs,
> +					    phy_interface_t interface,
> +					    const unsigned long *advertising)
> +{
> +	bool changed = false;
> +	u32 adv;
> +
> +	adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);
> +	if (readl(spcs->base + GMAC_ANE_ADV) != adv)
> +		changed = true;
> +	writel(adv, spcs->base + GMAC_ANE_ADV);
> +
> +	return changed;
>  }
>  
>  static int dwmac_integrated_pcs_config(struct phylink_pcs *pcs,
> @@ -46,13 +99,28 @@ static int dwmac_integrated_pcs_config(struct phylink_pcs *pcs,
>  				       bool permit_pause_to_mac)
>  {
>  	struct stmmac_pcs *spcs = phylink_pcs_to_stmmac_pcs(pcs);
> +	bool changed = false, ane = true;
> +
> +	/* Only configure the advertisement and allow AN in BASE-X mode if
> +	 * the core supports TBI/RTBI. AN will be filtered out by via phylink
> +	 * and the .pcs_inband_caps() method above.
> +	 */
> +	if (phy_interface_mode_is_8023z(interface) &&
> +	    spcs->support_tbi_rtbi) {
> +		ane = neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED;
> +
> +		changed = dwmac_integrated_pcs_config_aneg(spcs, interface,
> +							   advertising);
> +	}
>  
> -	dwmac_ctrl_ane(spcs->base, 0, 1, spcs->priv->hw->reverse_sgmii_enable);
> +	dwmac_ctrl_ane(spcs->base, 0, ane,
> +		       spcs->priv->hw->reverse_sgmii_enable);
>  
> -	return 0;
> +	return changed;
>  }
>  
>  static const struct phylink_pcs_ops dwmac_integrated_pcs_ops = {
> +	.pcs_inband_caps = dwmac_integrated_pcs_inband_caps,
>  	.pcs_enable = dwmac_integrated_pcs_enable,
>  	.pcs_disable = dwmac_integrated_pcs_disable,
>  	.pcs_get_state = dwmac_integrated_pcs_get_state,
> @@ -84,9 +152,18 @@ void stmmac_integrated_pcs_irq(struct stmmac_priv *priv, u32 status,
>  int stmmac_integrated_pcs_get_phy_intf_sel(struct phylink_pcs *pcs,
>  					   phy_interface_t interface)
>  {
> +	struct stmmac_pcs *spcs = phylink_pcs_to_stmmac_pcs(pcs);
> +
>  	if (interface == PHY_INTERFACE_MODE_SGMII)
>  		return PHY_INTF_SEL_SGMII;
>  
> +	if (phy_interface_mode_is_8023z(interface)) {
> +		if (spcs->support_tbi_rtbi)
> +			return PHY_INTF_SEL_TBI;
> +		else
> +			return PHY_INTF_SEL_SGMII;
> +	}
> +
>  	return -EINVAL;
>  }
>  
> @@ -104,7 +181,20 @@ int stmmac_integrated_pcs_init(struct stmmac_priv *priv, unsigned int offset,
>  	spcs->int_mask = int_mask;
>  	spcs->pcs.ops = &dwmac_integrated_pcs_ops;
>  
> +	/* If the PCS supports extended status, then it supports BASE-X AN
> +	 * with a TBI interface to the SerDes. Otherwise, we can support
> +	 * BASE-X without AN using SGMII, which is required for qcom-ethqos.
> +	 */
> +	if (readl(spcs->base + GMAC_AN_STATUS) & BMSR_ESTATEN)
> +		spcs->support_tbi_rtbi = true;
> +
>  	__set_bit(PHY_INTERFACE_MODE_SGMII, spcs->pcs.supported_interfaces);
> +	__set_bit(PHY_INTERFACE_MODE_1000BASEX, spcs->pcs.supported_interfaces);
> +
> +	/* Only allow 2500BASE-X if the SerDes has support. */
> +	if (priv->plat->flags & STMMAC_FLAG_SERDES_SUPPORTS_2500M)
> +		__set_bit(PHY_INTERFACE_MODE_2500BASEX,
> +			  spcs->pcs.supported_interfaces);
>  
>  	priv->integrated_pcs = spcs;
>  
> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
> index 23bbd4f10bf8..12ea87792fcb 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
> @@ -32,6 +32,7 @@ struct stmmac_pcs {
>  	void __iomem *base;
>  	u32 int_mask;
>  	struct phylink_pcs pcs;
> +	bool support_tbi_rtbi;
>  };
>  
>  static inline struct stmmac_pcs *
> diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h
> index 2fc169c7117e..3a99c4ef420c 100644
> --- a/include/linux/stmmac.h
> +++ b/include/linux/stmmac.h
> @@ -192,6 +192,7 @@ enum dwmac_core_type {
>  #define STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP	BIT(12)
>  #define STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY	BIT(13)
>  #define STMMAC_FLAG_KEEP_PREAMBLE_BEFORE_SFD	BIT(14)
> +#define STMMAC_FLAG_SERDES_SUPPORTS_2500M	BIT(15)
>  
>  struct mac_device_info;
>