[PATCH net 0/3] Bug fixes for cxgb4 and cxgb4vf

[PATCH net 0/3] Bug fixes for cxgb4 and cxgb4vf

[Vipul Pandya]

Hi All,

This patch series does the following:
1. Passes correct PF number during initialization of pci_device_id structure
2. Adds code in cxgb4 and cxgb4vf driver to handle CPL_SGE_EGR_UPDATE message
   encapsulated in a CPL_FW4_MSG.

We would like to request this patch series to get merged via David Miller's
'net' tree.

Thanks,
Vipul

Vipul Pandya (3):
  cxgb4: Fix pci_device_id structure initialization with correct PF
    number
  cxgb4: Support CPL_SGE_EGR_UPDATEs encapsulated in a CPL_FW4_MSG
  cxgb4vf: Support CPL_SGE_EGR_UPDATEs encapsulated in a CPL_FW4_MSG

 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c    | 107 +++++++++++++--------
 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h        |  11 +++
 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h      |  38 +++++++-
 .../net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c    |  25 +++++
 4 files changed, 140 insertions(+), 41 deletions(-)

-- 
1.8.0

[PATCH net 1/3] cxgb4: Fix pci_device_id structure initialization with correct PF number

[Vipul Pandya]

Signed-off-by: Vipul Pandya <vipul@chelsio.com>
---
 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | 76 ++++++++++++-------------
 1 file changed, 38 insertions(+), 38 deletions(-)

diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
index 6a6a01a..656f934 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
@@ -229,44 +229,44 @@ static DEFINE_PCI_DEVICE_TABLE(cxgb4_pci_tbl) = {
 	CH_DEVICE(0x440a, 4),
 	CH_DEVICE(0x440d, 4),
 	CH_DEVICE(0x440e, 4),
-	CH_DEVICE(0x5001, 5),
-	CH_DEVICE(0x5002, 5),
-	CH_DEVICE(0x5003, 5),
-	CH_DEVICE(0x5004, 5),
-	CH_DEVICE(0x5005, 5),
-	CH_DEVICE(0x5006, 5),
-	CH_DEVICE(0x5007, 5),
-	CH_DEVICE(0x5008, 5),
-	CH_DEVICE(0x5009, 5),
-	CH_DEVICE(0x500A, 5),
-	CH_DEVICE(0x500B, 5),
-	CH_DEVICE(0x500C, 5),
-	CH_DEVICE(0x500D, 5),
-	CH_DEVICE(0x500E, 5),
-	CH_DEVICE(0x500F, 5),
-	CH_DEVICE(0x5010, 5),
-	CH_DEVICE(0x5011, 5),
-	CH_DEVICE(0x5012, 5),
-	CH_DEVICE(0x5013, 5),
-	CH_DEVICE(0x5401, 5),
-	CH_DEVICE(0x5402, 5),
-	CH_DEVICE(0x5403, 5),
-	CH_DEVICE(0x5404, 5),
-	CH_DEVICE(0x5405, 5),
-	CH_DEVICE(0x5406, 5),
-	CH_DEVICE(0x5407, 5),
-	CH_DEVICE(0x5408, 5),
-	CH_DEVICE(0x5409, 5),
-	CH_DEVICE(0x540A, 5),
-	CH_DEVICE(0x540B, 5),
-	CH_DEVICE(0x540C, 5),
-	CH_DEVICE(0x540D, 5),
-	CH_DEVICE(0x540E, 5),
-	CH_DEVICE(0x540F, 5),
-	CH_DEVICE(0x5410, 5),
-	CH_DEVICE(0x5411, 5),
-	CH_DEVICE(0x5412, 5),
-	CH_DEVICE(0x5413, 5),
+	CH_DEVICE(0x5001, 4),
+	CH_DEVICE(0x5002, 4),
+	CH_DEVICE(0x5003, 4),
+	CH_DEVICE(0x5004, 4),
+	CH_DEVICE(0x5005, 4),
+	CH_DEVICE(0x5006, 4),
+	CH_DEVICE(0x5007, 4),
+	CH_DEVICE(0x5008, 4),
+	CH_DEVICE(0x5009, 4),
+	CH_DEVICE(0x500A, 4),
+	CH_DEVICE(0x500B, 4),
+	CH_DEVICE(0x500C, 4),
+	CH_DEVICE(0x500D, 4),
+	CH_DEVICE(0x500E, 4),
+	CH_DEVICE(0x500F, 4),
+	CH_DEVICE(0x5010, 4),
+	CH_DEVICE(0x5011, 4),
+	CH_DEVICE(0x5012, 4),
+	CH_DEVICE(0x5013, 4),
+	CH_DEVICE(0x5401, 4),
+	CH_DEVICE(0x5402, 4),
+	CH_DEVICE(0x5403, 4),
+	CH_DEVICE(0x5404, 4),
+	CH_DEVICE(0x5405, 4),
+	CH_DEVICE(0x5406, 4),
+	CH_DEVICE(0x5407, 4),
+	CH_DEVICE(0x5408, 4),
+	CH_DEVICE(0x5409, 4),
+	CH_DEVICE(0x540A, 4),
+	CH_DEVICE(0x540B, 4),
+	CH_DEVICE(0x540C, 4),
+	CH_DEVICE(0x540D, 4),
+	CH_DEVICE(0x540E, 4),
+	CH_DEVICE(0x540F, 4),
+	CH_DEVICE(0x5410, 4),
+	CH_DEVICE(0x5411, 4),
+	CH_DEVICE(0x5412, 4),
+	CH_DEVICE(0x5413, 4),
 	{ 0, }
 };
 
-- 
1.8.0

[PATCH net 2/3] cxgb4: Support CPL_SGE_EGR_UPDATEs encapsulated in a CPL_FW4_MSG

[Vipul Pandya]

Newer firmware can post CPL_SGE_EGR_UPDATE message encapsulated in a
CPL_FW4_MSG as follows

flit0 rss_header (if DropRSS == 0 in IQ context)
flit1 CPL_FW4_MSG cpl
flit2 rss_header w/opcode CPL_SGE_EGR_UPDATE
flit3 CPL_SGE_EGR_UPDATE cpl

So FW4_MSG CPLs with a newly created type of FW_TYPE_RSSCPL have the
CPL_SGE_EGR_UPDATE CPL message in flit 2 of the FW4_MSG. Firmware can still
post regular CPL_SGE_EGR_UPDATE messages, so the drivers need to handle
both.

This patch also writes a new parameter to firmware requesting encapsulated
EGR_UPDATE. This allows firmware with this support to not break older drivers.

Signed-off-by: Vipul Pandya <vipul@chelsio.com>
---
 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | 31 ++++++++++++++++++++
 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h     | 10 +++++++
 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h   | 38 +++++++++++++++++++++++--
 3 files changed, 76 insertions(+), 3 deletions(-)

diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
index 656f934..c59ec3d 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
@@ -645,6 +645,21 @@ static int fwevtq_handler(struct sge_rspq *q, const __be64 *rsp,
 	u8 opcode = ((const struct rss_header *)rsp)->opcode;
 
 	rsp++;                                          /* skip RSS header */
+
+	/* FW can send EGR_UPDATEs encapsulated in a CPL_FW4_MSG.
+	 */
+	if (unlikely(opcode == CPL_FW4_MSG &&
+	   ((const struct cpl_fw4_msg *)rsp)->type == FW_TYPE_RSSCPL)) {
+		rsp++;
+		opcode = ((const struct rss_header *)rsp)->opcode;
+		rsp++;
+		if (opcode != CPL_SGE_EGR_UPDATE) {
+			dev_err(q->adap->pdev_dev, "unexpected FW4/CPL %#x on FW event queue\n"
+				, opcode);
+			goto out;
+		}
+	}
+
 	if (likely(opcode == CPL_SGE_EGR_UPDATE)) {
 		const struct cpl_sge_egr_update *p = (void *)rsp;
 		unsigned int qid = EGR_QID(ntohl(p->opcode_qid));
@@ -679,6 +694,7 @@ static int fwevtq_handler(struct sge_rspq *q, const __be64 *rsp,
 	} else
 		dev_err(q->adap->pdev_dev,
 			"unexpected CPL %#x on FW event queue\n", opcode);
+out:
 	return 0;
 }
 
@@ -696,6 +712,12 @@ static int uldrx_handler(struct sge_rspq *q, const __be64 *rsp,
 {
 	struct sge_ofld_rxq *rxq = container_of(q, struct sge_ofld_rxq, rspq);
 
+	/* FW can send CPLs encapsulated in a CPL_FW4_MSG.
+	 */
+	if (((const struct rss_header *)rsp)->opcode == CPL_FW4_MSG &&
+	    ((const struct cpl_fw4_msg *)(rsp + 1))->type == FW_TYPE_RSSCPL)
+		rsp += 2;
+
 	if (ulds[q->uld].rx_handler(q->adap->uld_handle[q->uld], rsp, gl)) {
 		rxq->stats.nomem++;
 		return -1;
@@ -4990,6 +5012,15 @@ static int adap_init0(struct adapter *adap)
 		adap->tids.aftid_end = val[1];
 	}
 
+	/* If we're running on newer firmware, let it know that we're
+	 * prepared to deal with encapsulated CPL messages.  Older
+	 * firmware won't understand this and we'll just get
+	 * unencapsulated messages ...
+	 */
+	params[0] = FW_PARAM_PFVF(CPLFW4MSG_ENCAP);
+	val[0] = 1;
+	(void) t4_set_params(adap, adap->mbox, adap->fn, 0, 1, params, val);
+
 	/*
 	 * Get device capabilities so we can determine what resources we need
 	 * to manage.
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_msg.h b/drivers/net/ethernet/chelsio/cxgb4/t4_msg.h
index 47656ac..357e297 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/t4_msg.h
+++ b/drivers/net/ethernet/chelsio/cxgb4/t4_msg.h
@@ -688,6 +688,15 @@ struct cpl_sge_egr_update {
 	__be16 pidx;
 };
 
+/* cpl_fw*.type values */
+enum {
+	FW_TYPE_CMD_RPL = 0,
+	FW_TYPE_WR_RPL = 1,
+	FW_TYPE_CQE = 2,
+	FW_TYPE_OFLD_CONNECTION_WR_RPL = 3,
+	FW_TYPE_RSSCPL = 4,
+};
+
 struct cpl_fw4_pld {
 	u8 opcode;
 	u8 rsvd0[3];
@@ -737,6 +746,7 @@ enum {
 	FW6_TYPE_WR_RPL = 1,
 	FW6_TYPE_CQE = 2,
 	FW6_TYPE_OFLD_CONNECTION_WR_RPL = 3,
+	FW6_TYPE_RSSCPL = FW_TYPE_RSSCPL,
 };
 
 struct cpl_fw6_msg_ofld_connection_wr_rpl {
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h
index 9344432..d1c755f 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h
+++ b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h
@@ -973,7 +973,9 @@ enum fw_params_param_pfvf {
 	FW_PARAMS_PARAM_PFVF_EQ_START	= 0x2B,
 	FW_PARAMS_PARAM_PFVF_EQ_END	= 0x2C,
 	FW_PARAMS_PARAM_PFVF_ACTIVE_FILTER_START = 0x2D,
-	FW_PARAMS_PARAM_PFVF_ACTIVE_FILTER_END = 0x2E
+	FW_PARAMS_PARAM_PFVF_ACTIVE_FILTER_END = 0x2E,
+	FW_PARAMS_PARAM_PFVF_ETHOFLD_END = 0x30,
+	FW_PARAMS_PARAM_PFVF_CPLFW4MSG_ENCAP = 0x31
 };
 
 /*
@@ -1758,6 +1760,25 @@ enum fw_port_module_type {
 	FW_PORT_MOD_TYPE_NONE = FW_PORT_CMD_MODTYPE_MASK
 };
 
+enum fw_port_mod_sub_type {
+	FW_PORT_MOD_SUB_TYPE_NA,
+	FW_PORT_MOD_SUB_TYPE_MV88E114X = 0x1,
+	FW_PORT_MOD_SUB_TYPE_TN8022 = 0x2,
+	FW_PORT_MOD_SUB_TYPE_AQ1202 = 0x3,
+	FW_PORT_MOD_SUB_TYPE_88x3120 = 0x4,
+	FW_PORT_MOD_SUB_TYPE_BCM84834 = 0x5,
+	FW_PORT_MOD_SUB_TYPE_BT_VSC8634 = 0x8,
+
+	/* The following will never been in the VPD.  They are TWINAX cable
+	 * lengths decoded from SFP+ module i2c PROMs.  These should
+	 * almost certainly go somewhere else ...
+	 */
+	FW_PORT_MOD_SUB_TYPE_TWINAX_1 = 0x9,
+	FW_PORT_MOD_SUB_TYPE_TWINAX_3 = 0xA,
+	FW_PORT_MOD_SUB_TYPE_TWINAX_5 = 0xB,
+	FW_PORT_MOD_SUB_TYPE_TWINAX_7 = 0xC,
+};
+
 /* port stats */
 #define FW_NUM_PORT_STATS 50
 #define FW_NUM_PORT_TX_STATS 23
@@ -2123,11 +2144,11 @@ struct fw_hdr {
 	u8 intfver_ri;
 	u8 intfver_iscsipdu;
 	u8 intfver_iscsi;
+	u8 intfver_fcoepdu;
 	u8 intfver_fcoe;
-	u8 reserved2;
+	__u32   reserved2;
 	__u32   reserved3;
 	__u32   reserved4;
-	__u32   reserved5;
 	__be32  flags;
 	__be32  reserved6[23];
 };
@@ -2137,6 +2158,17 @@ struct fw_hdr {
 #define FW_HDR_FW_VER_MICRO_GET(x) (((x) >> 8) & 0xff)
 #define FW_HDR_FW_VER_BUILD_GET(x) (((x) >> 0) & 0xff)
 
+enum fw_hdr_intfver {
+	FW_HDR_INTFVER_NIC      = 0x00,
+	FW_HDR_INTFVER_VNIC     = 0x00,
+	FW_HDR_INTFVER_OFLD     = 0x00,
+	FW_HDR_INTFVER_RI       = 0x00,
+	FW_HDR_INTFVER_ISCSIPDU = 0x00,
+	FW_HDR_INTFVER_ISCSI    = 0x00,
+	FW_HDR_INTFVER_FCOEPDU  = 0x00,
+	FW_HDR_INTFVER_FCOE     = 0x00,
+};
+
 enum fw_hdr_flags {
 	FW_HDR_FLAGS_RESET_HALT = 0x00000001,
 };
-- 
1.8.0

[PATCH net 3/3] cxgb4vf: Support CPL_SGE_EGR_UPDATEs encapsulated in a CPL_FW4_MSG

[Vipul Pandya]

Newer firmware can post CPL_SGE_EGR_UPDATE message encapsulated in a
CPL_FW4_MSG as follows

flit0 rss_header (if DropRSS == 0 in IQ context)
flit1 CPL_FW4_MSG cpl
flit2 rss_header w/opcode CPL_SGE_EGR_UPDATE
flit3 CPL_SGE_EGR_UPDATE cpl

So FW4_MSG CPLs with a newly created type of FW_TYPE_RSSCPL have the
CPL_SGE_EGR_UPDATE CPL message in flit 2 of the FW4_MSG. Firmware can still
post regular CPL_SGE_EGR_UPDATE messages, so the drivers need to handle
both.

This patch also writes a new parameter to firmware requesting encapsulated
EGR_UPDATE. This allows firmware with this support to not break older drivers.

Signed-off-by: Vipul Pandya <vipul@chelsio.com>
---
 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h        |  1 +
 .../net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c    | 25 ++++++++++++++++++++++
 2 files changed, 26 insertions(+)

diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_msg.h b/drivers/net/ethernet/chelsio/cxgb4/t4_msg.h
index 357e297..01d4844 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/t4_msg.h
+++ b/drivers/net/ethernet/chelsio/cxgb4/t4_msg.h
@@ -158,6 +158,7 @@ union opcode_tid {
 };
 
 #define CPL_OPCODE(x) ((x) << 24)
+#define G_CPL_OPCODE(x) (((x) >> 24) & 0xFF)
 #define MK_OPCODE_TID(opcode, tid) (CPL_OPCODE(opcode) | (tid))
 #define OPCODE_TID(cmd) ((cmd)->ot.opcode_tid)
 #define GET_TID(cmd) (ntohl(OPCODE_TID(cmd)) & 0xFFFFFF)
diff --git a/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c b/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c
index 73aef76..40c22e7 100644
--- a/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c
+++ b/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c
@@ -409,6 +409,20 @@ static int fwevtq_handler(struct sge_rspq *rspq, const __be64 *rsp,
 		break;
 	}
 
+	case CPL_FW4_MSG: {
+		/* FW can send EGR_UPDATEs encapsulated in a CPL_FW4_MSG.
+		 */
+		const struct cpl_sge_egr_update *p = (void *)(rsp + 3);
+		opcode = G_CPL_OPCODE(ntohl(p->opcode_qid));
+		if (opcode != CPL_SGE_EGR_UPDATE) {
+			dev_err(adapter->pdev_dev, "unexpected FW4/CPL %#x on FW event queue\n"
+				, opcode);
+			break;
+		}
+		cpl = (void *)p;
+		/*FALLTHROUGH*/
+	}
+
 	case CPL_SGE_EGR_UPDATE: {
 		/*
 		 * We've received an Egress Queue Status Update message.  We
@@ -2072,6 +2086,7 @@ static int adap_init0(struct adapter *adapter)
 	struct sge *s = &adapter->sge;
 	unsigned int ethqsets;
 	int err;
+	u32 param, val = 0;
 
 	/*
 	 * Wait for the device to become ready before proceeding ...
@@ -2153,6 +2168,16 @@ static int adap_init0(struct adapter *adapter)
 		return err;
 	}
 
+	/* If we're running on newer firmware, let it know that we're
+	 * prepared to deal with encapsulated CPL messages.  Older
+	 * firmware won't understand this and we'll just get
+	 * unencapsulated messages ...
+	 */
+	param = FW_PARAMS_MNEM(FW_PARAMS_MNEM_PFVF) |
+		FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_PFVF_CPLFW4MSG_ENCAP);
+	val = 1;
+	(void) t4vf_set_params(adapter, 1, &param, &val);
+
 	/*
 	 * Retrieve our RX interrupt holdoff timer values and counter
 	 * threshold values from the SGE parameters.
-- 
1.8.0

Re: [PATCH net 3/3] cxgb4vf: Support CPL_SGE_EGR_UPDATEs encapsulated in a CPL_FW4_MSG

[Sergei Shtylyov]

Hello.

On 04/29/2013 06:04 PM, Vipul Pandya wrote:

> Newer firmware can post CPL_SGE_EGR_UPDATE message encapsulated in a
> CPL_FW4_MSG as follows
>
> flit0 rss_header (if DropRSS == 0 in IQ context)
> flit1 CPL_FW4_MSG cpl
> flit2 rss_header w/opcode CPL_SGE_EGR_UPDATE
> flit3 CPL_SGE_EGR_UPDATE cpl
>
> So FW4_MSG CPLs with a newly created type of FW_TYPE_RSSCPL have the
> CPL_SGE_EGR_UPDATE CPL message in flit 2 of the FW4_MSG. Firmware can still
> post regular CPL_SGE_EGR_UPDATE messages, so the drivers need to handle
> both.
>
> This patch also writes a new parameter to firmware requesting encapsulated
> EGR_UPDATE. This allows firmware with this support to not break older drivers.
>
> Signed-off-by: Vipul Pandya <vipul@chelsio.com>

[...]

> diff --git a/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c b/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c
> index 73aef76..40c22e7 100644
> --- a/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c
> +++ b/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c
> @@ -409,6 +409,20 @@ static int fwevtq_handler(struct sge_rspq *rspq, const __be64 *rsp,
>   		break;
>   	}
>   
> +	case CPL_FW4_MSG: {
> +		/* FW can send EGR_UPDATEs encapsulated in a CPL_FW4_MSG.
> +		 */
> +		const struct cpl_sge_egr_update *p = (void *)(rsp + 3);

     Empty line wouldn't hurt here, after the declaration.

> +		opcode = G_CPL_OPCODE(ntohl(p->opcode_qid));
> +		if (opcode != CPL_SGE_EGR_UPDATE) {
> +			dev_err(adapter->pdev_dev, "unexpected FW4/CPL %#x on FW event queue\n"
> +				, opcode);
> +			break;
> +		}
> +		cpl = (void *)p;
> +		/*FALLTHROUGH*/

    Rather pointless comment at end of *switch*. Adn you forgot to add 
spaced before */ and after /*.

> +	}
> +
>   	case CPL_SGE_EGR_UPDATE: {
>   		/*
>   		 * We've received an Egress Queue Status Update message.  We
[...]

WBR, Sergei

Re: [PATCH net 3/3] cxgb4vf: Support CPL_SGE_EGR_UPDATEs encapsulated in a CPL_FW4_MSG

[Vipul Pandya]

On 30-04-2013 00:25, Sergei Shtylyov wrote:
> Hello.
> 
> On 04/29/2013 06:04 PM, Vipul Pandya wrote:
> 
>> Newer firmware can post CPL_SGE_EGR_UPDATE message encapsulated in a
>> CPL_FW4_MSG as follows
>>
>> flit0 rss_header (if DropRSS == 0 in IQ context)
>> flit1 CPL_FW4_MSG cpl
>> flit2 rss_header w/opcode CPL_SGE_EGR_UPDATE
>> flit3 CPL_SGE_EGR_UPDATE cpl
>>
>> So FW4_MSG CPLs with a newly created type of FW_TYPE_RSSCPL have the
>> CPL_SGE_EGR_UPDATE CPL message in flit 2 of the FW4_MSG. Firmware can still
>> post regular CPL_SGE_EGR_UPDATE messages, so the drivers need to handle
>> both.
>>
>> This patch also writes a new parameter to firmware requesting encapsulated
>> EGR_UPDATE. This allows firmware with this support to not break older drivers.
>>
>> Signed-off-by: Vipul Pandya <vipul@chelsio.com>
> 
> [...]
> 
>> diff --git a/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c b/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c
>> index 73aef76..40c22e7 100644
>> --- a/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c
>> +++ b/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c
>> @@ -409,6 +409,20 @@ static int fwevtq_handler(struct sge_rspq *rspq, const __be64 *rsp,
>>   		break;
>>   	}
>>   
>> +	case CPL_FW4_MSG: {
>> +		/* FW can send EGR_UPDATEs encapsulated in a CPL_FW4_MSG.
>> +		 */
>> +		const struct cpl_sge_egr_update *p = (void *)(rsp + 3);
> 
>      Empty line wouldn't hurt here, after the declaration.
> 
>> +		opcode = G_CPL_OPCODE(ntohl(p->opcode_qid));
>> +		if (opcode != CPL_SGE_EGR_UPDATE) {
>> +			dev_err(adapter->pdev_dev, "unexpected FW4/CPL %#x on FW event queue\n"
>> +				, opcode);
>> +			break;
>> +		}
>> +		cpl = (void *)p;
>> +		/*FALLTHROUGH*/
> 
>     Rather pointless comment at end of *switch*. Adn you forgot to add 
> spaced before */ and after /*.
> 
>> +	}
>> +
>>   	case CPL_SGE_EGR_UPDATE: {
>>   		/*
>>   		 * We've received an Egress Queue Status Update message.  We
> [...]
> 
> WBR, Sergei
> 

Hello Sergei,

Thank you for your comments. I will take care and address them in future.

Thanks,
Vipul

Re: [PATCH net 0/3] Bug fixes for cxgb4 and cxgb4vf

[Vipul Pandya]

On 29-04-2013 19:34, Vipul Pandya wrote:
> Hi All,
> 
> This patch series does the following:
> 1. Passes correct PF number during initialization of pci_device_id structure
> 2. Adds code in cxgb4 and cxgb4vf driver to handle CPL_SGE_EGR_UPDATE message
>    encapsulated in a CPL_FW4_MSG.
> 
> We would like to request this patch series to get merged via David Miller's
> 'net' tree.
> 
> Thanks,
> Vipul
> 
> Vipul Pandya (3):
>   cxgb4: Fix pci_device_id structure initialization with correct PF
>     number
>   cxgb4: Support CPL_SGE_EGR_UPDATEs encapsulated in a CPL_FW4_MSG
>   cxgb4vf: Support CPL_SGE_EGR_UPDATEs encapsulated in a CPL_FW4_MSG
> 
>  drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c    | 107 +++++++++++++--------
>  drivers/net/ethernet/chelsio/cxgb4/t4_msg.h        |  11 +++
>  drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h      |  38 +++++++-
>  .../net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c    |  25 +++++
>  4 files changed, 140 insertions(+), 41 deletions(-)
> 

Hi David Miller,

I have forgotten to check if 'net' and 'net-next' tree are in sync or
not. I am sorry for that. This patch series is built against net-next
tree. Since these are bug fixes we wanted to merge it via 'net' tree.
However now I see that required patches are missing in 'net' tree. To be
able to successfully apply this patch series in 'net' tree we need
patches from commit 47ce9c482 (cxgb4: Allow for backward compatibility
with new VPD scheme.) into 'net' tree. If it is not possible to apply
those patches into 'net' tree then please apply this patch series
against 'net-next'. Please let me know if I have to resend the series.

Thanks,
Vipul

Re: [PATCH net 0/3] Bug fixes for cxgb4 and cxgb4vf

[David Miller]

From: Vipul Pandya <vipul@chelsio.com>
Date: Mon, 29 Apr 2013 19:34:38 +0530

> This patch series does the following:
> 1. Passes correct PF number during initialization of pci_device_id structure
> 2. Adds code in cxgb4 and cxgb4vf driver to handle CPL_SGE_EGR_UPDATE message
>    encapsulated in a CPL_FW4_MSG.
> 
> We would like to request this patch series to get merged via David Miller's
> 'net' tree.

It doesn't even apply to the 'net' tree, you prepared it against 'net-next'
so that's where I applied it.

The tree it goes into is immatierial right now anyways as I'm preparing for
the merge window.