* [net-next PATCH v2 1/6] net: cpsw: enhance pinctrl support
2013-05-23 12:30 [net-next PATCH v2 0/6] Adding pinctrl PM support for CPSW and MDIO Mugunthan V N
@ 2013-05-23 12:30 ` Mugunthan V N
[not found] ` <1369312228-3308-2-git-send-email-mugunthanvnm-l0cyMroinI0@public.gmane.org>
2013-05-23 12:30 ` [net-next PATCH v2 2/6] net: davinci_mdio: " Mugunthan V N
` (4 subsequent siblings)
5 siblings, 1 reply; 9+ messages in thread
From: Mugunthan V N @ 2013-05-23 12:30 UTC (permalink / raw)
To: netdev
Cc: davem, devicetree-discuss, linux-omap, benoit.cousson, paul,
Hebbar Gururaja, Mugunthan V N
From: Hebbar Gururaja <gururaja.hebbar@ti.com>
Amend cpsw controller to optionally take a pin control handle and set
the state of the pins to:
- "default" on boot, resume
- "sleep" on suspend()
This should make it possible to optimize energy usage for the pins
for the suspend/resume cycle.
If any of the above pin states are missing in dt, a warning message
about the missing state is displayed.
If certain pin-states are not available, to remove this warning message
pass respective state name with null phandler.
Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
drivers/net/ethernet/ti/cpsw.c | 49 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c
index 21a5b29..1150f06 100644
--- a/drivers/net/ethernet/ti/cpsw.c
+++ b/drivers/net/ethernet/ti/cpsw.c
@@ -35,6 +35,7 @@
#include <linux/if_vlan.h>
#include <linux/platform_data/cpsw.h>
+#include <linux/pinctrl/consumer.h>
#include "cpsw_ale.h"
#include "cpts.h"
@@ -351,6 +352,11 @@ struct cpsw_priv {
bool irq_enabled;
struct cpts *cpts;
u32 emac_port;
+
+ /* Two optional pin states - default & sleep */
+ struct pinctrl *pinctrl;
+ struct pinctrl_state *pins_default;
+ struct pinctrl_state *pins_sleep;
};
#define napi_to_priv(napi) container_of(napi, struct cpsw_priv, napi)
@@ -1689,6 +1695,36 @@ static int cpsw_probe(struct platform_device *pdev)
*/
pm_runtime_enable(&pdev->dev);
+ priv->pinctrl = devm_pinctrl_get(&pdev->dev);
+ if (!IS_ERR(priv->pinctrl)) {
+ priv->pins_default = pinctrl_lookup_state(priv->pinctrl,
+ PINCTRL_STATE_DEFAULT);
+ /* enable pins to be muxed in and configured */
+ if (IS_ERR(priv->pins_default))
+ dev_warn(&pdev->dev, "could not get default pinstate\n");
+ else
+ if (pinctrl_select_state(priv->pinctrl,
+ priv->pins_default))
+ dev_err(&pdev->dev,
+ "could not set default pins\n");
+
+ priv->pins_sleep = pinctrl_lookup_state(priv->pinctrl,
+ PINCTRL_STATE_SLEEP);
+ if (IS_ERR(priv->pins_sleep))
+ dev_warn(&pdev->dev, "could not get sleep pinstate\n");
+ } else {
+ /*
+ * Since we continue even when pinctrl node is not found,
+ * Invalidate pins as not available. This is to make sure that
+ * IS_ERR(pins_xxx) results in failure when used.
+ */
+ priv->pins_default = ERR_PTR(-ENODATA);
+ priv->pins_sleep = ERR_PTR(-ENODATA);
+
+ dev_warn(&pdev->dev,
+ "pins are not configured from the driver\n");
+ }
+
if (cpsw_probe_dt(&priv->data, pdev)) {
pr_err("cpsw: platform data missing\n");
ret = -ENODEV;
@@ -1973,11 +2009,17 @@ static int cpsw_suspend(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct net_device *ndev = platform_get_drvdata(pdev);
+ struct cpsw_priv *priv = netdev_priv(ndev);
if (netif_running(ndev))
cpsw_ndo_stop(ndev);
pm_runtime_put_sync(&pdev->dev);
+ /* Optionally let pins go into sleep states */
+ if (!IS_ERR(priv->pins_sleep))
+ if (pinctrl_select_state(priv->pinctrl, priv->pins_sleep))
+ dev_err(dev, "could not set pins to sleep state\n");
+
return 0;
}
@@ -1985,8 +2027,15 @@ static int cpsw_resume(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct net_device *ndev = platform_get_drvdata(pdev);
+ struct cpsw_priv *priv = netdev_priv(ndev);
pm_runtime_get_sync(&pdev->dev);
+
+ /* Optionaly enable pins to be muxed in and configured */
+ if (!IS_ERR(priv->pins_default))
+ if (pinctrl_select_state(priv->pinctrl, priv->pins_default))
+ dev_err(dev, "could not set default pins\n");
+
if (netif_running(ndev))
cpsw_ndo_open(ndev);
return 0;
--
1.7.9.5
^ permalink raw reply related [flat|nested] 9+ messages in thread* [net-next PATCH v2 2/6] net: davinci_mdio: enhance pinctrl support
2013-05-23 12:30 [net-next PATCH v2 0/6] Adding pinctrl PM support for CPSW and MDIO Mugunthan V N
2013-05-23 12:30 ` [net-next PATCH v2 1/6] net: cpsw: enhance pinctrl support Mugunthan V N
@ 2013-05-23 12:30 ` Mugunthan V N
2013-05-23 12:30 ` [net-next PATCH v2 3/6] ARM: dts: AM33XX: Add pinmux configuration for CPSW to beaglebone Mugunthan V N
` (3 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: Mugunthan V N @ 2013-05-23 12:30 UTC (permalink / raw)
To: netdev
Cc: davem, devicetree-discuss, linux-omap, benoit.cousson, paul,
Mugunthan V N
Amend cpsw controller to optionally take a pin control handle and set
the state of the pins to:
- "default" on boot, resume
- "sleep" on suspend()
This should make it possible to optimize energy usage for the pins
for the suspend/resume cycle.
If any of the above pin states are missing in dt, a warning message
about the missing state is displayed.
If certain pin-states are not available, to remove this warning message
pass respective state name with null phandler.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
drivers/net/ethernet/ti/davinci_mdio.c | 46 ++++++++++++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/drivers/net/ethernet/ti/davinci_mdio.c b/drivers/net/ethernet/ti/davinci_mdio.c
index 12aec17..0026006 100644
--- a/drivers/net/ethernet/ti/davinci_mdio.c
+++ b/drivers/net/ethernet/ti/davinci_mdio.c
@@ -38,6 +38,7 @@
#include <linux/davinci_emac.h>
#include <linux/of.h>
#include <linux/of_device.h>
+#include <linux/pinctrl/consumer.h>
/*
* This timeout definition is a worst-case ultra defensive measure against
@@ -94,6 +95,11 @@ struct davinci_mdio_data {
struct mii_bus *bus;
bool suspended;
unsigned long access_time; /* jiffies */
+
+ /* Two optional pin states - default & sleep */
+ struct pinctrl *pinctrl;
+ struct pinctrl_state *pins_default;
+ struct pinctrl_state *pins_sleep;
};
static void __davinci_mdio_reset(struct davinci_mdio_data *data)
@@ -347,6 +353,36 @@ static int davinci_mdio_probe(struct platform_device *pdev)
data->bus->parent = dev;
data->bus->priv = data;
+ data->pinctrl = devm_pinctrl_get(&pdev->dev);
+ if (!IS_ERR(data->pinctrl)) {
+ data->pins_default = pinctrl_lookup_state(data->pinctrl,
+ PINCTRL_STATE_DEFAULT);
+ /* enable pins to be muxed in and configured */
+ if (IS_ERR(data->pins_default))
+ dev_warn(&pdev->dev, "could not get default pinstate\n");
+ else
+ if (pinctrl_select_state(data->pinctrl,
+ data->pins_default))
+ dev_err(&pdev->dev,
+ "could not set default pins\n");
+
+ data->pins_sleep = pinctrl_lookup_state(data->pinctrl,
+ PINCTRL_STATE_SLEEP);
+ if (IS_ERR(data->pins_sleep))
+ dev_warn(&pdev->dev, "could not get sleep pinstate\n");
+ } else {
+ /*
+ * Since we continue even when pinctrl node is not found,
+ * Invalidate pins as not available. This is to make sure that
+ * IS_ERR(pins_xxx) results in failure when used.
+ */
+ data->pins_default = ERR_PTR(-ENODATA);
+ data->pins_sleep = ERR_PTR(-ENODATA);
+
+ dev_warn(&pdev->dev,
+ "pins are not configured from the driver\n");
+ }
+
pm_runtime_enable(&pdev->dev);
pm_runtime_get_sync(&pdev->dev);
data->clk = clk_get(&pdev->dev, "fck");
@@ -454,6 +490,11 @@ static int davinci_mdio_suspend(struct device *dev)
data->suspended = true;
spin_unlock(&data->lock);
+ /* Optionally let pins go into sleep states */
+ if (!IS_ERR(data->pins_sleep))
+ if (pinctrl_select_state(data->pinctrl, data->pins_sleep))
+ dev_err(dev, "could not set pins to sleep state\n");
+
return 0;
}
@@ -465,6 +506,11 @@ static int davinci_mdio_resume(struct device *dev)
spin_lock(&data->lock);
pm_runtime_get_sync(data->dev);
+ /* Optionaly enable pins to be muxed in and configured */
+ if (!IS_ERR(data->pins_default))
+ if (pinctrl_select_state(data->pinctrl, data->pins_default))
+ dev_err(dev, "could not set default pins\n");
+
/* restart the scan state machine */
ctrl = __raw_readl(&data->regs->control);
ctrl |= CONTROL_ENABLE;
--
1.7.9.5
^ permalink raw reply related [flat|nested] 9+ messages in thread* [net-next PATCH v2 3/6] ARM: dts: AM33XX: Add pinmux configuration for CPSW to beaglebone
2013-05-23 12:30 [net-next PATCH v2 0/6] Adding pinctrl PM support for CPSW and MDIO Mugunthan V N
2013-05-23 12:30 ` [net-next PATCH v2 1/6] net: cpsw: enhance pinctrl support Mugunthan V N
2013-05-23 12:30 ` [net-next PATCH v2 2/6] net: davinci_mdio: " Mugunthan V N
@ 2013-05-23 12:30 ` Mugunthan V N
2013-05-23 12:30 ` [net-next PATCH v2 4/6] ARM: dts: AM33XX: Add CPSW phy_id device tree data to am335x-evmsk Mugunthan V N
` (2 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: Mugunthan V N @ 2013-05-23 12:30 UTC (permalink / raw)
To: netdev
Cc: davem, devicetree-discuss, linux-omap, benoit.cousson, paul,
Mugunthan V N
Add pinmux configurations for MII based CPSW ethernet to am335x-bone.
In this patch, only single named mode/state is added and these pins
are configured during pinctrl driver initialization.
Default mode is nothing but the values required for the module during
active state. With this configurations module is functional as
expected.
Todo:
- if an idle state is available for pins, add support for it.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
arch/arm/boot/dts/am335x-bone.dts | 38 +++++++++++++++++++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
index 5302f79..97294a6 100644
--- a/arch/arm/boot/dts/am335x-bone.dts
+++ b/arch/arm/boot/dts/am335x-bone.dts
@@ -36,6 +36,33 @@
0x60 0x17 /* gpmc_a8.gpio1_24, OUTPUT_PULLUP | MODE7 */
>;
};
+
+ cpsw_default: cpsw_default {
+ pinctrl-single,pins = <
+ /* Slave 1 */
+ 0x110 0x20 /* mii1_rxerr.mii1_rxerr, MODE0 | INPUT */
+ 0x114 0x0 /* mii1_txen.mii1_txen, MODE0 | OUTPUT */
+ 0x118 0x20 /* mii1_rxdv.mii1_rxdv, MODE0 | INPUT_PULLDOWN */
+ 0x11c 0x0 /* mii1_txd3.mii1_txd3, MODE0 | OUTPUT */
+ 0x120 0x0 /* mii1_txd2.mii1_txd2, MODE0 | OUTPUT */
+ 0x124 0x0 /* mii1_txd1.mii1_txd1, MODE0 | OUTPUT */
+ 0x128 0x0 /* mii1_txd0.mii1_txd0, MODE0 | OUTPUT */
+ 0x12c 0x20 /* mii1_txclk.mii1_txclk, MODE0 | INPUT_PULLDOWN */
+ 0x130 0x20 /* mii1_rxclk.mii1_rxclk, MODE0 | INPUT_PULLDOWN */
+ 0x134 0x20 /* mii1_rxd3.mii1_rxd3, MODE0 | INPUT_PULLDOWN */
+ 0x138 0x20 /* mii1_rxd2.mii1_rxd2, MODE0 | INPUT_PULLDOWN */
+ 0x13c 0x20 /* mii1_rxd1.mii1_rxd1, MODE0 | INPUT_PULLDOWN */
+ 0x140 0x20 /* mii1_rxd0.mii1_rxd0, MODE0 | INPUT_PULLDOWN */
+ >;
+ };
+
+ davinci_mdio_default: davinci_mdio_default {
+ pinctrl-single,pins = <
+ /* MDIO */
+ 0x148 0x30 /* mdio_data.mdio_data, MODE0 | INPUT_PULLUP */
+ 0x14c 0x10 /* mdio_clk.mdio_clk, MODE0 | OUTPUT_PULLUP */
+ >;
+ };
};
ocp {
@@ -136,3 +163,14 @@
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>;
};
+
+&mac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&cpsw_default>;
+
+};
+
+&davinci_mdio {
+ pinctrl-names = "default";
+ pinctrl-0 = <&davinci_mdio_default>;
+};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 9+ messages in thread* [net-next PATCH v2 4/6] ARM: dts: AM33XX: Add CPSW phy_id device tree data to am335x-evmsk
2013-05-23 12:30 [net-next PATCH v2 0/6] Adding pinctrl PM support for CPSW and MDIO Mugunthan V N
` (2 preceding siblings ...)
2013-05-23 12:30 ` [net-next PATCH v2 3/6] ARM: dts: AM33XX: Add pinmux configuration for CPSW to beaglebone Mugunthan V N
@ 2013-05-23 12:30 ` Mugunthan V N
2013-05-23 12:30 ` [net-next PATCH v2 5/6] ARM: dts: AM33XX: Add pinmux configuration for CPSW to EVMsk Mugunthan V N
2013-05-23 12:30 ` [net-next PATCH v2 6/6] ARM: dts: AM33XX: Add pinmux configuration for CPSW to am335x EVM Mugunthan V N
5 siblings, 0 replies; 9+ messages in thread
From: Mugunthan V N @ 2013-05-23 12:30 UTC (permalink / raw)
To: netdev
Cc: davem, devicetree-discuss, linux-omap, benoit.cousson, paul,
Mugunthan V N
Add phy_id device tree data to am335x-evmsk device to bring up CPSW
ethernet present on am335x starter kit.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
arch/arm/boot/dts/am335x-evmsk.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts
index f67c360..acbcac3 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -248,3 +248,11 @@
};
};
};
+
+&cpsw_emac0 {
+ phy_id = <&davinci_mdio>, <0>;
+};
+
+&cpsw_emac1 {
+ phy_id = <&davinci_mdio>, <1>;
+};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 9+ messages in thread* [net-next PATCH v2 5/6] ARM: dts: AM33XX: Add pinmux configuration for CPSW to EVMsk
2013-05-23 12:30 [net-next PATCH v2 0/6] Adding pinctrl PM support for CPSW and MDIO Mugunthan V N
` (3 preceding siblings ...)
2013-05-23 12:30 ` [net-next PATCH v2 4/6] ARM: dts: AM33XX: Add CPSW phy_id device tree data to am335x-evmsk Mugunthan V N
@ 2013-05-23 12:30 ` Mugunthan V N
2013-05-23 12:30 ` [net-next PATCH v2 6/6] ARM: dts: AM33XX: Add pinmux configuration for CPSW to am335x EVM Mugunthan V N
5 siblings, 0 replies; 9+ messages in thread
From: Mugunthan V N @ 2013-05-23 12:30 UTC (permalink / raw)
To: netdev
Cc: davem, devicetree-discuss, linux-omap, benoit.cousson, paul,
Mugunthan V N
Add pinmux configurations for MII based CPSW ethernet to AM335x EVMsk.
In this patch, only single named mode/state is added and these pins
are configured during pinctrl driver initialization.
Default mode is nothing but the values required for the module during
active state. With this configurations module is functional as
expected.
Todo:
- if an idle state is available for pins, add support for it.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
arch/arm/boot/dts/am335x-evmsk.dts | 50 ++++++++++++++++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts
index acbcac3..12cbe4e 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -51,6 +51,46 @@
0x9c 0x27 /* gpmc_ben0_cle.gpio2_5, INPUT | MODE7 */
>;
};
+
+ cpsw_default: cpsw_default {
+ pinctrl-single,pins = <
+ /* Slave 1 */
+ 0x114 0x2 /* mii1_txen.rgmii1_tctl, MODE2 | OUTPUT */
+ 0x118 0x22 /* mii1_rxdv.rgmii1_rctl, MODE2 | INPUT_PULLDOWN */
+ 0x11c 0x2 /* mii1_txd3.rgmii1_td3, MODE2 | OUTPUT */
+ 0x120 0x2 /* mii1_txd2.rgmii1_td2, MODE2 | OUTPUT */
+ 0x124 0x2 /* mii1_txd1.rgmii1_td1, MODE2 | OUTPUT */
+ 0x128 0x2 /* mii1_txd0.rgmii1_td0, MODE2 | OUTPUT */
+ 0x12c 0x2 /* mii1_txclk.rgmii1_tclk, MODE2 | OUTPUT */
+ 0x130 0x22 /* mii1_rxclk.rgmii1_rclk, MODE2 | INPUT_PULLDOWN */
+ 0x134 0x22 /* mii1_rxd3.rgmii1_rd3, MODE2 | INPUT_PULLDOWN */
+ 0x138 0x22 /* mii1_rxd2.rgmii1_rd2, MODE2 | INPUT_PULLDOWN */
+ 0x13c 0x22 /* mii1_rxd1.rgmii1_rd1, MODE2 | INPUT_PULLDOWN */
+ 0x140 0x22 /* mii1_rxd0.rgmii1_rd0, MODE2 | INPUT_PULLDOWN */
+
+ /* Slave 2 */
+ 0x40 0x2 /* gpmc_a0.rgmii2_tctl", MODE2 | OUTPUT */
+ 0x44 0x22 /* gpmc_a1.rgmii2_rctl", MODE2 | INPUT_PULLDOWN */
+ 0x48 0x2 /* gpmc_a2.rgmii2_td3", MODE2 | OUTPUT */
+ 0x4c 0x2 /* gpmc_a3.rgmii2_td2", MODE2 | OUTPUT */
+ 0x50 0x2 /* gpmc_a4.rgmii2_td1", MODE2 | OUTPUT */
+ 0x54 0x2 /* gpmc_a5.rgmii2_td0", MODE2 | OUTPUT */
+ 0x58 0x2 /* gpmc_a6.rgmii2_tclk", MODE2 | OUTPUT */
+ 0x5c 0x22 /* gpmc_a7.rgmii2_rclk", MODE2 | INPUT_PULLDOWN */
+ 0x60 0x22 /* gpmc_a8.rgmii2_rd3", MODE2 | INPUT_PULLDOWN */
+ 0x64 0x22 /* gpmc_a9.rgmii2_rd2", MODE2 | INPUT_PULLDOWN */
+ 0x68 0x22 /* gpmc_a10.rgmii2_rd1", MODE2 | INPUT_PULLDOWN */
+ 0x6c 0x22 /* gpmc_a11.rgmii2_rd0", MODE2 | INPUT_PULLDOWN */
+ >;
+ };
+
+ davinci_mdio_default: davinci_mdio_default {
+ pinctrl-single,pins = <
+ /* MDIO */
+ 0x148 0x30 /* mdio_data.mdio_data, MODE0 | INPUT_PULLUP */
+ 0x14c 0x10 /* mdio_clk.mdio_clk, MODE0 | OUTPUT_PULLUP */
+ >;
+ };
};
ocp {
@@ -249,6 +289,16 @@
};
};
+&mac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&cpsw_default>;
+};
+
+&davinci_mdio {
+ pinctrl-names = "default";
+ pinctrl-0 = <&davinci_mdio_default>;
+};
+
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 9+ messages in thread* [net-next PATCH v2 6/6] ARM: dts: AM33XX: Add pinmux configuration for CPSW to am335x EVM
2013-05-23 12:30 [net-next PATCH v2 0/6] Adding pinctrl PM support for CPSW and MDIO Mugunthan V N
` (4 preceding siblings ...)
2013-05-23 12:30 ` [net-next PATCH v2 5/6] ARM: dts: AM33XX: Add pinmux configuration for CPSW to EVMsk Mugunthan V N
@ 2013-05-23 12:30 ` Mugunthan V N
5 siblings, 0 replies; 9+ messages in thread
From: Mugunthan V N @ 2013-05-23 12:30 UTC (permalink / raw)
To: netdev
Cc: davem, devicetree-discuss, linux-omap, benoit.cousson, paul,
Mugunthan V N
Add pinmux configurations for RGMII based CPSW ethernet to am335x-evm.
In this patch, only single named mode/state is added and these pins
are configured during pinctrl driver initialization.
Default mode is nothing but the values required for the module during
active state. With this configurations module is functional as
expected.
Todo:
- if an idle state is available for pins, add support for it.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
arch/arm/boot/dts/am335x-evm.dts | 36 ++++++++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index 0423298..beb2fbf 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -44,6 +44,32 @@
0x154 0x27 /* spi0_d0.gpio0_3, INPUT | MODE7 */
>;
};
+
+ cpsw_default: cpsw_default {
+ pinctrl-single,pins = <
+ /* Slave 1 */
+ 0x114 0x2 /* mii1_txen.rgmii1_tctl, MODE2 | OUTPUT */
+ 0x118 0x22 /* mii1_rxdv.rgmii1_rctl, MODE2 | INPUT_PULLDOWN */
+ 0x11c 0x2 /* mii1_txd3.rgmii1_td3, MODE2 | OUTPUT */
+ 0x120 0x2 /* mii1_txd2.rgmii1_td2, MODE2 | OUTPUT */
+ 0x124 0x2 /* mii1_txd1.rgmii1_td1, MODE2 | OUTPUT */
+ 0x128 0x2 /* mii1_txd0.rgmii1_td0, MODE2 | OUTPUT */
+ 0x12c 0x2 /* mii1_txclk.rgmii1_tclk, MODE2 | OUTPUT */
+ 0x130 0x22 /* mii1_rxclk.rgmii1_rclk, MODE2 | INPUT_PULLDOWN */
+ 0x134 0x22 /* mii1_rxd3.rgmii1_rd3, MODE2 | INPUT_PULLDOWN */
+ 0x138 0x22 /* mii1_rxd2.rgmii1_rd2, MODE2 | INPUT_PULLDOWN */
+ 0x13c 0x22 /* mii1_rxd1.rgmii1_rd1, MODE2 | INPUT_PULLDOWN */
+ 0x140 0x22 /* mii1_rxd0.rgmii1_rd0, MODE2 | INPUT_PULLDOWN */
+ >;
+ };
+
+ davinci_mdio_default: davinci_mdio_default {
+ pinctrl-single,pins = <
+ /* MDIO */
+ 0x148 0x30 /* mdio_data.mdio_data, MODE0 | INPUT_PULLUP */
+ 0x14c 0x10 /* mdio_clk.mdio_clk, MODE0 | OUTPUT_PULLUP */
+ >;
+ };
};
ocp {
@@ -237,6 +263,16 @@
};
};
+&mac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&cpsw_default>;
+};
+
+&davinci_mdio {
+ pinctrl-names = "default";
+ pinctrl-0 = <&davinci_mdio_default>;
+};
+
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
};
--
1.7.9.5
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