* [PATCH 02/11] phy: Add Vitesse 8211 phy ID
2013-05-29 15:33 [PATCH 01/11] phy: Clean coding style in vitesse phy Michal Simek
@ 2013-05-29 15:33 ` Michal Simek
2013-05-29 15:33 ` [PATCH 03/11] phy: Use macros instead of hardcoded values in marvell phy driver Michal Simek
` (8 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Michal Simek @ 2013-05-29 15:33 UTC (permalink / raw)
To: linux-kernel
Cc: Michal Simek, Michal Simek, David S. Miller, Stephen Hemminger,
Christian Hohnstaedt, netdev
[-- Attachment #1: Type: text/plain, Size: 1431 bytes --]
Phy is compatible with Vitesse 8221.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
drivers/net/phy/vitesse.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/drivers/net/phy/vitesse.c b/drivers/net/phy/vitesse.c
index d6e988f..69b482b 100644
--- a/drivers/net/phy/vitesse.c
+++ b/drivers/net/phy/vitesse.c
@@ -56,6 +56,7 @@
#define PHY_ID_VSC8244 0x000fc6c0
#define PHY_ID_VSC8221 0x000fc550
+#define PHY_ID_VSC8211 0x000fc4b0
MODULE_DESCRIPTION("Vitesse PHY driver");
MODULE_AUTHOR("Kriston Carson");
@@ -175,6 +176,19 @@ static struct phy_driver vsc82xx_driver[] = {
.ack_interrupt = &vsc824x_ack_interrupt,
.config_intr = &vsc82xx_config_intr,
.driver = { .owner = THIS_MODULE,},
+}, {
+ /* Vitesse 8211 */
+ .phy_id = PHY_ID_VSC8211,
+ .phy_id_mask = 0x000ffff0,
+ .name = "Vitesse VSC8211",
+ .features = PHY_GBIT_FEATURES,
+ .flags = PHY_HAS_INTERRUPT,
+ .config_init = &vsc8221_config_init,
+ .config_aneg = &genphy_config_aneg,
+ .read_status = &genphy_read_status,
+ .ack_interrupt = &vsc824x_ack_interrupt,
+ .config_intr = &vsc82xx_config_intr,
+ .driver = { .owner = THIS_MODULE,},
} };
static int __init vsc82xx_init(void)
@@ -195,6 +209,7 @@ module_exit(vsc82xx_exit);
static struct mdio_device_id __maybe_unused vitesse_tbl[] = {
{ PHY_ID_VSC8244, 0x000fffc0 },
{ PHY_ID_VSC8221, 0x000ffff0 },
+ { PHY_ID_VSC8211, 0x000ffff0 },
{ }
};
--
1.8.2.3
[-- Attachment #2: Type: application/pgp-signature, Size: 198 bytes --]
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 03/11] phy: Use macros instead of hardcoded values in marvell phy driver
2013-05-29 15:33 [PATCH 01/11] phy: Clean coding style in vitesse phy Michal Simek
2013-05-29 15:33 ` [PATCH 02/11] phy: Add Vitesse 8211 phy ID Michal Simek
@ 2013-05-29 15:33 ` Michal Simek
2013-05-29 15:33 ` [PATCH 04/11] phy: Add Marvell 88E1116R phy ID Michal Simek
` (7 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Michal Simek @ 2013-05-29 15:33 UTC (permalink / raw)
To: linux-kernel
Cc: Michal Simek, Michal Simek, David S. Miller, Lars-Peter Clausen,
Christian Hohnstaedt, Rick Hoover, netdev
[-- Attachment #1: Type: text/plain, Size: 1302 bytes --]
Use macros from linux/marvell_phy.h instead of duplicate
magic phy ID in the driver.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
drivers/net/phy/marvell.c | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index 202fe1f..371353c 100644
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -958,15 +958,15 @@ module_init(marvell_init);
module_exit(marvell_exit);
static struct mdio_device_id __maybe_unused marvell_tbl[] = {
- { 0x01410c60, 0xfffffff0 },
- { 0x01410c90, 0xfffffff0 },
- { 0x01410cc0, 0xfffffff0 },
- { 0x01410e10, 0xfffffff0 },
- { 0x01410cb0, 0xfffffff0 },
- { 0x01410cd0, 0xfffffff0 },
- { 0x01410e50, 0xfffffff0 },
- { 0x01410e30, 0xfffffff0 },
- { 0x01410e90, 0xfffffff0 },
+ { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
+ { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
+ { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
+ { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
+ { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
+ { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
+ { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
+ { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
+ { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
{ }
};
--
1.8.2.3
[-- Attachment #2: Type: application/pgp-signature, Size: 198 bytes --]
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 04/11] phy: Add Marvell 88E1116R phy ID
2013-05-29 15:33 [PATCH 01/11] phy: Clean coding style in vitesse phy Michal Simek
2013-05-29 15:33 ` [PATCH 02/11] phy: Add Vitesse 8211 phy ID Michal Simek
2013-05-29 15:33 ` [PATCH 03/11] phy: Use macros instead of hardcoded values in marvell phy driver Michal Simek
@ 2013-05-29 15:33 ` Michal Simek
2013-05-29 15:33 ` [PATCH 05/11] phy: Add Marvell 88E1510 " Michal Simek
` (6 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Michal Simek @ 2013-05-29 15:33 UTC (permalink / raw)
To: linux-kernel
Cc: Michal Simek, Michal Simek, David S. Miller, Lars-Peter Clausen,
Christian Hohnstaedt, Rick Hoover, Anirudha Sarangi, Steven Wang,
netdev
[-- Attachment #1: Type: text/plain, Size: 3418 bytes --]
This phy is on Xilinx ZC702 zynq development board.
Signed-off-by: Anirudha Sarangi <anirudh@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
drivers/net/phy/marvell.c | 65 +++++++++++++++++++++++++++++++++++++++++++++
include/linux/marvell_phy.h | 1 +
2 files changed, 66 insertions(+)
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index 371353c..df5a9f6 100644
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -116,6 +116,8 @@
#define MII_M1011_PHY_STATUS_RESOLVED 0x0800
#define MII_M1011_PHY_STATUS_LINK 0x0400
+#define MII_M1116R_CONTROL_REG_MAC 21
+
MODULE_DESCRIPTION("Marvell PHY driver");
MODULE_AUTHOR("Andy Fleming");
@@ -372,6 +374,55 @@ static int m88e1318_config_aneg(struct phy_device *phydev)
return m88e1121_config_aneg(phydev);
}
+static int m88e1116r_config_init(struct phy_device *phydev)
+{
+ int temp;
+ int err;
+
+ temp = phy_read(phydev, MII_BMCR);
+ temp |= BMCR_RESET;
+ err = phy_write(phydev, MII_BMCR, temp);
+ if (err < 0)
+ return err;
+
+ mdelay(500);
+
+ err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0);
+ if (err < 0)
+ return err;
+
+ temp = phy_read(phydev, MII_M1011_PHY_SCR);
+ temp |= (7 << 12); /* max number of gigabit attempts */
+ temp |= (1 << 11); /* enable downshift */
+ temp |= MII_M1011_PHY_SCR_AUTO_CROSS;
+ err = phy_write(phydev, MII_M1011_PHY_SCR, temp);
+ if (err < 0)
+ return err;
+
+ err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 2);
+ if (err < 0)
+ return err;
+ temp = phy_read(phydev, MII_M1116R_CONTROL_REG_MAC);
+ temp |= (1 << 5);
+ temp |= (1 << 4);
+ err = phy_write(phydev, MII_M1116R_CONTROL_REG_MAC, temp);
+ if (err < 0)
+ return err;
+ err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0);
+ if (err < 0)
+ return err;
+
+ temp = phy_read(phydev, MII_BMCR);
+ temp |= BMCR_RESET;
+ err = phy_write(phydev, MII_BMCR, temp);
+ if (err < 0)
+ return err;
+
+ mdelay(500);
+
+ return 0;
+}
+
static int m88e1111_config_init(struct phy_device *phydev)
{
int err;
@@ -940,6 +991,19 @@ static struct phy_driver marvell_drivers[] = {
.config_intr = &marvell_config_intr,
.driver = { .owner = THIS_MODULE },
},
+ {
+ .phy_id = MARVELL_PHY_ID_88E1116R,
+ .phy_id_mask = MARVELL_PHY_ID_MASK,
+ .name = "Marvell 88E1116R",
+ .features = PHY_GBIT_FEATURES,
+ .flags = PHY_HAS_INTERRUPT,
+ .config_init = &m88e1116r_config_init,
+ .config_aneg = &genphy_config_aneg,
+ .read_status = &genphy_read_status,
+ .ack_interrupt = &marvell_ack_interrupt,
+ .config_intr = &marvell_config_intr,
+ .driver = { .owner = THIS_MODULE },
+ },
};
static int __init marvell_init(void)
@@ -967,6 +1031,7 @@ static struct mdio_device_id __maybe_unused marvell_tbl[] = {
{ MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
{ MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
{ MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
+ { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
{ }
};
diff --git a/include/linux/marvell_phy.h b/include/linux/marvell_phy.h
index dd3c34e..ec41025 100644
--- a/include/linux/marvell_phy.h
+++ b/include/linux/marvell_phy.h
@@ -14,6 +14,7 @@
#define MARVELL_PHY_ID_88E1149R 0x01410e50
#define MARVELL_PHY_ID_88E1240 0x01410e30
#define MARVELL_PHY_ID_88E1318S 0x01410e90
+#define MARVELL_PHY_ID_88E1116R 0x01410e40
/* struct phy_device dev_flags definitions */
#define MARVELL_PHY_M1145_FLAGS_RESISTANCE 0x00000001
--
1.8.2.3
[-- Attachment #2: Type: application/pgp-signature, Size: 198 bytes --]
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 05/11] phy: Add Marvell 88E1510 phy ID
2013-05-29 15:33 [PATCH 01/11] phy: Clean coding style in vitesse phy Michal Simek
` (2 preceding siblings ...)
2013-05-29 15:33 ` [PATCH 04/11] phy: Add Marvell 88E1116R phy ID Michal Simek
@ 2013-05-29 15:33 ` Michal Simek
2013-05-29 15:33 ` [PATCH 06/11] net: emaclite: Report failures in mdio setup Michal Simek
` (5 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Michal Simek @ 2013-05-29 15:33 UTC (permalink / raw)
To: linux-kernel
Cc: Michal Simek, Michal Simek, David S. Miller, Lars-Peter Clausen,
Christian Hohnstaedt, Rick Hoover, Anirudha Sarangi, Steven Wang,
netdev
[-- Attachment #1: Type: text/plain, Size: 2342 bytes --]
Add support for this new phy ID.
Signed-off-by: Rick Hoover <RHoover@digilentinc.com>
Signed-off-by: Steven Wang <steven.wang@digilentinc.com>
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
drivers/net/phy/marvell.c | 25 +++++++++++++++++++++++++
include/linux/marvell_phy.h | 1 +
2 files changed, 26 insertions(+)
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index df5a9f6..2e91477 100644
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -374,6 +374,17 @@ static int m88e1318_config_aneg(struct phy_device *phydev)
return m88e1121_config_aneg(phydev);
}
+static int m88e1510_config_aneg(struct phy_device *phydev)
+{
+ int err;
+
+ err = m88e1318_config_aneg(phydev);
+ if (err < 0)
+ return err;
+
+ return marvell_of_reg_init(phydev);
+}
+
static int m88e1116r_config_init(struct phy_device *phydev)
{
int temp;
@@ -1004,6 +1015,19 @@ static struct phy_driver marvell_drivers[] = {
.config_intr = &marvell_config_intr,
.driver = { .owner = THIS_MODULE },
},
+ {
+ .phy_id = MARVELL_PHY_ID_88E1510,
+ .phy_id_mask = MARVELL_PHY_ID_MASK,
+ .name = "Marvell 88E1510",
+ .features = PHY_GBIT_FEATURES,
+ .flags = PHY_HAS_INTERRUPT,
+ .config_aneg = &m88e1510_config_aneg,
+ .read_status = &marvell_read_status,
+ .ack_interrupt = &marvell_ack_interrupt,
+ .config_intr = &marvell_config_intr,
+ .did_interrupt = &m88e1121_did_interrupt,
+ .driver = { .owner = THIS_MODULE },
+ },
};
static int __init marvell_init(void)
@@ -1032,6 +1056,7 @@ static struct mdio_device_id __maybe_unused marvell_tbl[] = {
{ MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
{ MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
{ MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
+ { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
{ }
};
diff --git a/include/linux/marvell_phy.h b/include/linux/marvell_phy.h
index ec41025..8e9a029 100644
--- a/include/linux/marvell_phy.h
+++ b/include/linux/marvell_phy.h
@@ -15,6 +15,7 @@
#define MARVELL_PHY_ID_88E1240 0x01410e30
#define MARVELL_PHY_ID_88E1318S 0x01410e90
#define MARVELL_PHY_ID_88E1116R 0x01410e40
+#define MARVELL_PHY_ID_88E1510 0x01410dd0
/* struct phy_device dev_flags definitions */
#define MARVELL_PHY_M1145_FLAGS_RESISTANCE 0x00000001
--
1.8.2.3
[-- Attachment #2: Type: application/pgp-signature, Size: 198 bytes --]
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 06/11] net: emaclite: Report failures in mdio setup
2013-05-29 15:33 [PATCH 01/11] phy: Clean coding style in vitesse phy Michal Simek
` (3 preceding siblings ...)
2013-05-29 15:33 ` [PATCH 05/11] phy: Add Marvell 88E1510 " Michal Simek
@ 2013-05-29 15:33 ` Michal Simek
2013-05-29 15:33 ` [PATCH 07/11] net: emaclite: Support multiple phys connected to one MDIO bus Michal Simek
` (4 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Michal Simek @ 2013-05-29 15:33 UTC (permalink / raw)
To: linux-kernel
Cc: Michal Simek, Michal Simek, Bill Pemberton, Greg Kroah-Hartman,
netdev
[-- Attachment #1: Type: text/plain, Size: 1445 bytes --]
Be more verbose when any problem happens.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
drivers/net/ethernet/xilinx/xilinx_emaclite.c | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
index 919b983..a16dc35 100644
--- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
+++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
@@ -852,8 +852,10 @@ static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
/* Don't register the MDIO bus if the phy_node or its parent node
* can't be found.
*/
- if (!np)
+ if (!np) {
+ dev_err(dev, "Failed to register mdio bus.\n");
return -ENODEV;
+ }
/* Enable the MDIO bus by asserting the enable bit in MDIO Control
* register.
@@ -862,8 +864,10 @@ static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
XEL_MDIOCTRL_MDIOEN_MASK);
bus = mdiobus_alloc();
- if (!bus)
+ if (!bus) {
+ dev_err(dev, "Failed to allocal mdiobus\n");
return -ENOMEM;
+ }
of_address_to_resource(np, 0, &res);
snprintf(bus->id, MII_BUS_ID_SIZE, "%.8llx",
@@ -879,8 +883,10 @@ static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
lp->mii_bus = bus;
rc = of_mdiobus_register(bus, np);
- if (rc)
+ if (rc) {
+ dev_err(dev, "Failed to register mdio bus.\n");
goto err_register;
+ }
return 0;
--
1.8.2.3
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^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 07/11] net: emaclite: Support multiple phys connected to one MDIO bus
2013-05-29 15:33 [PATCH 01/11] phy: Clean coding style in vitesse phy Michal Simek
` (4 preceding siblings ...)
2013-05-29 15:33 ` [PATCH 06/11] net: emaclite: Report failures in mdio setup Michal Simek
@ 2013-05-29 15:33 ` Michal Simek
2013-05-29 15:33 ` [PATCH 08/11] net: emaclite: Let's make xemaclite_adjust_link static Michal Simek
` (3 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Michal Simek @ 2013-05-29 15:33 UTC (permalink / raw)
To: linux-kernel
Cc: Michal Simek, Michal Simek, Bill Pemberton, Greg Kroah-Hartman,
netdev
[-- Attachment #1: Type: text/plain, Size: 2737 bytes --]
For system which contains at least two ethernet IP where
one IP manage MDIO bus with several PHYs.
Example dts node:
ethernet_mac0: ethernet@81000000 {
compatible = "xlnx,xps-ethernetlite-1.00.a";
device_type = "network";
interrupt-parent = <&xps_intc_0>;
interrupts = < 1 0 >;
local-mac-address = [ 00 0a 35 00 db bb ];
phy-handle = <ðernet_mac0_phy0>;
reg = < 0x81000000 0x10000 >;
xlnx,duplex = <0x1>;
xlnx,family = "spartan3e";
xlnx,include-internal-loopback = <0x0>;
xlnx,include-mdio = <0x1>;
xlnx,rx-ping-pong = <0x0>;
xlnx,tx-ping-pong = <0x0>;
ethernet_mac0_mdio {
#address-cells = <1>;
#size-cells = <0>;
ethernet_mac0_phy0: phy@1 {
reg = <0x1>;
} ;
ethernet_mac0_phy1: phy@3 {
reg = <0x3>;
} ;
} ;
} ;
ethernet_mac2: ethernet@81040000 {
compatible = "xlnx,xps-ethernetlite-1.00.a";
device_type = "network";
interrupt-parent = <&xps_intc_0>;
interrupts = < 11 0 >;
local-mac-address = [ 00 0a 35 00 db bb ];
phy-handle = <ðernet_mac0_phy1>;
reg = < 0x81040000 0x10000 >;
xlnx,duplex = <0x1>;
xlnx,family = "spartan3e";
xlnx,include-internal-loopback = <0x0>;
xlnx,include-mdio = <0x0>;
xlnx,rx-ping-pong = <0x0>;
xlnx,tx-ping-pong = <0x0>;
} ;
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
drivers/net/ethernet/xilinx/xilinx_emaclite.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
index a16dc35..fcd1e0b 100644
--- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
+++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
@@ -848,6 +848,7 @@ static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
int rc;
struct resource res;
struct device_node *np = of_get_parent(lp->phy_node);
+ struct device_node *npp;
/* Don't register the MDIO bus if the phy_node or its parent node
* can't be found.
@@ -856,6 +857,17 @@ static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
dev_err(dev, "Failed to register mdio bus.\n");
return -ENODEV;
}
+ npp = of_get_parent(np);
+
+ of_address_to_resource(npp, 0, &res);
+ if (lp->ndev->mem_start != res.start) {
+ struct phy_device *phydev;
+ phydev = of_phy_find_device(lp->phy_node);
+ if (!phydev)
+ dev_info(dev,
+ "MDIO of the phy is not registered yet\n");
+ return 0;
+ }
/* Enable the MDIO bus by asserting the enable bit in MDIO Control
* register.
@@ -869,7 +881,6 @@ static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
return -ENOMEM;
}
- of_address_to_resource(np, 0, &res);
snprintf(bus->id, MII_BUS_ID_SIZE, "%.8llx",
(unsigned long long)res.start);
bus->priv = lp;
--
1.8.2.3
[-- Attachment #2: Type: application/pgp-signature, Size: 198 bytes --]
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 08/11] net: emaclite: Let's make xemaclite_adjust_link static
2013-05-29 15:33 [PATCH 01/11] phy: Clean coding style in vitesse phy Michal Simek
` (5 preceding siblings ...)
2013-05-29 15:33 ` [PATCH 07/11] net: emaclite: Support multiple phys connected to one MDIO bus Michal Simek
@ 2013-05-29 15:33 ` Michal Simek
2013-05-29 15:33 ` [PATCH 09/11] net: emaclite: Do not use microblaze and ppc IO functions Michal Simek
` (2 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Michal Simek @ 2013-05-29 15:33 UTC (permalink / raw)
To: linux-kernel
Cc: Michal Simek, Michal Simek, Bill Pemberton, Greg Kroah-Hartman,
netdev
[-- Attachment #1: Type: text/plain, Size: 970 bytes --]
xemaclite_adjust_link is used locally.
It removes sparse warning:
drivers/net/ethernet/xilinx/xilinx_emaclite.c:916:6: warning:
symbol 'xemaclite_adjust_link' was not declared. Should it be static?
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
drivers/net/ethernet/xilinx/xilinx_emaclite.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
index fcd1e0b..93bb14e 100644
--- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
+++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
@@ -913,7 +913,7 @@ err_register:
* There's nothing in the Emaclite device to be configured when the link
* state changes. We just print the status.
*/
-void xemaclite_adjust_link(struct net_device *ndev)
+static void xemaclite_adjust_link(struct net_device *ndev)
{
struct net_local *lp = netdev_priv(ndev);
struct phy_device *phy = lp->phy_dev;
--
1.8.2.3
[-- Attachment #2: Type: application/pgp-signature, Size: 198 bytes --]
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 09/11] net: emaclite: Do not use microblaze and ppc IO functions
2013-05-29 15:33 [PATCH 01/11] phy: Clean coding style in vitesse phy Michal Simek
` (6 preceding siblings ...)
2013-05-29 15:33 ` [PATCH 08/11] net: emaclite: Let's make xemaclite_adjust_link static Michal Simek
@ 2013-05-29 15:33 ` Michal Simek
2013-05-29 16:04 ` Michal Simek
2013-05-29 15:33 ` [PATCH 10/11] net: emaclite: Enable emaclite for Xilinx Arm Zynq platform Michal Simek
2013-05-29 15:33 ` [PATCH 11/11] net: emaclite: Update driver header Michal Simek
9 siblings, 1 reply; 14+ messages in thread
From: Michal Simek @ 2013-05-29 15:33 UTC (permalink / raw)
To: linux-kernel
Cc: Michal Simek, Michal Simek, Bill Pemberton, Greg Kroah-Hartman,
netdev
[-- Attachment #1: Type: text/plain, Size: 12363 bytes --]
Emaclite can be used on ARM zynq where in_be32/out_be32 IO
functions are not present. Use standard __raw_readl/__raw_writel
IO functions instead.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
drivers/net/ethernet/xilinx/xilinx_emaclite.c | 100 +++++++++++++-------------
1 file changed, 51 insertions(+), 49 deletions(-)
diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
index 93bb14e..0d8515b 100644
--- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
+++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
@@ -159,34 +159,34 @@ static void xemaclite_enable_interrupts(struct net_local *drvdata)
u32 reg_data;
/* Enable the Tx interrupts for the first Buffer */
- reg_data = in_be32(drvdata->base_addr + XEL_TSR_OFFSET);
- out_be32(drvdata->base_addr + XEL_TSR_OFFSET,
+ reg_data = __raw_readl(drvdata->base_addr + XEL_TSR_OFFSET);
+ __raw_writel(drvdata->base_addr + XEL_TSR_OFFSET,
reg_data | XEL_TSR_XMIT_IE_MASK);
/* Enable the Tx interrupts for the second Buffer if
* configured in HW */
if (drvdata->tx_ping_pong != 0) {
- reg_data = in_be32(drvdata->base_addr +
+ reg_data = __raw_readl(drvdata->base_addr +
XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
- out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
+ __raw_writel(drvdata->base_addr + XEL_BUFFER_OFFSET +
XEL_TSR_OFFSET,
reg_data | XEL_TSR_XMIT_IE_MASK);
}
/* Enable the Rx interrupts for the first buffer */
- out_be32(drvdata->base_addr + XEL_RSR_OFFSET,
+ __raw_writel(drvdata->base_addr + XEL_RSR_OFFSET,
XEL_RSR_RECV_IE_MASK);
/* Enable the Rx interrupts for the second Buffer if
* configured in HW */
if (drvdata->rx_ping_pong != 0) {
- out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
+ __raw_writel(drvdata->base_addr + XEL_BUFFER_OFFSET +
XEL_RSR_OFFSET,
XEL_RSR_RECV_IE_MASK);
}
/* Enable the Global Interrupt Enable */
- out_be32(drvdata->base_addr + XEL_GIER_OFFSET, XEL_GIER_GIE_MASK);
+ __raw_writel(drvdata->base_addr + XEL_GIER_OFFSET, XEL_GIER_GIE_MASK);
}
/**
@@ -201,35 +201,35 @@ static void xemaclite_disable_interrupts(struct net_local *drvdata)
u32 reg_data;
/* Disable the Global Interrupt Enable */
- out_be32(drvdata->base_addr + XEL_GIER_OFFSET, XEL_GIER_GIE_MASK);
+ __raw_writel(drvdata->base_addr + XEL_GIER_OFFSET, XEL_GIER_GIE_MASK);
/* Disable the Tx interrupts for the first buffer */
- reg_data = in_be32(drvdata->base_addr + XEL_TSR_OFFSET);
- out_be32(drvdata->base_addr + XEL_TSR_OFFSET,
+ reg_data = __raw_readl(drvdata->base_addr + XEL_TSR_OFFSET);
+ __raw_writel(drvdata->base_addr + XEL_TSR_OFFSET,
reg_data & (~XEL_TSR_XMIT_IE_MASK));
/* Disable the Tx interrupts for the second Buffer
* if configured in HW */
if (drvdata->tx_ping_pong != 0) {
- reg_data = in_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
+ reg_data = __raw_readl(drvdata->base_addr + XEL_BUFFER_OFFSET +
XEL_TSR_OFFSET);
- out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
+ __raw_writel(drvdata->base_addr + XEL_BUFFER_OFFSET +
XEL_TSR_OFFSET,
reg_data & (~XEL_TSR_XMIT_IE_MASK));
}
/* Disable the Rx interrupts for the first buffer */
- reg_data = in_be32(drvdata->base_addr + XEL_RSR_OFFSET);
- out_be32(drvdata->base_addr + XEL_RSR_OFFSET,
+ reg_data = __raw_readl(drvdata->base_addr + XEL_RSR_OFFSET);
+ __raw_writel(drvdata->base_addr + XEL_RSR_OFFSET,
reg_data & (~XEL_RSR_RECV_IE_MASK));
/* Disable the Rx interrupts for the second buffer
* if configured in HW */
if (drvdata->rx_ping_pong != 0) {
- reg_data = in_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
+ reg_data = __raw_readl(drvdata->base_addr + XEL_BUFFER_OFFSET +
XEL_RSR_OFFSET);
- out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
+ __raw_writel(drvdata->base_addr + XEL_BUFFER_OFFSET +
XEL_RSR_OFFSET,
reg_data & (~XEL_RSR_RECV_IE_MASK));
}
@@ -351,7 +351,7 @@ static int xemaclite_send_data(struct net_local *drvdata, u8 *data,
byte_count = ETH_FRAME_LEN;
/* Check if the expected buffer is available */
- reg_data = in_be32(addr + XEL_TSR_OFFSET);
+ reg_data = __raw_readl(addr + XEL_TSR_OFFSET);
if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK |
XEL_TSR_XMIT_ACTIVE_MASK)) == 0) {
@@ -364,7 +364,7 @@ static int xemaclite_send_data(struct net_local *drvdata, u8 *data,
addr = (void __iomem __force *)((u32 __force)addr ^
XEL_BUFFER_OFFSET);
- reg_data = in_be32(addr + XEL_TSR_OFFSET);
+ reg_data = __raw_readl(addr + XEL_TSR_OFFSET);
if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK |
XEL_TSR_XMIT_ACTIVE_MASK)) != 0)
@@ -375,15 +375,16 @@ static int xemaclite_send_data(struct net_local *drvdata, u8 *data,
/* Write the frame to the buffer */
xemaclite_aligned_write(data, (u32 __force *) addr, byte_count);
- out_be32(addr + XEL_TPLR_OFFSET, (byte_count & XEL_TPLR_LENGTH_MASK));
+ __raw_writel(addr + XEL_TPLR_OFFSET,
+ (byte_count & XEL_TPLR_LENGTH_MASK));
/* Update the Tx Status Register to indicate that there is a
* frame to send. Set the XEL_TSR_XMIT_ACTIVE_MASK flag which
* is used by the interrupt handler to check whether a frame
* has been transmitted */
- reg_data = in_be32(addr + XEL_TSR_OFFSET);
+ reg_data = __raw_readl(addr + XEL_TSR_OFFSET);
reg_data |= (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_XMIT_ACTIVE_MASK);
- out_be32(addr + XEL_TSR_OFFSET, reg_data);
+ __raw_writel(addr + XEL_TSR_OFFSET, reg_data);
return 0;
}
@@ -408,7 +409,7 @@ static u16 xemaclite_recv_data(struct net_local *drvdata, u8 *data)
addr = (drvdata->base_addr + drvdata->next_rx_buf_to_use);
/* Verify which buffer has valid data */
- reg_data = in_be32(addr + XEL_RSR_OFFSET);
+ reg_data = __raw_readl(addr + XEL_RSR_OFFSET);
if ((reg_data & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) {
if (drvdata->rx_ping_pong != 0)
@@ -425,14 +426,14 @@ static u16 xemaclite_recv_data(struct net_local *drvdata, u8 *data)
return 0; /* No data was available */
/* Verify that buffer has valid data */
- reg_data = in_be32(addr + XEL_RSR_OFFSET);
+ reg_data = __raw_readl(addr + XEL_RSR_OFFSET);
if ((reg_data & XEL_RSR_RECV_DONE_MASK) !=
XEL_RSR_RECV_DONE_MASK)
return 0; /* No data was available */
}
/* Get the protocol type of the ethernet frame that arrived */
- proto_type = ((ntohl(in_be32(addr + XEL_HEADER_OFFSET +
+ proto_type = ((ntohl(__raw_readl(addr + XEL_HEADER_OFFSET +
XEL_RXBUFF_OFFSET)) >> XEL_HEADER_SHIFT) &
XEL_RPLR_LENGTH_MASK);
@@ -441,7 +442,7 @@ static u16 xemaclite_recv_data(struct net_local *drvdata, u8 *data)
if (proto_type > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
if (proto_type == ETH_P_IP) {
- length = ((ntohl(in_be32(addr +
+ length = ((ntohl(__raw_readl(addr +
XEL_HEADER_IP_LENGTH_OFFSET +
XEL_RXBUFF_OFFSET)) >>
XEL_HEADER_SHIFT) &
@@ -463,9 +464,9 @@ static u16 xemaclite_recv_data(struct net_local *drvdata, u8 *data)
data, length);
/* Acknowledge the frame */
- reg_data = in_be32(addr + XEL_RSR_OFFSET);
+ reg_data = __raw_readl(addr + XEL_RSR_OFFSET);
reg_data &= ~XEL_RSR_RECV_DONE_MASK;
- out_be32(addr + XEL_RSR_OFFSET, reg_data);
+ __raw_writel(addr + XEL_RSR_OFFSET, reg_data);
return length;
}
@@ -492,14 +493,14 @@ static void xemaclite_update_address(struct net_local *drvdata,
xemaclite_aligned_write(address_ptr, (u32 __force *) addr, ETH_ALEN);
- out_be32(addr + XEL_TPLR_OFFSET, ETH_ALEN);
+ __raw_writel(addr + XEL_TPLR_OFFSET, ETH_ALEN);
/* Update the MAC address in the EmacLite */
- reg_data = in_be32(addr + XEL_TSR_OFFSET);
- out_be32(addr + XEL_TSR_OFFSET, reg_data | XEL_TSR_PROG_MAC_ADDR);
+ reg_data = __raw_readl(addr + XEL_TSR_OFFSET);
+ __raw_writel(addr + XEL_TSR_OFFSET, reg_data | XEL_TSR_PROG_MAC_ADDR);
/* Wait for EmacLite to finish with the MAC address update */
- while ((in_be32(addr + XEL_TSR_OFFSET) &
+ while ((__raw_readl(addr + XEL_TSR_OFFSET) &
XEL_TSR_PROG_MAC_ADDR) != 0)
;
}
@@ -669,30 +670,31 @@ static irqreturn_t xemaclite_interrupt(int irq, void *dev_id)
u32 tx_status;
/* Check if there is Rx Data available */
- if ((in_be32(base_addr + XEL_RSR_OFFSET) & XEL_RSR_RECV_DONE_MASK) ||
- (in_be32(base_addr + XEL_BUFFER_OFFSET + XEL_RSR_OFFSET)
+ if ((__raw_readl(base_addr + XEL_RSR_OFFSET) &
+ XEL_RSR_RECV_DONE_MASK) ||
+ (__raw_readl(base_addr + XEL_BUFFER_OFFSET + XEL_RSR_OFFSET)
& XEL_RSR_RECV_DONE_MASK))
xemaclite_rx_handler(dev);
/* Check if the Transmission for the first buffer is completed */
- tx_status = in_be32(base_addr + XEL_TSR_OFFSET);
+ tx_status = __raw_readl(base_addr + XEL_TSR_OFFSET);
if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) &&
(tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) {
tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK;
- out_be32(base_addr + XEL_TSR_OFFSET, tx_status);
+ __raw_writel(base_addr + XEL_TSR_OFFSET, tx_status);
tx_complete = true;
}
/* Check if the Transmission for the second buffer is completed */
- tx_status = in_be32(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
+ tx_status = __raw_readl(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) &&
(tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) {
tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK;
- out_be32(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET,
+ __raw_writel(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET,
tx_status);
tx_complete = true;
@@ -726,7 +728,7 @@ static int xemaclite_mdio_wait(struct net_local *lp)
/* wait for the MDIO interface to not be busy or timeout
after some time.
*/
- while (in_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET) &
+ while (__raw_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET) &
XEL_MDIOCTRL_MDIOSTS_MASK) {
if (end - jiffies <= 0) {
WARN_ON(1);
@@ -762,17 +764,17 @@ static int xemaclite_mdio_read(struct mii_bus *bus, int phy_id, int reg)
* MDIO Address register. Set the Status bit in the MDIO Control
* register to start a MDIO read transaction.
*/
- ctrl_reg = in_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET);
- out_be32(lp->base_addr + XEL_MDIOADDR_OFFSET,
+ ctrl_reg = __raw_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET);
+ __raw_writel(lp->base_addr + XEL_MDIOADDR_OFFSET,
XEL_MDIOADDR_OP_MASK |
((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg));
- out_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET,
+ __raw_writel(lp->base_addr + XEL_MDIOCTRL_OFFSET,
ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK);
if (xemaclite_mdio_wait(lp))
return -ETIMEDOUT;
- rc = in_be32(lp->base_addr + XEL_MDIORD_OFFSET);
+ rc = __raw_readl(lp->base_addr + XEL_MDIORD_OFFSET);
dev_dbg(&lp->ndev->dev,
"xemaclite_mdio_read(phy_id=%i, reg=%x) == %x\n",
@@ -809,12 +811,12 @@ static int xemaclite_mdio_write(struct mii_bus *bus, int phy_id, int reg,
* Data register. Finally, set the Status bit in the MDIO Control
* register to start a MDIO write transaction.
*/
- ctrl_reg = in_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET);
- out_be32(lp->base_addr + XEL_MDIOADDR_OFFSET,
+ ctrl_reg = __raw_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET);
+ __raw_writel(lp->base_addr + XEL_MDIOADDR_OFFSET,
~XEL_MDIOADDR_OP_MASK &
((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg));
- out_be32(lp->base_addr + XEL_MDIOWR_OFFSET, val);
- out_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET,
+ __raw_writel(lp->base_addr + XEL_MDIOWR_OFFSET, val);
+ __raw_writel(lp->base_addr + XEL_MDIOCTRL_OFFSET,
ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK);
return 0;
@@ -872,7 +874,7 @@ static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
/* Enable the MDIO bus by asserting the enable bit in MDIO Control
* register.
*/
- out_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET,
+ __raw_writel(lp->base_addr + XEL_MDIOCTRL_OFFSET,
XEL_MDIOCTRL_MDIOEN_MASK);
bus = mdiobus_alloc();
@@ -1197,8 +1199,8 @@ static int xemaclite_of_probe(struct platform_device *ofdev)
dev_warn(dev, "No MAC address found\n");
/* Clear the Tx CSR's in case this is a restart */
- out_be32(lp->base_addr + XEL_TSR_OFFSET, 0);
- out_be32(lp->base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET, 0);
+ __raw_writel(lp->base_addr + XEL_TSR_OFFSET, 0);
+ __raw_writel(lp->base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET, 0);
/* Set the MAC address in the EmacLite device */
xemaclite_update_address(lp, ndev->dev_addr);
--
1.8.2.3
[-- Attachment #2: Type: application/pgp-signature, Size: 198 bytes --]
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH 09/11] net: emaclite: Do not use microblaze and ppc IO functions
2013-05-29 15:33 ` [PATCH 09/11] net: emaclite: Do not use microblaze and ppc IO functions Michal Simek
@ 2013-05-29 16:04 ` Michal Simek
0 siblings, 0 replies; 14+ messages in thread
From: Michal Simek @ 2013-05-29 16:04 UTC (permalink / raw)
To: Michal Simek; +Cc: linux-kernel, Bill Pemberton, Greg Kroah-Hartman, netdev
[-- Attachment #1: Type: text/plain, Size: 1505 bytes --]
On 05/29/2013 05:33 PM, Michal Simek wrote:
> Emaclite can be used on ARM zynq where in_be32/out_be32 IO
> functions are not present. Use standard __raw_readl/__raw_writel
> IO functions instead.
>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> ---
> drivers/net/ethernet/xilinx/xilinx_emaclite.c | 100 +++++++++++++-------------
> 1 file changed, 51 insertions(+), 49 deletions(-)
>
> diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
> index 93bb14e..0d8515b 100644
> --- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
> +++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
> @@ -159,34 +159,34 @@ static void xemaclite_enable_interrupts(struct net_local *drvdata)
> u32 reg_data;
>
> /* Enable the Tx interrupts for the first Buffer */
> - reg_data = in_be32(drvdata->base_addr + XEL_TSR_OFFSET);
> - out_be32(drvdata->base_addr + XEL_TSR_OFFSET,
> + reg_data = __raw_readl(drvdata->base_addr + XEL_TSR_OFFSET);
> + __raw_writel(drvdata->base_addr + XEL_TSR_OFFSET,
> reg_data | XEL_TSR_XMIT_IE_MASK);
oou - this is completely wrong.
Will do v2.
Sorry for that.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 263 bytes --]
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 10/11] net: emaclite: Enable emaclite for Xilinx Arm Zynq platform
2013-05-29 15:33 [PATCH 01/11] phy: Clean coding style in vitesse phy Michal Simek
` (7 preceding siblings ...)
2013-05-29 15:33 ` [PATCH 09/11] net: emaclite: Do not use microblaze and ppc IO functions Michal Simek
@ 2013-05-29 15:33 ` Michal Simek
2013-05-29 15:33 ` [PATCH 11/11] net: emaclite: Update driver header Michal Simek
9 siblings, 0 replies; 14+ messages in thread
From: Michal Simek @ 2013-05-29 15:33 UTC (permalink / raw)
To: linux-kernel; +Cc: Michal Simek, Michal Simek, David S. Miller, netdev
[-- Attachment #1: Type: text/plain, Size: 1007 bytes --]
Enable emaclite for Xilinx ARM Zynq platform.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
drivers/net/ethernet/xilinx/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/xilinx/Kconfig b/drivers/net/ethernet/xilinx/Kconfig
index 122d60c..7b90a5e 100644
--- a/drivers/net/ethernet/xilinx/Kconfig
+++ b/drivers/net/ethernet/xilinx/Kconfig
@@ -5,7 +5,7 @@
config NET_VENDOR_XILINX
bool "Xilinx devices"
default y
- depends on PPC || PPC32 || MICROBLAZE
+ depends on PPC || PPC32 || MICROBLAZE || ARCH_ZYNQ
---help---
If you have a network (Ethernet) card belonging to this class, say Y
and read the Ethernet-HOWTO, available from
@@ -20,7 +20,7 @@ if NET_VENDOR_XILINX
config XILINX_EMACLITE
tristate "Xilinx 10/100 Ethernet Lite support"
- depends on (PPC32 || MICROBLAZE)
+ depends on (PPC32 || MICROBLAZE || ARCH_ZYNQ)
select PHYLIB
---help---
This driver supports the 10/100 Ethernet Lite from Xilinx.
--
1.8.2.3
[-- Attachment #2: Type: application/pgp-signature, Size: 198 bytes --]
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 11/11] net: emaclite: Update driver header
2013-05-29 15:33 [PATCH 01/11] phy: Clean coding style in vitesse phy Michal Simek
` (8 preceding siblings ...)
2013-05-29 15:33 ` [PATCH 10/11] net: emaclite: Enable emaclite for Xilinx Arm Zynq platform Michal Simek
@ 2013-05-29 15:33 ` Michal Simek
2013-05-29 17:11 ` Sergei Shtylyov
9 siblings, 1 reply; 14+ messages in thread
From: Michal Simek @ 2013-05-29 15:33 UTC (permalink / raw)
To: linux-kernel
Cc: Michal Simek, Michal Simek, Bill Pemberton, Greg Kroah-Hartman,
netdev
[-- Attachment #1: Type: text/plain, Size: 957 bytes --]
Corrent email address and years.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
drivers/net/ethernet/xilinx/xilinx_emaclite.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
index 0d8515b..af12314 100644
--- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
+++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
@@ -2,9 +2,9 @@
* Xilinx EmacLite Linux driver for the Xilinx Ethernet MAC Lite device.
*
* This is a new flat driver which is based on the original emac_lite
- * driver from John Williams <john.williams@petalogix.com>.
+ * driver from John Williams <john.williams@xilinx.com>.
*
- * 2007-2009 (c) Xilinx, Inc.
+ * 2007 - 2013 (c) Xilinx, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
--
1.8.2.3
[-- Attachment #2: Type: application/pgp-signature, Size: 198 bytes --]
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH 11/11] net: emaclite: Update driver header
2013-05-29 15:33 ` [PATCH 11/11] net: emaclite: Update driver header Michal Simek
@ 2013-05-29 17:11 ` Sergei Shtylyov
2013-05-30 5:14 ` Michal Simek
0 siblings, 1 reply; 14+ messages in thread
From: Sergei Shtylyov @ 2013-05-29 17:11 UTC (permalink / raw)
To: Michal Simek
Cc: linux-kernel, Michal Simek, Bill Pemberton, Greg Kroah-Hartman,
netdev
Hello.
On 05/29/2013 07:33 PM, Michal Simek wrote:
> Corrent email address and years.
s/Corrent/Correct/. Perhaps the committer can fix.
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
WBR, Sergei
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH 11/11] net: emaclite: Update driver header
2013-05-29 17:11 ` Sergei Shtylyov
@ 2013-05-30 5:14 ` Michal Simek
0 siblings, 0 replies; 14+ messages in thread
From: Michal Simek @ 2013-05-30 5:14 UTC (permalink / raw)
To: Sergei Shtylyov
Cc: Michal Simek, linux-kernel, Bill Pemberton, Greg Kroah-Hartman,
netdev
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On 05/29/2013 07:11 PM, Sergei Shtylyov wrote:
> Hello.
>
> On 05/29/2013 07:33 PM, Michal Simek wrote:
>
>> Corrent email address and years.
>
> s/Corrent/Correct/. Perhaps the committer can fix.
I will fix it in v2, one patch is broken anyway.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
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^ permalink raw reply [flat|nested] 14+ messages in thread