* [PATCH v2 1/6] net: emaclite: Report failures in mdio setup
2013-05-30 10:28 [PATCH v2 0/6] Emaclite patches Michal Simek
@ 2013-05-30 10:28 ` Michal Simek
2013-05-30 10:28 ` [PATCH v2 2/6] net: emaclite: Support multiple phys connected to one MDIO bus Michal Simek
` (6 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Michal Simek @ 2013-05-30 10:28 UTC (permalink / raw)
To: linux-kernel
Cc: Michal Simek, Michal Simek, renner, Bill Pemberton,
Greg Kroah-Hartman, netdev
[-- Attachment #1: Type: text/plain, Size: 1466 bytes --]
Be more verbose when any problem happens.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v2: None
drivers/net/ethernet/xilinx/xilinx_emaclite.c | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
index 919b983..a16dc35 100644
--- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
+++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
@@ -852,8 +852,10 @@ static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
/* Don't register the MDIO bus if the phy_node or its parent node
* can't be found.
*/
- if (!np)
+ if (!np) {
+ dev_err(dev, "Failed to register mdio bus.\n");
return -ENODEV;
+ }
/* Enable the MDIO bus by asserting the enable bit in MDIO Control
* register.
@@ -862,8 +864,10 @@ static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
XEL_MDIOCTRL_MDIOEN_MASK);
bus = mdiobus_alloc();
- if (!bus)
+ if (!bus) {
+ dev_err(dev, "Failed to allocal mdiobus\n");
return -ENOMEM;
+ }
of_address_to_resource(np, 0, &res);
snprintf(bus->id, MII_BUS_ID_SIZE, "%.8llx",
@@ -879,8 +883,10 @@ static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
lp->mii_bus = bus;
rc = of_mdiobus_register(bus, np);
- if (rc)
+ if (rc) {
+ dev_err(dev, "Failed to register mdio bus.\n");
goto err_register;
+ }
return 0;
--
1.8.2.3
[-- Attachment #2: Type: application/pgp-signature, Size: 198 bytes --]
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 2/6] net: emaclite: Support multiple phys connected to one MDIO bus
2013-05-30 10:28 [PATCH v2 0/6] Emaclite patches Michal Simek
2013-05-30 10:28 ` [PATCH v2 1/6] net: emaclite: Report failures in mdio setup Michal Simek
@ 2013-05-30 10:28 ` Michal Simek
2013-05-30 10:28 ` [PATCH v2 3/6] net: emaclite: Let's make xemaclite_adjust_link static Michal Simek
` (5 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Michal Simek @ 2013-05-30 10:28 UTC (permalink / raw)
To: linux-kernel
Cc: Michal Simek, Michal Simek, renner, Bill Pemberton,
Greg Kroah-Hartman, netdev
[-- Attachment #1: Type: text/plain, Size: 2758 bytes --]
For system which contains at least two ethernet IP where
one IP manage MDIO bus with several PHYs.
Example dts node:
ethernet_mac0: ethernet@81000000 {
compatible = "xlnx,xps-ethernetlite-1.00.a";
device_type = "network";
interrupt-parent = <&xps_intc_0>;
interrupts = < 1 0 >;
local-mac-address = [ 00 0a 35 00 db bb ];
phy-handle = <ðernet_mac0_phy0>;
reg = < 0x81000000 0x10000 >;
xlnx,duplex = <0x1>;
xlnx,family = "spartan3e";
xlnx,include-internal-loopback = <0x0>;
xlnx,include-mdio = <0x1>;
xlnx,rx-ping-pong = <0x0>;
xlnx,tx-ping-pong = <0x0>;
ethernet_mac0_mdio {
#address-cells = <1>;
#size-cells = <0>;
ethernet_mac0_phy0: phy@1 {
reg = <0x1>;
} ;
ethernet_mac0_phy1: phy@3 {
reg = <0x3>;
} ;
} ;
} ;
ethernet_mac2: ethernet@81040000 {
compatible = "xlnx,xps-ethernetlite-1.00.a";
device_type = "network";
interrupt-parent = <&xps_intc_0>;
interrupts = < 11 0 >;
local-mac-address = [ 00 0a 35 00 db bb ];
phy-handle = <ðernet_mac0_phy1>;
reg = < 0x81040000 0x10000 >;
xlnx,duplex = <0x1>;
xlnx,family = "spartan3e";
xlnx,include-internal-loopback = <0x0>;
xlnx,include-mdio = <0x0>;
xlnx,rx-ping-pong = <0x0>;
xlnx,tx-ping-pong = <0x0>;
} ;
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v2: None
drivers/net/ethernet/xilinx/xilinx_emaclite.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
index a16dc35..fcd1e0b 100644
--- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
+++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
@@ -848,6 +848,7 @@ static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
int rc;
struct resource res;
struct device_node *np = of_get_parent(lp->phy_node);
+ struct device_node *npp;
/* Don't register the MDIO bus if the phy_node or its parent node
* can't be found.
@@ -856,6 +857,17 @@ static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
dev_err(dev, "Failed to register mdio bus.\n");
return -ENODEV;
}
+ npp = of_get_parent(np);
+
+ of_address_to_resource(npp, 0, &res);
+ if (lp->ndev->mem_start != res.start) {
+ struct phy_device *phydev;
+ phydev = of_phy_find_device(lp->phy_node);
+ if (!phydev)
+ dev_info(dev,
+ "MDIO of the phy is not registered yet\n");
+ return 0;
+ }
/* Enable the MDIO bus by asserting the enable bit in MDIO Control
* register.
@@ -869,7 +881,6 @@ static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
return -ENOMEM;
}
- of_address_to_resource(np, 0, &res);
snprintf(bus->id, MII_BUS_ID_SIZE, "%.8llx",
(unsigned long long)res.start);
bus->priv = lp;
--
1.8.2.3
[-- Attachment #2: Type: application/pgp-signature, Size: 198 bytes --]
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 3/6] net: emaclite: Let's make xemaclite_adjust_link static
2013-05-30 10:28 [PATCH v2 0/6] Emaclite patches Michal Simek
2013-05-30 10:28 ` [PATCH v2 1/6] net: emaclite: Report failures in mdio setup Michal Simek
2013-05-30 10:28 ` [PATCH v2 2/6] net: emaclite: Support multiple phys connected to one MDIO bus Michal Simek
@ 2013-05-30 10:28 ` Michal Simek
2013-05-30 10:28 ` [PATCH v2 4/6] net: emaclite: Do not use microblaze and ppc IO functions Michal Simek
` (4 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Michal Simek @ 2013-05-30 10:28 UTC (permalink / raw)
To: linux-kernel
Cc: Michal Simek, Michal Simek, renner, Bill Pemberton,
Greg Kroah-Hartman, netdev
[-- Attachment #1: Type: text/plain, Size: 991 bytes --]
xemaclite_adjust_link is used locally.
It removes sparse warning:
drivers/net/ethernet/xilinx/xilinx_emaclite.c:916:6: warning:
symbol 'xemaclite_adjust_link' was not declared. Should it be static?
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v2: None
drivers/net/ethernet/xilinx/xilinx_emaclite.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
index fcd1e0b..93bb14e 100644
--- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
+++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
@@ -913,7 +913,7 @@ err_register:
* There's nothing in the Emaclite device to be configured when the link
* state changes. We just print the status.
*/
-void xemaclite_adjust_link(struct net_device *ndev)
+static void xemaclite_adjust_link(struct net_device *ndev)
{
struct net_local *lp = netdev_priv(ndev);
struct phy_device *phy = lp->phy_dev;
--
1.8.2.3
[-- Attachment #2: Type: application/pgp-signature, Size: 198 bytes --]
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 4/6] net: emaclite: Do not use microblaze and ppc IO functions
2013-05-30 10:28 [PATCH v2 0/6] Emaclite patches Michal Simek
` (2 preceding siblings ...)
2013-05-30 10:28 ` [PATCH v2 3/6] net: emaclite: Let's make xemaclite_adjust_link static Michal Simek
@ 2013-05-30 10:28 ` Michal Simek
2013-05-30 10:28 ` [PATCH v2 5/6] net: emaclite: Enable emaclite for Xilinx Arm Zynq platform Michal Simek
` (3 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Michal Simek @ 2013-05-30 10:28 UTC (permalink / raw)
To: linux-kernel
Cc: Michal Simek, Michal Simek, renner, Bill Pemberton,
Greg Kroah-Hartman, netdev
[-- Attachment #1: Type: text/plain, Size: 13191 bytes --]
Emaclite can be used on ARM zynq where in_be32/out_be32 IO
functions are not present. Use standard __raw_readl/__raw_writel
IO functions instead.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v2:
- Fix __raw_iowrite() to pass correct parameters
drivers/net/ethernet/xilinx/xilinx_emaclite.c | 138 +++++++++++++-------------
1 file changed, 69 insertions(+), 69 deletions(-)
diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
index 93bb14e..9227ed7 100644
--- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
+++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
@@ -159,34 +159,32 @@ static void xemaclite_enable_interrupts(struct net_local *drvdata)
u32 reg_data;
/* Enable the Tx interrupts for the first Buffer */
- reg_data = in_be32(drvdata->base_addr + XEL_TSR_OFFSET);
- out_be32(drvdata->base_addr + XEL_TSR_OFFSET,
- reg_data | XEL_TSR_XMIT_IE_MASK);
+ reg_data = __raw_readl(drvdata->base_addr + XEL_TSR_OFFSET);
+ __raw_writel(reg_data | XEL_TSR_XMIT_IE_MASK,
+ drvdata->base_addr + XEL_TSR_OFFSET);
/* Enable the Tx interrupts for the second Buffer if
* configured in HW */
if (drvdata->tx_ping_pong != 0) {
- reg_data = in_be32(drvdata->base_addr +
+ reg_data = __raw_readl(drvdata->base_addr +
XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
- out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
- XEL_TSR_OFFSET,
- reg_data | XEL_TSR_XMIT_IE_MASK);
+ __raw_writel(reg_data | XEL_TSR_XMIT_IE_MASK,
+ drvdata->base_addr + XEL_BUFFER_OFFSET +
+ XEL_TSR_OFFSET);
}
/* Enable the Rx interrupts for the first buffer */
- out_be32(drvdata->base_addr + XEL_RSR_OFFSET,
- XEL_RSR_RECV_IE_MASK);
+ __raw_writel(XEL_RSR_RECV_IE_MASK, drvdata->base_addr + XEL_RSR_OFFSET);
/* Enable the Rx interrupts for the second Buffer if
* configured in HW */
if (drvdata->rx_ping_pong != 0) {
- out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
- XEL_RSR_OFFSET,
- XEL_RSR_RECV_IE_MASK);
+ __raw_writel(XEL_RSR_RECV_IE_MASK, drvdata->base_addr +
+ XEL_BUFFER_OFFSET + XEL_RSR_OFFSET);
}
/* Enable the Global Interrupt Enable */
- out_be32(drvdata->base_addr + XEL_GIER_OFFSET, XEL_GIER_GIE_MASK);
+ __raw_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET);
}
/**
@@ -201,37 +199,37 @@ static void xemaclite_disable_interrupts(struct net_local *drvdata)
u32 reg_data;
/* Disable the Global Interrupt Enable */
- out_be32(drvdata->base_addr + XEL_GIER_OFFSET, XEL_GIER_GIE_MASK);
+ __raw_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET);
/* Disable the Tx interrupts for the first buffer */
- reg_data = in_be32(drvdata->base_addr + XEL_TSR_OFFSET);
- out_be32(drvdata->base_addr + XEL_TSR_OFFSET,
- reg_data & (~XEL_TSR_XMIT_IE_MASK));
+ reg_data = __raw_readl(drvdata->base_addr + XEL_TSR_OFFSET);
+ __raw_writel(reg_data & (~XEL_TSR_XMIT_IE_MASK),
+ drvdata->base_addr + XEL_TSR_OFFSET);
/* Disable the Tx interrupts for the second Buffer
* if configured in HW */
if (drvdata->tx_ping_pong != 0) {
- reg_data = in_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
+ reg_data = __raw_readl(drvdata->base_addr + XEL_BUFFER_OFFSET +
XEL_TSR_OFFSET);
- out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
- XEL_TSR_OFFSET,
- reg_data & (~XEL_TSR_XMIT_IE_MASK));
+ __raw_writel(reg_data & (~XEL_TSR_XMIT_IE_MASK),
+ drvdata->base_addr + XEL_BUFFER_OFFSET +
+ XEL_TSR_OFFSET);
}
/* Disable the Rx interrupts for the first buffer */
- reg_data = in_be32(drvdata->base_addr + XEL_RSR_OFFSET);
- out_be32(drvdata->base_addr + XEL_RSR_OFFSET,
- reg_data & (~XEL_RSR_RECV_IE_MASK));
+ reg_data = __raw_readl(drvdata->base_addr + XEL_RSR_OFFSET);
+ __raw_writel(reg_data & (~XEL_RSR_RECV_IE_MASK),
+ drvdata->base_addr + XEL_RSR_OFFSET);
/* Disable the Rx interrupts for the second buffer
* if configured in HW */
if (drvdata->rx_ping_pong != 0) {
- reg_data = in_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
+ reg_data = __raw_readl(drvdata->base_addr + XEL_BUFFER_OFFSET +
XEL_RSR_OFFSET);
- out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
- XEL_RSR_OFFSET,
- reg_data & (~XEL_RSR_RECV_IE_MASK));
+ __raw_writel(reg_data & (~XEL_RSR_RECV_IE_MASK),
+ drvdata->base_addr + XEL_BUFFER_OFFSET +
+ XEL_RSR_OFFSET);
}
}
@@ -351,7 +349,7 @@ static int xemaclite_send_data(struct net_local *drvdata, u8 *data,
byte_count = ETH_FRAME_LEN;
/* Check if the expected buffer is available */
- reg_data = in_be32(addr + XEL_TSR_OFFSET);
+ reg_data = __raw_readl(addr + XEL_TSR_OFFSET);
if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK |
XEL_TSR_XMIT_ACTIVE_MASK)) == 0) {
@@ -364,7 +362,7 @@ static int xemaclite_send_data(struct net_local *drvdata, u8 *data,
addr = (void __iomem __force *)((u32 __force)addr ^
XEL_BUFFER_OFFSET);
- reg_data = in_be32(addr + XEL_TSR_OFFSET);
+ reg_data = __raw_readl(addr + XEL_TSR_OFFSET);
if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK |
XEL_TSR_XMIT_ACTIVE_MASK)) != 0)
@@ -375,15 +373,16 @@ static int xemaclite_send_data(struct net_local *drvdata, u8 *data,
/* Write the frame to the buffer */
xemaclite_aligned_write(data, (u32 __force *) addr, byte_count);
- out_be32(addr + XEL_TPLR_OFFSET, (byte_count & XEL_TPLR_LENGTH_MASK));
+ __raw_writel((byte_count & XEL_TPLR_LENGTH_MASK),
+ addr + XEL_TPLR_OFFSET);
/* Update the Tx Status Register to indicate that there is a
* frame to send. Set the XEL_TSR_XMIT_ACTIVE_MASK flag which
* is used by the interrupt handler to check whether a frame
* has been transmitted */
- reg_data = in_be32(addr + XEL_TSR_OFFSET);
+ reg_data = __raw_readl(addr + XEL_TSR_OFFSET);
reg_data |= (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_XMIT_ACTIVE_MASK);
- out_be32(addr + XEL_TSR_OFFSET, reg_data);
+ __raw_writel(reg_data, addr + XEL_TSR_OFFSET);
return 0;
}
@@ -408,7 +407,7 @@ static u16 xemaclite_recv_data(struct net_local *drvdata, u8 *data)
addr = (drvdata->base_addr + drvdata->next_rx_buf_to_use);
/* Verify which buffer has valid data */
- reg_data = in_be32(addr + XEL_RSR_OFFSET);
+ reg_data = __raw_readl(addr + XEL_RSR_OFFSET);
if ((reg_data & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) {
if (drvdata->rx_ping_pong != 0)
@@ -425,14 +424,14 @@ static u16 xemaclite_recv_data(struct net_local *drvdata, u8 *data)
return 0; /* No data was available */
/* Verify that buffer has valid data */
- reg_data = in_be32(addr + XEL_RSR_OFFSET);
+ reg_data = __raw_readl(addr + XEL_RSR_OFFSET);
if ((reg_data & XEL_RSR_RECV_DONE_MASK) !=
XEL_RSR_RECV_DONE_MASK)
return 0; /* No data was available */
}
/* Get the protocol type of the ethernet frame that arrived */
- proto_type = ((ntohl(in_be32(addr + XEL_HEADER_OFFSET +
+ proto_type = ((ntohl(__raw_readl(addr + XEL_HEADER_OFFSET +
XEL_RXBUFF_OFFSET)) >> XEL_HEADER_SHIFT) &
XEL_RPLR_LENGTH_MASK);
@@ -441,7 +440,7 @@ static u16 xemaclite_recv_data(struct net_local *drvdata, u8 *data)
if (proto_type > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
if (proto_type == ETH_P_IP) {
- length = ((ntohl(in_be32(addr +
+ length = ((ntohl(__raw_readl(addr +
XEL_HEADER_IP_LENGTH_OFFSET +
XEL_RXBUFF_OFFSET)) >>
XEL_HEADER_SHIFT) &
@@ -463,9 +462,9 @@ static u16 xemaclite_recv_data(struct net_local *drvdata, u8 *data)
data, length);
/* Acknowledge the frame */
- reg_data = in_be32(addr + XEL_RSR_OFFSET);
+ reg_data = __raw_readl(addr + XEL_RSR_OFFSET);
reg_data &= ~XEL_RSR_RECV_DONE_MASK;
- out_be32(addr + XEL_RSR_OFFSET, reg_data);
+ __raw_writel(reg_data, addr + XEL_RSR_OFFSET);
return length;
}
@@ -492,14 +491,14 @@ static void xemaclite_update_address(struct net_local *drvdata,
xemaclite_aligned_write(address_ptr, (u32 __force *) addr, ETH_ALEN);
- out_be32(addr + XEL_TPLR_OFFSET, ETH_ALEN);
+ __raw_writel(ETH_ALEN, addr + XEL_TPLR_OFFSET);
/* Update the MAC address in the EmacLite */
- reg_data = in_be32(addr + XEL_TSR_OFFSET);
- out_be32(addr + XEL_TSR_OFFSET, reg_data | XEL_TSR_PROG_MAC_ADDR);
+ reg_data = __raw_readl(addr + XEL_TSR_OFFSET);
+ __raw_writel(reg_data | XEL_TSR_PROG_MAC_ADDR, addr + XEL_TSR_OFFSET);
/* Wait for EmacLite to finish with the MAC address update */
- while ((in_be32(addr + XEL_TSR_OFFSET) &
+ while ((__raw_readl(addr + XEL_TSR_OFFSET) &
XEL_TSR_PROG_MAC_ADDR) != 0)
;
}
@@ -669,31 +668,32 @@ static irqreturn_t xemaclite_interrupt(int irq, void *dev_id)
u32 tx_status;
/* Check if there is Rx Data available */
- if ((in_be32(base_addr + XEL_RSR_OFFSET) & XEL_RSR_RECV_DONE_MASK) ||
- (in_be32(base_addr + XEL_BUFFER_OFFSET + XEL_RSR_OFFSET)
+ if ((__raw_readl(base_addr + XEL_RSR_OFFSET) &
+ XEL_RSR_RECV_DONE_MASK) ||
+ (__raw_readl(base_addr + XEL_BUFFER_OFFSET + XEL_RSR_OFFSET)
& XEL_RSR_RECV_DONE_MASK))
xemaclite_rx_handler(dev);
/* Check if the Transmission for the first buffer is completed */
- tx_status = in_be32(base_addr + XEL_TSR_OFFSET);
+ tx_status = __raw_readl(base_addr + XEL_TSR_OFFSET);
if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) &&
(tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) {
tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK;
- out_be32(base_addr + XEL_TSR_OFFSET, tx_status);
+ __raw_writel(tx_status, base_addr + XEL_TSR_OFFSET);
tx_complete = true;
}
/* Check if the Transmission for the second buffer is completed */
- tx_status = in_be32(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
+ tx_status = __raw_readl(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) &&
(tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) {
tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK;
- out_be32(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET,
- tx_status);
+ __raw_writel(tx_status, base_addr + XEL_BUFFER_OFFSET +
+ XEL_TSR_OFFSET);
tx_complete = true;
}
@@ -726,7 +726,7 @@ static int xemaclite_mdio_wait(struct net_local *lp)
/* wait for the MDIO interface to not be busy or timeout
after some time.
*/
- while (in_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET) &
+ while (__raw_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET) &
XEL_MDIOCTRL_MDIOSTS_MASK) {
if (end - jiffies <= 0) {
WARN_ON(1);
@@ -762,17 +762,17 @@ static int xemaclite_mdio_read(struct mii_bus *bus, int phy_id, int reg)
* MDIO Address register. Set the Status bit in the MDIO Control
* register to start a MDIO read transaction.
*/
- ctrl_reg = in_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET);
- out_be32(lp->base_addr + XEL_MDIOADDR_OFFSET,
- XEL_MDIOADDR_OP_MASK |
- ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg));
- out_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET,
- ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK);
+ ctrl_reg = __raw_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET);
+ __raw_writel(XEL_MDIOADDR_OP_MASK |
+ ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg),
+ lp->base_addr + XEL_MDIOADDR_OFFSET);
+ __raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK,
+ lp->base_addr + XEL_MDIOCTRL_OFFSET);
if (xemaclite_mdio_wait(lp))
return -ETIMEDOUT;
- rc = in_be32(lp->base_addr + XEL_MDIORD_OFFSET);
+ rc = __raw_readl(lp->base_addr + XEL_MDIORD_OFFSET);
dev_dbg(&lp->ndev->dev,
"xemaclite_mdio_read(phy_id=%i, reg=%x) == %x\n",
@@ -809,13 +809,13 @@ static int xemaclite_mdio_write(struct mii_bus *bus, int phy_id, int reg,
* Data register. Finally, set the Status bit in the MDIO Control
* register to start a MDIO write transaction.
*/
- ctrl_reg = in_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET);
- out_be32(lp->base_addr + XEL_MDIOADDR_OFFSET,
- ~XEL_MDIOADDR_OP_MASK &
- ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg));
- out_be32(lp->base_addr + XEL_MDIOWR_OFFSET, val);
- out_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET,
- ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK);
+ ctrl_reg = __raw_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET);
+ __raw_writel(~XEL_MDIOADDR_OP_MASK &
+ ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg),
+ lp->base_addr + XEL_MDIOADDR_OFFSET);
+ __raw_writel(val, lp->base_addr + XEL_MDIOWR_OFFSET);
+ __raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK,
+ lp->base_addr + XEL_MDIOCTRL_OFFSET);
return 0;
}
@@ -872,8 +872,8 @@ static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
/* Enable the MDIO bus by asserting the enable bit in MDIO Control
* register.
*/
- out_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET,
- XEL_MDIOCTRL_MDIOEN_MASK);
+ __raw_writel(XEL_MDIOCTRL_MDIOEN_MASK,
+ lp->base_addr + XEL_MDIOCTRL_OFFSET);
bus = mdiobus_alloc();
if (!bus) {
@@ -1197,8 +1197,8 @@ static int xemaclite_of_probe(struct platform_device *ofdev)
dev_warn(dev, "No MAC address found\n");
/* Clear the Tx CSR's in case this is a restart */
- out_be32(lp->base_addr + XEL_TSR_OFFSET, 0);
- out_be32(lp->base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET, 0);
+ __raw_writel(0, lp->base_addr + XEL_TSR_OFFSET);
+ __raw_writel(0, lp->base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
/* Set the MAC address in the EmacLite device */
xemaclite_update_address(lp, ndev->dev_addr);
--
1.8.2.3
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^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 5/6] net: emaclite: Enable emaclite for Xilinx Arm Zynq platform
2013-05-30 10:28 [PATCH v2 0/6] Emaclite patches Michal Simek
` (3 preceding siblings ...)
2013-05-30 10:28 ` [PATCH v2 4/6] net: emaclite: Do not use microblaze and ppc IO functions Michal Simek
@ 2013-05-30 10:28 ` Michal Simek
2013-05-30 10:28 ` [PATCH v2 6/6] net: emaclite: Update driver header Michal Simek
` (2 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Michal Simek @ 2013-05-30 10:28 UTC (permalink / raw)
To: linux-kernel; +Cc: Michal Simek, Michal Simek, renner, David S. Miller, netdev
[-- Attachment #1: Type: text/plain, Size: 1028 bytes --]
Enable emaclite for Xilinx ARM Zynq platform.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v2: None
drivers/net/ethernet/xilinx/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/xilinx/Kconfig b/drivers/net/ethernet/xilinx/Kconfig
index 122d60c..7b90a5e 100644
--- a/drivers/net/ethernet/xilinx/Kconfig
+++ b/drivers/net/ethernet/xilinx/Kconfig
@@ -5,7 +5,7 @@
config NET_VENDOR_XILINX
bool "Xilinx devices"
default y
- depends on PPC || PPC32 || MICROBLAZE
+ depends on PPC || PPC32 || MICROBLAZE || ARCH_ZYNQ
---help---
If you have a network (Ethernet) card belonging to this class, say Y
and read the Ethernet-HOWTO, available from
@@ -20,7 +20,7 @@ if NET_VENDOR_XILINX
config XILINX_EMACLITE
tristate "Xilinx 10/100 Ethernet Lite support"
- depends on (PPC32 || MICROBLAZE)
+ depends on (PPC32 || MICROBLAZE || ARCH_ZYNQ)
select PHYLIB
---help---
This driver supports the 10/100 Ethernet Lite from Xilinx.
--
1.8.2.3
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^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 6/6] net: emaclite: Update driver header
2013-05-30 10:28 [PATCH v2 0/6] Emaclite patches Michal Simek
` (4 preceding siblings ...)
2013-05-30 10:28 ` [PATCH v2 5/6] net: emaclite: Enable emaclite for Xilinx Arm Zynq platform Michal Simek
@ 2013-05-30 10:28 ` Michal Simek
2013-05-31 0:14 ` [PATCH v2 0/6] Emaclite patches David Miller
2013-05-31 9:10 ` Jens Renner (EFE)
7 siblings, 0 replies; 10+ messages in thread
From: Michal Simek @ 2013-05-30 10:28 UTC (permalink / raw)
To: linux-kernel
Cc: Michal Simek, Michal Simek, renner, Bill Pemberton,
Greg Kroah-Hartman, netdev
[-- Attachment #1: Type: text/plain, Size: 1015 bytes --]
Correct email address and years.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v2:
- s/Corrent/Correct/ in patch description
drivers/net/ethernet/xilinx/xilinx_emaclite.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
index 9227ed7..aa14d8a 100644
--- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
+++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
@@ -2,9 +2,9 @@
* Xilinx EmacLite Linux driver for the Xilinx Ethernet MAC Lite device.
*
* This is a new flat driver which is based on the original emac_lite
- * driver from John Williams <john.williams@petalogix.com>.
+ * driver from John Williams <john.williams@xilinx.com>.
*
- * 2007-2009 (c) Xilinx, Inc.
+ * 2007 - 2013 (c) Xilinx, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
--
1.8.2.3
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^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH v2 0/6] Emaclite patches
2013-05-30 10:28 [PATCH v2 0/6] Emaclite patches Michal Simek
` (5 preceding siblings ...)
2013-05-30 10:28 ` [PATCH v2 6/6] net: emaclite: Update driver header Michal Simek
@ 2013-05-31 0:14 ` David Miller
2013-05-31 9:10 ` Jens Renner (EFE)
7 siblings, 0 replies; 10+ messages in thread
From: David Miller @ 2013-05-31 0:14 UTC (permalink / raw)
To: michal.simek; +Cc: linux-kernel, monstr, renner, netdev, gregkh, wfp5p
From: Michal Simek <michal.simek@xilinx.com>
Date: Thu, 30 May 2013 12:28:02 +0200
> I have separated these emaclite patches from
> phy patches because it is easier for creating
> new versions.
Series applied, thanks.
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH v2 0/6] Emaclite patches
2013-05-30 10:28 [PATCH v2 0/6] Emaclite patches Michal Simek
` (6 preceding siblings ...)
2013-05-31 0:14 ` [PATCH v2 0/6] Emaclite patches David Miller
@ 2013-05-31 9:10 ` Jens Renner (EFE)
2013-05-31 9:15 ` Michal Simek
7 siblings, 1 reply; 10+ messages in thread
From: Jens Renner (EFE) @ 2013-05-31 9:10 UTC (permalink / raw)
To: Michal Simek; +Cc: Michal Simek, netdev
Am 30.05.2013 12:28, schrieb Michal Simek:
> I have separated these emaclite patches from phy patches because it is
> easier for creating new versions.
>
> Thanks, Michal
>
> Changes in v2: - Fix __raw_iowrite() to pass correct parameters -
> s/Corrent/Correct/ in patch description
>
> Michal Simek (6): net: emaclite: Report failures in mdio setup net:
> emaclite: Support multiple phys connected to one MDIO bus net: emaclite:
> Let's make xemaclite_adjust_link static net: emaclite: Do not use
> microblaze and ppc IO functions net: emaclite: Enable emaclite for Xilinx
> Arm Zynq platform net: emaclite: Update driver header
>
> drivers/net/ethernet/xilinx/Kconfig | 4 +-
> drivers/net/ethernet/xilinx/xilinx_emaclite.c | 169
> ++++++++++++++------------ 2 files changed, 95 insertions(+), 78
> deletions(-)
Works without problems on our Microblaze platform (as far as the patches affect
our functionality). MDIO verbosity has been tested ok.
> @@ -862,8 +864,10 @@ static int xemaclite_mdio_setup(struct net_local *lp,
struct device *dev)
> XEL_MDIOCTRL_MDIOEN_MASK);
>
> bus = mdiobus_alloc(); - if (!bus) + if (!bus) { + dev_err(dev, "Failed to
> allocal mdiobus\n"); return -ENOMEM; + }
>
> of_address_to_resource(np, 0, &res); snprintf(bus->id, MII_BUS_ID_SIZE,
> "%.8llx",
Shouldn't the wording be "allocate" instead of "allocal" in PATCH v2 1/6 (net:
emaclite: Report failures in mdio setup)?
Regards
Jens.
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH v2 0/6] Emaclite patches
2013-05-31 9:10 ` Jens Renner (EFE)
@ 2013-05-31 9:15 ` Michal Simek
0 siblings, 0 replies; 10+ messages in thread
From: Michal Simek @ 2013-05-31 9:15 UTC (permalink / raw)
To: Jens Renner (EFE); +Cc: Michal Simek, netdev
[-- Attachment #1: Type: text/plain, Size: 1927 bytes --]
On 05/31/2013 11:10 AM, Jens Renner (EFE) wrote:
> Am 30.05.2013 12:28, schrieb Michal Simek:
>> I have separated these emaclite patches from phy patches because it is
>> easier for creating new versions.
>>
>> Thanks, Michal
>>
>> Changes in v2: - Fix __raw_iowrite() to pass correct parameters -
>> s/Corrent/Correct/ in patch description
>>
>> Michal Simek (6): net: emaclite: Report failures in mdio setup net:
>> emaclite: Support multiple phys connected to one MDIO bus net: emaclite:
>> Let's make xemaclite_adjust_link static net: emaclite: Do not use
>> microblaze and ppc IO functions net: emaclite: Enable emaclite for Xilinx
>> Arm Zynq platform net: emaclite: Update driver header
>>
>> drivers/net/ethernet/xilinx/Kconfig | 4 +-
>> drivers/net/ethernet/xilinx/xilinx_emaclite.c | 169
>> ++++++++++++++------------ 2 files changed, 95 insertions(+), 78
>> deletions(-)
>
> Works without problems on our Microblaze platform (as far as the patches affect
> our functionality). MDIO verbosity has been tested ok.
>
>> @@ -862,8 +864,10 @@ static int xemaclite_mdio_setup(struct net_local *lp,
> struct device *dev)
>> XEL_MDIOCTRL_MDIOEN_MASK);
>>
>> bus = mdiobus_alloc(); - if (!bus) + if (!bus) { + dev_err(dev, "Failed to
>> allocal mdiobus\n"); return -ENOMEM; + }
>>
>> of_address_to_resource(np, 0, &res); snprintf(bus->id, MII_BUS_ID_SIZE,
>> "%.8llx",
>
> Shouldn't the wording be "allocate" instead of "allocal" in PATCH v2 1/6 (net:
> emaclite: Report failures in mdio setup)?
Ah yeah. Will you create patch to fix it?
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
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^ permalink raw reply [flat|nested] 10+ messages in thread