* [PATCH net] net/mlx4: Cache line CQE/EQE stride fixes
@ 2014-12-16 11:28 Amir Vadai
2014-12-16 12:29 ` Amir Vadai
0 siblings, 1 reply; 3+ messages in thread
From: Amir Vadai @ 2014-12-16 11:28 UTC (permalink / raw)
To: David S. Miller
Cc: netdev, Amir Vadai, Yevgeny Petrilin, Or Gerlitz, clsoto,
Ido Shamay, Wei Yang
From: Ido Shamay <idos@mellanox.com>
This commit contains 2 fixes for the 128B CQE/EQE stride feaure.
Wei found that mlx4_QUERY_HCA function marked the wrong capability
in flags (64B CQE/EQE), when CQE/EQE stride feature was enabled.
Also added small fix in initial CQE ownership bit assignment, when CQE
is size is not default 32B.
Fixes: 77507aa24 (net/mlx4: Enable CQE/EQE stride support)
Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
Signed-off-by: Ido Shamay <idos@mellanox.com>
Signed-off-by: Amir Vadai <amirv@mellanox.com>
---
Dave Hi,
Please pull this patch also to stable (at least 3.17)
Thanks,
Amir
drivers/net/ethernet/mellanox/mlx4/en_netdev.c | 11 +++++++++--
drivers/net/ethernet/mellanox/mlx4/fw.c | 4 ++--
2 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_netdev.c b/drivers/net/ethernet/mellanox/mlx4/en_netdev.c
index 6ff214d..190cbd9 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_netdev.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_netdev.c
@@ -1569,8 +1569,15 @@ int mlx4_en_start_port(struct net_device *dev)
mlx4_en_free_affinity_hint(priv, i);
goto cq_err;
}
- for (j = 0; j < cq->size; j++)
- cq->buf[j].owner_sr_opcode = MLX4_CQE_OWNER_MASK;
+
+ for (j = 0; j < cq->size; j++) {
+ struct mlx4_cqe *cqe = NULL;
+
+ cqe = mlx4_en_get_cqe(cq->buf, j, priv->cqe_size) +
+ priv->cqe_factor;
+ cqe->owner_sr_opcode = MLX4_CQE_OWNER_MASK;
+ }
+
err = mlx4_en_set_cq_moder(priv, cq);
if (err) {
en_err(priv, "Failed setting cq moderation parameters\n");
diff --git a/drivers/net/ethernet/mellanox/mlx4/fw.c b/drivers/net/ethernet/mellanox/mlx4/fw.c
index ef3b95b..32c848d 100644
--- a/drivers/net/ethernet/mellanox/mlx4/fw.c
+++ b/drivers/net/ethernet/mellanox/mlx4/fw.c
@@ -1848,8 +1848,8 @@ int mlx4_QUERY_HCA(struct mlx4_dev *dev,
/* CX3 is capable of extending CQEs\EQEs to strides larger than 64B */
MLX4_GET(byte_field, outbox, INIT_HCA_EQE_CQE_STRIDE_OFFSET);
if (byte_field) {
- param->dev_cap_enabled |= MLX4_DEV_CAP_64B_EQE_ENABLED;
- param->dev_cap_enabled |= MLX4_DEV_CAP_64B_CQE_ENABLED;
+ param->dev_cap_enabled |= MLX4_DEV_CAP_EQE_STRIDE_ENABLED;
+ param->dev_cap_enabled |= MLX4_DEV_CAP_CQE_STRIDE_ENABLED;
param->cqe_size = 1 << ((byte_field &
MLX4_CQE_SIZE_MASK_STRIDE) + 5);
param->eqe_size = 1 << (((byte_field &
--
1.8.3.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH net] net/mlx4: Cache line CQE/EQE stride fixes
2014-12-16 11:28 [PATCH net] net/mlx4: Cache line CQE/EQE stride fixes Amir Vadai
@ 2014-12-16 12:29 ` Amir Vadai
2014-12-16 20:24 ` David Miller
0 siblings, 1 reply; 3+ messages in thread
From: Amir Vadai @ 2014-12-16 12:29 UTC (permalink / raw)
To: David S. Miller
Cc: netdev@vger.kernel.org, Yevgeny Petrilin, Or Gerlitz,
clsoto@linux.vnet.ibm.com, Ido Shamay, Wei Yang
On 12/16/2014 1:28 PM, Amir Vadai wrote:
> From: Ido Shamay <idos@mellanox.com>
>
> This commit contains 2 fixes for the 128B CQE/EQE stride feaure.
> Wei found that mlx4_QUERY_HCA function marked the wrong capability
> in flags (64B CQE/EQE), when CQE/EQE stride feature was enabled.
> Also added small fix in initial CQE ownership bit assignment, when CQE
> is size is not default 32B.
>
> Fixes: 77507aa24 (net/mlx4: Enable CQE/EQE stride support)
> Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
> Signed-off-by: Ido Shamay <idos@mellanox.com>
> Signed-off-by: Amir Vadai <amirv@mellanox.com>
> ---
> Dave Hi,
>
> Please pull this patch also to stable (at least 3.17)
>
> Thanks,
> Amir
Small correction: Should pull into -stable >= 3.18
Amir
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH net] net/mlx4: Cache line CQE/EQE stride fixes
2014-12-16 12:29 ` Amir Vadai
@ 2014-12-16 20:24 ` David Miller
0 siblings, 0 replies; 3+ messages in thread
From: David Miller @ 2014-12-16 20:24 UTC (permalink / raw)
To: amirv; +Cc: netdev, yevgenyp, ogerlitz, clsoto, idos, weiyang
From: Amir Vadai <amirv@mellanox.com>
Date: Tue, 16 Dec 2014 14:29:11 +0200
> On 12/16/2014 1:28 PM, Amir Vadai wrote:
>> From: Ido Shamay <idos@mellanox.com>
>>
>> This commit contains 2 fixes for the 128B CQE/EQE stride feaure.
>> Wei found that mlx4_QUERY_HCA function marked the wrong capability
>> in flags (64B CQE/EQE), when CQE/EQE stride feature was enabled.
>> Also added small fix in initial CQE ownership bit assignment, when CQE
>> is size is not default 32B.
>>
>> Fixes: 77507aa24 (net/mlx4: Enable CQE/EQE stride support)
>> Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
>> Signed-off-by: Ido Shamay <idos@mellanox.com>
>> Signed-off-by: Amir Vadai <amirv@mellanox.com>
>> ---
>> Dave Hi,
>>
>> Please pull this patch also to stable (at least 3.17)
>>
>> Thanks,
>> Amir
>
> Small correction: Should pull into -stable >= 3.18
Applied and queued up for -stable, thanks.
^ permalink raw reply [flat|nested] 3+ messages in thread
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