From: Michal Simek <monstr@monstr.eu>
To: Arun Chandran <achandran@mvista.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>,
netdev <netdev@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] net: macb: Add big endian CPU support
Date: Wed, 25 Feb 2015 12:50:41 +0100 [thread overview]
Message-ID: <54EDB711.1090608@monstr.eu> (raw)
In-Reply-To: <CAFdej00df2gcUXVTnR34M6E+Mr7ctgjHgMisEpJUsZK6kf_CpA@mail.gmail.com>
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>> endian mode all the time. But the logic for detecting this on CPU is correct and this is what
>> you need to do on Zynq. You are writing big endian value to little endian register and read it back
>> to see if it was correctly written or not.
>
> Just curious; will the same code work without change on a CPU with Big
> endian IP?
> (ie. If zynq hardware comes with only one change; IP configured in BE;
> will the driver be needing further changes?)
Depends on HW setup and architecture which you want to use.
Let's say test could be to have Microblaze in PL in BE mode (not supported by tools)
and bridge to axi. Then depends on Linux kernel how IO functions are implemented.
That's why it is hard to say yes/no.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
[-- Attachment #2: OpenPGP digital signature --]
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next prev parent reply other threads:[~2015-02-25 11:50 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-18 11:29 [PATCH] net: macb: Add big endian CPU support Arun Chandran
2015-02-19 12:16 ` Nicolas Ferre
2015-02-19 12:22 ` Michal Simek
2015-02-20 11:45 ` Arun Chandran
2015-02-23 14:10 ` Michal Simek
2015-02-24 7:39 ` Arun Chandran
2015-02-24 12:57 ` Nicolas Ferre
2015-02-24 17:57 ` Arun Chandran
2015-02-25 10:02 ` Michal Simek
2015-02-25 10:56 ` Arun Chandran
2015-02-25 11:50 ` Michal Simek [this message]
2015-02-26 10:44 ` Arun Chandran
2015-02-26 10:47 ` Michal Simek
2015-02-26 11:01 ` [PATCH v3] " Arun Chandran
2015-02-26 11:06 ` Nicolas Ferre
2015-02-26 11:49 ` Michal Simek
2015-02-27 22:24 ` David Miller
2015-02-28 10:43 ` Arun Chandran
[not found] ` <CAFdej03s4-ogLuyi+OK3p897VU6wPUjGDgekBrE3auCvFmjCXw@mail.gmail.com>
2015-02-28 18:02 ` David Miller
2015-03-01 6:08 ` [PATCH 1/2] net: macb: Add on the fly CPU endianness detection Arun Chandran
2015-03-01 6:08 ` [PATCH 2/2] net: macb: Properly add DMACFG bit definitions Arun Chandran
2015-03-02 4:05 ` David Miller
2015-03-02 4:05 ` [PATCH 1/2] net: macb: Add on the fly CPU endianness detection David Miller
2015-02-23 14:38 ` [PATCH] net: macb: Add big endian CPU support Nicolas Ferre
2015-02-24 7:27 ` Arun Chandran
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