From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: Ben Hutchings <ben.hutchings@codethink.co.uk>, netdev@vger.kernel.org
Cc: linux-kernel@lists.codethink.co.uk,
Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>,
Mitsuhiro Kimura <mitsuhiro.kimura.kc@renesas.com>,
Yoshihiro Kaneko <ykaneko0929@gmail.com>,
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,
Alexander Duyck <alexander.h.duyck@intel.com>
Subject: Re: [PATCH net 1/4] sh_eth: Ensure proper ordering of descriptor active bit write/read
Date: Fri, 10 Apr 2015 01:21:14 +0300 [thread overview]
Message-ID: <5526FB5A.8090005@cogentembedded.com> (raw)
In-Reply-To: <1425343920.4288.9.camel@xylophone.i.decadent.org.uk>
Hello.
On 03/03/2015 03:52 AM, Ben Hutchings wrote:
> When submitting a DMA descriptor, the active bit must be written last.
> When reading a completed DMA descriptor, the active bit must be read
> first.
> Add memory barriers to ensure that this ordering is maintained.
Looks like those should have been lighter dma_rmb() and dma_wmb() instead.
Correct, Alexander?
> Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk>
> ---
> drivers/net/ethernet/renesas/sh_eth.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
> index 654b48d1e61a..5c212a833bcf 100644
> --- a/drivers/net/ethernet/renesas/sh_eth.c
> +++ b/drivers/net/ethernet/renesas/sh_eth.c
> @@ -1410,6 +1410,8 @@ static int sh_eth_txfree(struct net_device *ndev)
> txdesc = &mdp->tx_ring[entry];
> if (txdesc->status & cpu_to_edmac(mdp, TD_TACT))
> break;
> + /* TACT bit must be checked before all the following reads */
> + rmb();
> /* Free the original skb. */
> if (mdp->tx_skbuff[entry]) {
> dma_unmap_single(&ndev->dev, txdesc->addr,
> @@ -1447,6 +1449,8 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
> limit = boguscnt;
> rxdesc = &mdp->rx_ring[entry];
> while (!(rxdesc->status & cpu_to_edmac(mdp, RD_RACT))) {
> + /* RACT bit must be checked before all the following reads */
> + rmb();
> desc_status = edmac_to_cpu(mdp, rxdesc->status);
> pkt_len = rxdesc->frame_length;
>
> @@ -1526,6 +1530,7 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
> skb_checksum_none_assert(skb);
> rxdesc->addr = dma_addr;
> }
> + wmb(); /* RACT bit must be set after all the above writes */
> if (entry >= mdp->num_rx_ring - 1)
> rxdesc->status |=
> cpu_to_edmac(mdp, RD_RACT | RD_RFP | RD_RDEL);
> @@ -2195,6 +2200,7 @@ static int sh_eth_start_xmit(struct sk_buff *skb, struct net_device *ndev)
> }
> txdesc->buffer_length = skb->len;
>
> + wmb(); /* TACT bit must be set after all the above writes */
> if (entry >= mdp->num_tx_ring - 1)
> txdesc->status |= cpu_to_edmac(mdp, TD_TACT | TD_TDLE);
> else
WBR, Sergei
next prev parent reply other threads:[~2015-04-09 22:21 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-03 0:51 [PATCH net 0/4] Fixes for sh_eth #4 v2 Ben Hutchings
2015-03-03 0:52 ` [PATCH net 1/4] sh_eth: Ensure proper ordering of descriptor active bit write/read Ben Hutchings
2015-04-09 22:21 ` Sergei Shtylyov [this message]
2015-04-13 22:32 ` Ben Hutchings
2015-03-03 0:52 ` [PATCH net 2/4] sh_eth: Fix RX recovery on R-Car in case of RX ring underrun Ben Hutchings
2015-03-03 0:52 ` [PATCH net 3/4] Revert "sh_eth: Enable Rx descriptor word 0 shift for r8a7790" Ben Hutchings
2015-03-03 0:53 ` [PATCH net 4/4] sh_eth: Really fix padding of short frames on TX Ben Hutchings
2015-03-03 2:31 ` [PATCH net 0/4] Fixes for sh_eth #4 v2 David Miller
-- strict thread matches above, loose matches on Subject: below --
2015-02-26 14:12 [PATCH net 0/4] Fixes for sh_eth #4 Ben Hutchings
2015-02-26 14:13 ` [PATCH net 1/4] sh_eth: Ensure proper ordering of descriptor active bit write/read Ben Hutchings
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