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From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: Phil Reid <preid@electromag.com.au>,
	robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com,
	ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
	peppe.cavallaro@st.com, davem@davemloft.net,
	devicetree@vger.kernel.org, netdev@vger.kernel.org
Subject: Re: [PATCH v2 5/5] stmmac: socfpga: Provide dt node to config ptp clk source.
Date: Mon, 7 Dec 2015 14:59:57 +0300	[thread overview]
Message-ID: <566574BD.9010204@cogentembedded.com> (raw)
In-Reply-To: <1449452324-53858-7-git-send-email-preid@electromag.com.au>

On 12/07/2015 04:38 AM, Phil Reid wrote:

> Signed-off-by: Phil Reid <preid@electromag.com.au>
> ---
>   Documentation/devicetree/bindings/net/socfpga-dwmac.txt | 2 ++
>   drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c     | 9 +++++++++
>   2 files changed, 11 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/net/socfpga-dwmac.txt b/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
> index 3a9d679..72d82d6 100644
> --- a/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
> +++ b/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
> @@ -11,6 +11,8 @@ Required properties:
>   		  designware version numbers documented in stmmac.txt
>    - altr,sysmgr-syscon : Should be the phandle to the system manager node that
>      encompasses the glue register, the register offset, and the register shift.
> + - altr,f2h_ptp_ref_clk use f2h_ptp_ref_clk instead of default eosc1 clock
> +   for ptp ref clk. This affects all emacs as the clock is common.
>
>   Optional properties:
>   altr,emac-splitter: Should be the phandle to the emac splitter soft IP node if
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
> index 401383b..3c5bc12 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
[...]
> @@ -171,6 +175,11 @@ static int socfpga_dwmac_setup(struct socfpga_dwmac *dwmac)
>   	ctrl &= ~(SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << reg_shift);
>   	ctrl |= val << reg_shift;
>
> +	if(dwmac->f2h_ptp_ref_clk)

    Please run your patches thru scripts/checkpatch.pl (space needed after *if*).

[...]

MBR, Sergei

  parent reply	other threads:[~2015-12-07 12:00 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-07  1:38 [PATCH v2 0/5] stmmac: Fixed Phy & PTP fixes Phil Reid
2015-12-07  1:38 ` [PATCH v2 1/5] stmmac: create of compatible mdio bus for stmacc driver Phil Reid
2015-12-07  1:38 ` [PATCH 1/1] stmmac: socfpga: Provide dt node to config ptp clk source Phil Reid
2015-12-07  4:04   ` David Miller
     [not found]   ` <1449452324-53858-3-git-send-email-preid-qgqNFa1JUf/o2iN0hyhwsIdd74u8MsAO@public.gmane.org>
2015-12-07 11:57     ` Sergei Shtylyov
2015-12-07  1:38 ` [PATCH v2 2/5] stmmac: Correct documentation on stmmac clocks Phil Reid
2015-12-07  1:38 ` [PATCH v2 3/5] stmmac: Fix calculations for ptp counters when clock input = 50Mhz Phil Reid
2015-12-07  1:38 ` [PATCH v2 4/5] stmmac: Add ptp debugfs entry Phil Reid
     [not found]   ` <1449452324-53858-6-git-send-email-preid-qgqNFa1JUf/o2iN0hyhwsIdd74u8MsAO@public.gmane.org>
2015-12-07  9:03     ` Arnd Bergmann
2015-12-07 13:37       ` Phil Reid
     [not found]         ` <56658BB0.10700-qgqNFa1JUf/o2iN0hyhwsIdd74u8MsAO@public.gmane.org>
2015-12-07 14:37           ` Arnd Bergmann
     [not found] ` <1449452324-53858-1-git-send-email-preid-qgqNFa1JUf/o2iN0hyhwsIdd74u8MsAO@public.gmane.org>
2015-12-07  1:38   ` [PATCH v2 5/5] stmmac: socfpga: Provide dt node to config ptp clk source Phil Reid
2015-12-07  9:05     ` Arnd Bergmann
2015-12-07 13:34       ` Phil Reid
2015-12-07 14:37         ` Arnd Bergmann
2015-12-07 11:59     ` Sergei Shtylyov [this message]
2015-12-07 13:31       ` Phil Reid

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