[PATCH 0/2] Add CAN support to r8a7795 SoC

[PATCH 0/2] Add CAN support to r8a7795 SoC

[Ramesh Shanmugasundaram]

This patch set adds CAN support to r8a7795 SoC.

This is based on linux-next (tag: next-20160225).

Pinctrl & Clock related to the controller are already submitted as below:

https://lkml.org/lkml/2016/2/25/546
https://lkml.org/lkml/2016/2/26/452
http://www.spinics.net/lists/arm-kernel/msg487238.html

The compatibility string used follows the same format as in this patch:
http://www.spinics.net/lists/netdev/msg365756.html

Ramesh Shanmugasundaram (2):
  can: rcar_can: Add r8a7795 support
  arm64: dts: r8a7795: Add CAN support

 .../devicetree/bindings/net/can/rcar_can.txt       | 12 +++++++++
 arch/arm64/boot/dts/renesas/r8a7795.dtsi           | 30 ++++++++++++++++++++++
 drivers/net/can/Kconfig                            |  2 +-
 drivers/net/can/rcar_can.c                         |  7 ++++-
 4 files changed, 49 insertions(+), 2 deletions(-)

-- 
1.9.1

[PATCH 1/2] can: rcar_can: Add r8a7795 support

[Ramesh Shanmugasundaram]

Added r8a7795 SoC support.

For smoother bit timing calculation, the rounded clock frequency is used.

Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram-kTT6dE0pTRh9uiUsa/gSgQ@public.gmane.org>
---
 Documentation/devicetree/bindings/net/can/rcar_can.txt | 12 ++++++++++++
 drivers/net/can/Kconfig                                |  2 +-
 drivers/net/can/rcar_can.c                             |  7 ++++++-
 3 files changed, 19 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/can/rcar_can.txt b/Documentation/devicetree/bindings/net/can/rcar_can.txt
index 002d844..7f1305f 100644
--- a/Documentation/devicetree/bindings/net/can/rcar_can.txt
+++ b/Documentation/devicetree/bindings/net/can/rcar_can.txt
@@ -6,6 +6,9 @@ Required properties:
 	      "renesas,can-r8a7779" if CAN controller is a part of R8A7779 SoC.
 	      "renesas,can-r8a7790" if CAN controller is a part of R8A7790 SoC.
 	      "renesas,can-r8a7791" if CAN controller is a part of R8A7791 SoC.
+	      "renesas,can-r8a7795" if CAN controller is a part of R8A7795 SoC.
+	      "renesas,rcar-gen3-can" for a generic R-Car Gen3 compatible device.
+
 - reg: physical base address and size of the R-Car CAN register map.
 - interrupts: interrupt specifier for the sole interrupt.
 - clocks: phandles and clock specifiers for 3 CAN clock inputs.
@@ -13,6 +16,15 @@ Required properties:
 - pinctrl-0: pin control group to be used for this controller.
 - pinctrl-names: must be "default".
 
+Required properties for "renesas,can-r8a7795" compatible:
+In R8A7795 SoC, "clkp2" can be CANFD clock. This is a div6 clock and can be
+used by both CAN and CAN FD controller at the same time. It needs to be scaled
+to maximum frequency if any of these controllers use it. This is done using
+the below properties.
+
+- assigned-clocks: phandle of clkp2(CANFD) clock.
+- assigned-clock-rates: maximum frequency of this clock.
+
 Optional properties:
 - renesas,can-clock-select: R-Car CAN Clock Source Select. Valid values are:
 			    <0x0> (default) : Peripheral clock (clkp1)
diff --git a/drivers/net/can/Kconfig b/drivers/net/can/Kconfig
index 164ccde..0d40aef 100644
--- a/drivers/net/can/Kconfig
+++ b/drivers/net/can/Kconfig
@@ -106,7 +106,7 @@ config CAN_JANZ_ICAN3
 
 config CAN_RCAR
 	tristate "Renesas R-Car CAN controller"
-	depends on ARM
+	depends on ARCH_RENESAS || ARM
 	---help---
 	  Say Y here if you want to use CAN controller found on Renesas R-Car
 	  SoCs.
diff --git a/drivers/net/can/rcar_can.c b/drivers/net/can/rcar_can.c
index bc46be3..55e34de 100644
--- a/drivers/net/can/rcar_can.c
+++ b/drivers/net/can/rcar_can.c
@@ -808,6 +808,10 @@ static int rcar_can_probe(struct platform_device *pdev)
 	priv->regs = addr;
 	priv->clock_select = clock_select;
 	priv->can.clock.freq = clk_get_rate(priv->can_clk);
+
+	/* Use the rounded clock value (nearest kHz) */
+	priv->can.clock.freq = 1000 * DIV_ROUND_UP(priv->can.clock.freq, 1000);
+
 	priv->can.bittiming_const = &rcar_can_bittiming_const;
 	priv->can.do_set_mode = rcar_can_do_set_mode;
 	priv->can.do_get_berr_counter = rcar_can_get_berr_counter;
@@ -904,7 +908,8 @@ static const struct of_device_id rcar_can_of_table[] __maybe_unused = {
 	{ .compatible = "renesas,can-r8a7779" },
 	{ .compatible = "renesas,can-r8a7790" },
 	{ .compatible = "renesas,can-r8a7791" },
-	{ }
+	{ .compatible = "renesas,rcar-gen3-can" },
+	{ },
 };
 MODULE_DEVICE_TABLE(of, rcar_can_of_table);
 
-- 
1.9.1

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[PATCH 2/2] arm64: dts: r8a7795: Add CAN support

[Ramesh Shanmugasundaram]

Adds CAN controller nodes for r8a7795.

Note: CAN channel register base address mentioned in R-Car Gen3 Hardware
User Manual v0.5E is incorrect. The corrected base addresses are:

CAN Channel 0 - 0xe6c30000
CAN Channel 1 - 0xe6c38000

Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 4049182..a88f8d8 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -523,6 +523,36 @@
 			#size-cells = <0>;
 		};
 
+		can0: can@e6c30000 {
+			compatible = "renesas,can-r8a7795",
+				     "renesas,rcar-gen3-can";
+			reg = <0 0xe6c30000 0 0x1000>;
+			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 916>,
+			       <&cpg CPG_CORE R8A7795_CLK_CANFD>,
+			       <&can_clk>;
+			clock-names = "clkp1", "clkp2", "can_clk";
+			assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
+			assigned-clock-rates = <40000000>;
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
+
+		can1: can@e6c38000 {
+			compatible = "renesas,can-r8a7795",
+				     "renesas,rcar-gen3-can";
+			reg = <0 0xe6c38000 0 0x1000>;
+			interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 915>,
+			       <&cpg CPG_CORE R8A7795_CLK_CANFD>,
+			       <&can_clk>;
+			clock-names = "clkp1", "clkp2", "can_clk";
+			assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
+			assigned-clock-rates = <40000000>;
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
+
 		hscif0: serial@e6540000 {
 			compatible = "renesas,hscif-r8a7795",
 				     "renesas,rcar-gen3-hscif",
-- 
1.9.1

Re: [PATCH 0/2] Add CAN support to r8a7795 SoC

[Marc Kleine-Budde]

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On 02/29/2016 10:20 AM, Ramesh Shanmugasundaram wrote:
> This patch set adds CAN support to r8a7795 SoC.
> 
> This is based on linux-next (tag: next-20160225).

Please rebase to tags/linux-can-next-for-4.6-20160226 of
git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next.git

> Pinctrl & Clock related to the controller are already submitted as below:
> 
> https://lkml.org/lkml/2016/2/25/546
> https://lkml.org/lkml/2016/2/26/452
> http://www.spinics.net/lists/arm-kernel/msg487238.html
> 
> The compatibility string used follows the same format as in this patch:
> http://www.spinics.net/lists/netdev/msg365756.html
> 
> Ramesh Shanmugasundaram (2):
>   can: rcar_can: Add r8a7795 support
>   arm64: dts: r8a7795: Add CAN support
> 
>  .../devicetree/bindings/net/can/rcar_can.txt       | 12 +++++++++
>  arch/arm64/boot/dts/renesas/r8a7795.dtsi           | 30 ++++++++++++++++++++++
>  drivers/net/can/Kconfig                            |  2 +-
>  drivers/net/can/rcar_can.c                         |  7 ++++-
>  4 files changed, 49 insertions(+), 2 deletions(-)
> 

Marc

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Re: [PATCH 1/2] can: rcar_can: Add r8a7795 support

[Marc Kleine-Budde]

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On 02/29/2016 10:21 AM, Ramesh Shanmugasundaram wrote:
> Added r8a7795 SoC support.
> 
> For smoother bit timing calculation, the rounded clock frequency is used.

Why this? From my point of view this introduces a clock error.

Marc

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Re: [PATCH 1/2] can: rcar_can: Add r8a7795 support

[Geert Uytterhoeven]

Hi Ramesh,

On Mon, Feb 29, 2016 at 10:21 AM, Ramesh Shanmugasundaram
<ramesh.shanmugasundaram@bp.renesas.com> wrote:
> --- a/drivers/net/can/rcar_can.c
> +++ b/drivers/net/can/rcar_can.c
> @@ -808,6 +808,10 @@ static int rcar_can_probe(struct platform_device *pdev)
>         priv->regs = addr;
>         priv->clock_select = clock_select;
>         priv->can.clock.freq = clk_get_rate(priv->can_clk);
> +
> +       /* Use the rounded clock value (nearest kHz) */
> +       priv->can.clock.freq = 1000 * DIV_ROUND_UP(priv->can.clock.freq, 1000);

The comment and the implementation don't match.
To get the nearest kHz, you have to useDIV_ROUND_CLOSEST().

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

RE: [PATCH 1/2] can: rcar_can: Add r8a7795 support

[Ramesh Shanmugasundaram]

Hi Marc,

> On 02/29/2016 10:21 AM, Ramesh Shanmugasundaram wrote:
> > Added r8a7795 SoC support.
> >
> > For smoother bit timing calculation, the rounded clock frequency is
> used.
> 
> Why this? From my point of view this introduces a clock error.

Thanks for the comments. 

Without the rounded clock, can_calc_bittiming returns different BRP values and reports high sampling error percentage. However, the rounded clock shows no such issues and it works fine for all bitrates.

Below is an e.g. from my board for an input clock differs by 2Hz.

root@salvator-x:~# can-calc-bit-timing -c 39999998 rcar_can  
Bit timing parameters for rcar_can with 39.999998 MHz ref clock
nominal                                 real Bitrt   nom  real SampP
Bitrate TQ[ns] PrS PhS1 PhS2 SJW BRP Bitrate Error SampP SampP Error      CiBCR
1000000    125   2    3    2   1   5  999999  0.0% 75.0% 75.0%  0.0% 0x40040100
 800000    125   3    4    2   1   5  799999  0.0% 80.0% 80.0%  0.0% 0x60040100
 500000    250   2    3    2   1  10  499999  0.0% 87.5% 75.0% 14.3% 0x40090100
 250000    500   2    3    2   1  20  249999  0.0% 87.5% 75.0% 14.3% 0x40130100
 125000   1000   2    3    2   1  40  124999  0.0% 87.5% 75.0% 14.3% 0x40270100
 100000   1250   2    3    2   1  50   99999  0.0% 87.5% 75.0% 14.3% 0x40310100
  50000   2500   2    3    2   1 100   49999  0.0% 87.5% 75.0% 14.3% 0x40630100
  20000   6250   2    3    2   1 250   19999  0.0% 87.5% 75.0% 14.3% 0x40f90100
  10000  12500   2    3    2   1 500    9999  0.0% 87.5% 75.0% 14.3% 0x41f30100

root@salvator-x:~# can-calc-bit-timing -c 40000000 rcar_can
Bit timing parameters for rcar_can with 40.000000 MHz ref clock
nominal                                 real Bitrt   nom  real SampP
Bitrate TQ[ns] PrS PhS1 PhS2 SJW BRP Bitrate Error SampP SampP Error      CiBCR
1000000     50   7    7    5   1   2 1000000  0.0% 75.0% 75.0%  0.0% 0xd0010400
 800000    125   3    4    2   1   5  800000  0.0% 80.0% 80.0%  0.0% 0x60040100
 500000    125   6    7    2   1   5  500000  0.0% 87.5% 87.5%  0.0% 0xc0040100
 250000    250   6    7    2   1  10  250000  0.0% 87.5% 87.5%  0.0% 0xc0090100
 125000    500   6    7    2   1  20  125000  0.0% 87.5% 87.5%  0.0% 0xc0130100
 100000    625   6    7    2   1  25  100000  0.0% 87.5% 87.5%  0.0% 0xc0180100
  50000   1250   6    7    2   1  50   50000  0.0% 87.5% 87.5%  0.0% 0xc0310100
  20000   3125   6    7    2   1 125   20000  0.0% 87.5% 87.5%  0.0% 0xc07c0100
  10000   6250   6    7    2   1 250   10000  0.0% 87.5% 87.5%  0.0% 0xc0f90100

Thanks,
Ramesh

Re: [PATCH 1/2] can: rcar_can: Add r8a7795 support

[Marc Kleine-Budde]

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On 02/29/2016 10:56 AM, Ramesh Shanmugasundaram wrote:
>> On 02/29/2016 10:21 AM, Ramesh Shanmugasundaram wrote:
>>> Added r8a7795 SoC support.
>>>
>>> For smoother bit timing calculation, the rounded clock frequency is
>> used.
>>
>> Why this? From my point of view this introduces a clock error.
> 
> Thanks for the comments. 
> 
> Without the rounded clock, can_calc_bittiming returns different BRP
> values and reports high sampling error percentage. However, the
> rounded clock shows no such issues and it works fine for all
> bitrates.
> 
> Below is an e.g. from my board for an input clock differs by 2Hz.

I think it's better to fix the algorithm. I'll look into it.

Marc

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Re: [PATCH 1/2] can: rcar_can: Add r8a7795 support

[Marc Kleine-Budde]

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On 02/29/2016 10:56 AM, Ramesh Shanmugasundaram wrote:
> root@salvator-x:~# can-calc-bit-timing -c 39999998 rcar_can  

Can you send me the patches to support the rcar_can. On the linux-can ML
or github pull request.

Thanks,
Marc

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RE: [PATCH 1/2] can: rcar_can: Add r8a7795 support

[Ramesh Shanmugasundaram]

Hi Geert,

> On Mon, Feb 29, 2016 at 10:21 AM, Ramesh Shanmugasundaram
> <ramesh.shanmugasundaram@bp.renesas.com> wrote:
> > --- a/drivers/net/can/rcar_can.c
> > +++ b/drivers/net/can/rcar_can.c
> > @@ -808,6 +808,10 @@ static int rcar_can_probe(struct platform_device
> *pdev)
> >         priv->regs = addr;
> >         priv->clock_select = clock_select;
> >         priv->can.clock.freq = clk_get_rate(priv->can_clk);
> > +
> > +       /* Use the rounded clock value (nearest kHz) */
> > +       priv->can.clock.freq = 1000 *
> > + DIV_ROUND_UP(priv->can.clock.freq, 1000);
> 
> The comment and the implementation don't match.
> To get the nearest kHz, you have to useDIV_ROUND_CLOSEST().

Thanks Geert. Yes, DIV_ROUND_CLOSEST() would be apt as you pointed out.
I'll be removing this hack when I rebase, as Marc is fixing the algorithm.

Thanks,
Ramesh

Re: [PATCH 1/2] can: rcar_can: Add r8a7795 support

[Marc Kleine-Budde]

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On 02/29/2016 11:00 AM, Marc Kleine-Budde wrote:
> I think it's better to fix the algorithm. I'll look into it.

What about:

> ./can-calc-bit-timing -c 39999998 rcar_can                                                         
> Bit timing parameters for rcar_can with 39.999998 MHz ref clock
> nominal                                 real Bitrt   nom  real SampP
> Bitrate TQ[ns] PrS PhS1 PhS2 SJW BRP Bitrate Error SampP SampP Error      CiBCR
> 1000000    125   2    3    2   1   5  999999  0.0% 75.0% 75.0%  0.0% 0x40040100
>  800000    125   3    4    2   1   5  799999  0.0% 80.0% 80.0%  0.0% 0x60040100
>  500000    125   6    7    2   1   5  499999  0.0% 87.5% 87.5%  0.0% 0xc0040100
>  250000    250   6    7    2   1  10  249999  0.0% 87.5% 87.5%  0.0% 0xc0090100
>  125000    500   6    7    2   1  20  124999  0.0% 87.5% 87.5%  0.0% 0xc0130100
>  100000    625   6    7    2   1  25   99999  0.0% 87.5% 87.5%  0.0% 0xc0180100
>   50000   1250   6    7    2   1  50   49999  0.0% 87.5% 87.5%  0.0% 0xc0310100
>   20000   3125   6    7    2   1 125   19999  0.0% 87.5% 87.5%  0.0% 0xc07c0100
>   10000   6250   6    7    2   1 250    9999  0.0% 87.5% 87.5%  0.0% 0xc0f90100

But I've to port the algorithm from can-calc-bit-timing to the kernel.

Marc

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RE: [PATCH 1/2] can: rcar_can: Add r8a7795 support

[Ramesh Shanmugasundaram]

Hi Marc,

> On 02/29/2016 11:00 AM, Marc Kleine-Budde wrote:
> > I think it's better to fix the algorithm. I'll look into it.
> 
> What about:
> 
> > ./can-calc-bit-timing -c 39999998 rcar_can
> > Bit timing parameters for rcar_can with 39.999998 MHz ref clock
> > nominal                                 real Bitrt   nom  real SampP
> > Bitrate TQ[ns] PrS PhS1 PhS2 SJW BRP Bitrate Error SampP SampP Error
> CiBCR
> > 1000000    125   2    3    2   1   5  999999  0.0% 75.0% 75.0%  0.0%
> 0x40040100
> >  800000    125   3    4    2   1   5  799999  0.0% 80.0% 80.0%  0.0%
> 0x60040100
> >  500000    125   6    7    2   1   5  499999  0.0% 87.5% 87.5%  0.0%
> 0xc0040100
> >  250000    250   6    7    2   1  10  249999  0.0% 87.5% 87.5%  0.0%
> 0xc0090100
> >  125000    500   6    7    2   1  20  124999  0.0% 87.5% 87.5%  0.0%
> 0xc0130100
> >  100000    625   6    7    2   1  25   99999  0.0% 87.5% 87.5%  0.0%
> 0xc0180100
> >   50000   1250   6    7    2   1  50   49999  0.0% 87.5% 87.5%  0.0%
> 0xc0310100
> >   20000   3125   6    7    2   1 125   19999  0.0% 87.5% 87.5%  0.0%
> 0xc07c0100
> >   10000   6250   6    7    2   1 250    9999  0.0% 87.5% 87.5%  0.0%
> 0xc0f90100
> 

I think, it should be correct. Can I have the patch please(can-utils or kernel)? I'll give it a go.

Manual e.g. shows, for 1Mbps and 40MHz clock, two settings are possible
10Tq -> BRP 4
20Tq -> BRP 2

Condition is TSEG1 > TSEG2 >= SJW & bitrate = clock freq/(brp * number of Tq)

Your e.g. satisfies the condition and hopefully it should be OK.

Thanks,
Ramesh

Re: [PATCH 2/2] arm64: dts: r8a7795: Add CAN support

[Simon Horman]

On Mon, Feb 29, 2016 at 09:21:01AM +0000, Ramesh Shanmugasundaram wrote:
> Adds CAN controller nodes for r8a7795.
> 
> Note: CAN channel register base address mentioned in R-Car Gen3 Hardware
> User Manual v0.5E is incorrect. The corrected base addresses are:
> 
> CAN Channel 0 - 0xe6c30000
> CAN Channel 1 - 0xe6c38000
> 
> Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>

I have deferred this patch pending acceptance of the bindings
(basically patch 1/2). Please repost this patch or ping me once
that has happened.