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From: oulijun <oulijun-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
To: <leon-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Cc: <dledford-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>,
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Subject: Re: [PATCH v5 09/21] IB/hns: Add hca support
Date: Wed, 27 Apr 2016 11:37:01 +0800	[thread overview]
Message-ID: <572033DD.9050501@huawei.com> (raw)
In-Reply-To: <20160426141821.GJ7974-2ukJVAZIZ/Y@public.gmane.org>

On 2016/4/26 22:18, Leon Romanovsky wrote:
> On Tue, Apr 26, 2016 at 02:34:44PM +0800, oulijun wrote:
>> On 2016/4/24 15:54, Leon Romanovsky wrote:
>>> On Sat, Apr 23, 2016 at 06:26:47PM +0800, Lijun Ou wrote:
>>>> This patch mainly setup hca for RoCE. it will do a series of
>>>> initial works as follows:
>>>>       1. init uar table, allocate uar resource
>>>>       2. init pd table
>>>>       3. init cq table
>>>>       4. init mr table
>>>>       5. init qp table
>>>>
>>>> Signed-off-by: Lijun Ou <oulijun-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
>>>> Signed-off-by: Wei Hu(Xavier) <xavier.huwei-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
>>>> ---
>>>>  drivers/infiniband/hw/hns/hns_roce_alloc.c  | 104 ++++++++++++++++
>>>>  drivers/infiniband/hw/hns/hns_roce_cq.c     |  25 ++++
>>>>  drivers/infiniband/hw/hns/hns_roce_device.h |  69 ++++++++++
>>>>  drivers/infiniband/hw/hns/hns_roce_eq.c     |   1 -
>>>>  drivers/infiniband/hw/hns/hns_roce_icm.c    |  88 +++++++++++++
>>>>  drivers/infiniband/hw/hns/hns_roce_icm.h    |   9 ++
>>>>  drivers/infiniband/hw/hns/hns_roce_main.c   |  79 ++++++++++++
>>>>  drivers/infiniband/hw/hns/hns_roce_mr.c     | 187 ++++++++++++++++++++++++++++
>>>>  drivers/infiniband/hw/hns/hns_roce_pd.c     |  65 ++++++++++
>>>>  drivers/infiniband/hw/hns/hns_roce_qp.c     |  30 +++++
>>>>  10 files changed, 656 insertions(+), 1 deletion(-)
>>>>  create mode 100644 drivers/infiniband/hw/hns/hns_roce_alloc.c
>>>>  create mode 100644 drivers/infiniband/hw/hns/hns_roce_mr.c
>>>>  create mode 100644 drivers/infiniband/hw/hns/hns_roce_pd.c
>>>>
>>>> diff --git a/drivers/infiniband/hw/hns/hns_roce_alloc.c b/drivers/infiniband/hw/hns/hns_roce_alloc.c
>>>> new file mode 100644
>>>> index 0000000..0c76f1b
>>>> --- /dev/null
>>>> +++ b/drivers/infiniband/hw/hns/hns_roce_alloc.c
>>>> @@ -0,0 +1,104 @@
>>>> +/*
>>>> + * Copyright (c) 2016 Hisilicon Limited.
>>>> + *
>>>> + * This program is free software; you can redistribute it and/or modify
>>>> + * it under the terms of the GNU General Public License as published by
>>>> + * the Free Software Foundation; either version 2 of the License, or
>>>> + * (at your option) any later version.
>>>> + */
>>>> +
>>>> +#include <linux/bitmap.h>
>>>> +#include <linux/dma-mapping.h>
>>>> +#include <linux/errno.h>
>>>> +#include <linux/mm.h>
>>>> +#include <linux/slab.h>
>>>> +#include <linux/vmalloc.h>
>>>> +#include "hns_roce_device.h"
>>>> +
>>>> +int hns_roce_bitmap_alloc(struct hns_roce_bitmap *bitmap, u32 *obj)
>>>> +{
>>>> +	int ret = 0;
>>>> +
>>>> +	spin_lock(&bitmap->lock);
>>>> +	*obj = find_next_zero_bit(bitmap->table, bitmap->max, bitmap->last);
>>>> +	if (*obj >= bitmap->max) {
>>>> +		bitmap->top = (bitmap->top + bitmap->max + bitmap->reserved_top)
>>>> +			       & bitmap->mask;
>>>> +		*obj = find_first_zero_bit(bitmap->table, bitmap->max);
>>>
>>> find_first_zero_bit function returns "unsigned long" which may or may
>>> not be equal to u32 on some architectures.
>>>
>> Hi Leon,
>>     I appreciate your keen eye. this code is meant for ARM64bit therefore should run corretly for 64-bit AARCH64.
>> I will consider changing it as part of good partice and better portability "
>> I will give a primary plan to modified it.
>> for example:
>>     *obj = (u32)find_next_zero_bit(bitmap->table, bitmap->max, bitmap->last);
>> Beause the max size of bitmap->table is u32 in current version.
>>
>> int hns_roce_bitmap_init(struct hns_roce_bitmap *bitmap, u32 num, u32 mask,
>> 			 u32 reserved_bot, u32 reserved_top)
>> {
>> 	u32 i;
>>
>> 	if (num != roundup_pow_of_two(num))
>> 		return -EINVAL;
>>
>> 	bitmap->last = 0;
>> 	bitmap->top = 0;
>> 	bitmap->max = num - reserved_top;
>> 	bitmap->mask = mask;
>> 	bitmap->reserved_top = reserved_top;
>> 	spin_lock_init(&bitmap->lock);
>> 	bitmap->table = kcalloc(BITS_TO_LONGS(bitmap->max), sizeof(long),
>> 				GFP_KERNEL);
>>
>> Is this plan ok?
> 
> No,
> You are submitting new driver, please do it properly (without casting)
> from the beginning.
> 
oh, i see. I will give a better plan to modify it.

Thanks
Lijun Ou
>>
>> Thanks
>> Lijun Ou
>>
>> --
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  parent reply	other threads:[~2016-04-27  3:37 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-23 10:26 [PATCH v5 00/21] Add HiSilicon RoCE driver Lijun Ou
2016-04-23 10:26 ` [PATCH v5 01/21] net: hns: Add reset function support for " Lijun Ou
2016-04-23 10:26 ` [PATCH v5 02/21] devicetree: bindings: IB: Add binding document for HiSilicon RoCE Lijun Ou
2016-04-23 10:26 ` [PATCH v5 03/21] IB/hns: Add initial main frame driver and get cfg info Lijun Ou
2016-04-23 10:26 ` [PATCH v5 04/21] IB/hns: Add RoCE engine reset function Lijun Ou
     [not found] ` <1461407219-72027-1-git-send-email-oulijun-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2016-04-23 10:26   ` [PATCH v5 05/21] IB/hns: Add initial profile resource Lijun Ou
2016-04-23 10:26 ` [PATCH v5 06/21] IB/hns: Add initial cmd operation Lijun Ou
2016-04-23 10:26 ` [PATCH v5 07/21] IB/hns: Add event queue support Lijun Ou
2016-04-23 10:26 ` [PATCH v5 08/21] IB/hns: Add icm support Lijun Ou
2016-04-23 10:26 ` [PATCH v5 09/21] IB/hns: Add hca support Lijun Ou
2016-04-24  7:54   ` Leon Romanovsky
     [not found]     ` <20160424075424.GE7974-2ukJVAZIZ/Y@public.gmane.org>
2016-04-26  6:34       ` oulijun
     [not found]         ` <571F0C04.2010005-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2016-04-26 14:18           ` Leon Romanovsky
2016-04-26 14:25             ` Jiri Pirko
     [not found]               ` <20160426142517.GA1937-6KJVSR23iU488b5SBfVpbw@public.gmane.org>
2016-04-27  3:34                 ` oulijun
     [not found]                   ` <57203347.4000107-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2016-04-30  4:33                     ` Or Gerlitz
2016-05-03  7:57                       ` Wei Hu (Xavier)
2016-05-03  8:14                         ` Or Gerlitz
2016-05-03  8:39                           ` Wei Hu (Xavier)
     [not found]             ` <20160426141821.GJ7974-2ukJVAZIZ/Y@public.gmane.org>
2016-04-27  3:37               ` oulijun [this message]
2016-04-23 10:26 ` [PATCH v5 10/21] IB/hns: Add process flow to init RoCE engine Lijun Ou
2016-04-23 10:26 ` [PATCH v5 11/21] IB/hns: Add IB device registration function Lijun Ou
2016-04-23 10:26 ` [PATCH v5 12/21] IB/hns: Set mtu and gid support Lijun Ou
2016-04-23 10:26 ` [PATCH v5 13/21] IB/hns: Add interface of the protocol stack registration Lijun Ou
2016-04-23 10:26 ` [PATCH v5 14/21] IB/hns: Add operations support for IB device and port Lijun Ou
2016-04-23 10:26 ` [PATCH v5 15/21] IB/hns: Add PD operations support Lijun Ou
2016-04-23 10:26 ` [PATCH v5 16/21] IB/hns: Add ah operation support Lijun Ou
2016-04-23 10:26 ` [PATCH v5 17/21] IB/hns: Add QP operation implemention support Lijun Ou
2016-04-23 10:26 ` [PATCH v5 18/21] IB/hns: Add CQ " Lijun Ou
2016-04-23 10:26 ` [PATCH v5 19/21] IB/hns: Add memory region operation support Lijun Ou
2016-04-23 10:26 ` [PATCH v5 20/21] IB/hns: Kconfig and Makefile for RoCE module Lijun Ou
2016-04-23 10:26 ` [PATCH v5 21/21] MAINTAINERS: Add maintainers for HiSilicon RoCE driver Lijun Ou
2016-04-24  7:44 ` [PATCH v5 00/21] Add " Leon Romanovsky

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