From: Marc Zyngier <marc.zyngier@arm.com>
To: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>,
monstr@monstr.eu, ralf@linux-mips.org, tglx@linutronix.de,
jason@lakedaemon.net
Cc: soren.brinkmann@xilinx.com, linux-kernel@vger.kernel.org,
linux-mips@linux-mips.org, michal.simek@xilinx.com,
netdev@vger.kernel.org
Subject: Re: [Patch v3 03/11] irqchip: axi-intc: Add support for parent intc
Date: Thu, 1 Sep 2016 15:48:18 +0100 [thread overview]
Message-ID: <57C83FB2.607@arm.com> (raw)
In-Reply-To: <f45ffb5f-fb66-4083-4754-f8e50689216b@imgtec.com>
On 01/09/16 14:52, Zubair Lutfullah Kakakhel wrote:
> Hi,
[...]
>> But that still doesn't address the case I had in mind, which is when you
>> have *two* AXI-intc, one cascaded into the other. Is that something that
>> could be built? You should at least make sure that there is a big fat
>> warning if you don't want to support that case, because that will be
>> hell to debug.
>
> Oo. I didn't think of that one. tbh, I'm not sure if that is currently supported
> because this driver came out of arch/microblaze. And it didn't have any code that
> looked supportive of chained interrupt handling.
>
> 'Technically', it should be possible to synthesize two daisy chained axi interrupt
> controllers on an FPGA. But I don't see it being supported before.
>
> A warning would be nice. Any suggestions on the most suitable way?
Check if you've already allocated a xintc_irqc. If so, abort the probing
early...
Thanks,
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2016-09-01 14:48 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-31 16:35 [Patch v3 00/11] microblaze/MIPS: xilfpga: intc and peripheral Zubair Lutfullah Kakakhel
2016-08-31 16:35 ` [Patch v3 01/11] microblaze: irqchip: Move intc driver to irqchip Zubair Lutfullah Kakakhel
2016-08-31 16:35 ` [Patch v3 02/11] irqchip: axi-intc: Clean up irqdomain argument and read/write Zubair Lutfullah Kakakhel
2016-08-31 16:52 ` Marc Zyngier
2016-09-01 10:41 ` Zubair Lutfullah Kakakhel
2016-08-31 16:35 ` [Patch v3 03/11] irqchip: axi-intc: Add support for parent intc Zubair Lutfullah Kakakhel
2016-08-31 16:57 ` Marc Zyngier
2016-09-01 11:01 ` Zubair Lutfullah Kakakhel
2016-09-01 12:14 ` Marc Zyngier
2016-09-01 13:52 ` Zubair Lutfullah Kakakhel
2016-09-01 14:48 ` Marc Zyngier [this message]
2016-08-31 16:35 ` [Patch v3 04/11] MIPS: xilfpga: Use irqchip_init instead of the legacy way Zubair Lutfullah Kakakhel
2016-08-31 16:35 ` [Patch v3 05/11] MIPS: xilfpga: Use Xilinx AXI Interrupt Controller Zubair Lutfullah Kakakhel
2016-08-31 16:35 ` [Patch v3 06/11] MIPS: xilfpga: Update DT node and specify uart irq Zubair Lutfullah Kakakhel
2016-08-31 16:35 ` [Patch v3 07/11] MIPS: Xilfpga: Add DT node for AXI I2C Zubair Lutfullah Kakakhel
2016-09-01 10:57 ` Lars-Peter Clausen
2016-09-01 15:22 ` Zubair Lutfullah Kakakhel
2016-08-31 16:35 ` [Patch v3 08/11] net: ethernet: xilinx: Generate random mac if none found Zubair Lutfullah Kakakhel
2016-09-01 10:52 ` Sergei Shtylyov
2016-09-01 15:30 ` Zubair Lutfullah Kakakhel
2016-08-31 16:35 ` [Patch v3 09/11] net: ethernet: xilinx: Enable emaclite for MIPS Zubair Lutfullah Kakakhel
2016-09-01 10:54 ` Sergei Shtylyov
2016-08-31 16:35 ` [Patch v3 10/11] MIPS: xilfpga: Add DT node for AXI emaclite Zubair Lutfullah Kakakhel
2016-08-31 16:35 ` [Patch v3 11/11] MIPS: xilfpga: Update defconfig Zubair Lutfullah Kakakhel
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