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From: Yishai Hadas <yishaih@nvidia.com>
To: <bmerry@gmail.com>, <netdev@vger.kernel.org>
Subject: Re: Help with PCIe THP on ConnectX-7
Date: Thu, 23 Apr 2026 17:55:53 +0300	[thread overview]
Message-ID: <58a85178-c00f-4705-aa20-61e668bb9216@nvidia.com> (raw)
In-Reply-To: <aejnzWR_szvAOxkK@brucemerry.org.za>

On 22/04/2026 18:22, Bruce Merry wrote:
> Hello
> 
> I'm hoping someone from NVIDIA Networking can help with this; I wasn't
> sure of the best way to get in contact with the engineers working on
> mlx5 kernel code so thought I'd try here. I'm trying to write some
> (userspace) code using ibv_reg_mr_ex to register a memory region using
> TLP Processing Hints (THP) to improve performance on an Epyc Turin
> (Zen 5) system. However, in the kernel mlx5_st_create is bailing out
> because of this check:
> 
>         if (!MLX5_CAP_GEN(dev, mkey_pcie_tph))
>                  return NULL;
> 
> As far as I can tell, that is checking a capability bit returned by
> the firmware.

Right

> 
> Before I spend a lot more time debugging, can you tell me whether
> ConnectX-7 supports this feature at all (I'm on the latest 28.48.1000
> firmware)? I see it mentioned in release notes for ConnectX-8
> firmware, but not in ConnectX-7 release notes.
> 

It's supported only on CX8 for now.

Yishai

> If ConnectX-7 does support it, do you have any tips on what might
> cause that capability bit to be false and how to determine what the
> cause is? For example, could that happen if the motherboard BIOS
> doesn't support TPH?
> 
> Thanks
> Bruce


  reply	other threads:[~2026-04-23 14:56 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-22 15:22 Help with PCIe THP on ConnectX-7 Bruce Merry
2026-04-23 14:55 ` Yishai Hadas [this message]
2026-04-23 19:17   ` Bruce Merry

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