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Fri, 01 May 2026 03:20:31 -0700 (PDT) Received: from [192.168.2.83] ([46.175.183.46]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-44a981dee90sm4047251f8f.22.2026.05.01.03.20.30 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 01 May 2026 03:20:30 -0700 (PDT) Message-ID: <58e72b6f-3e8a-44b7-a74c-0a21f0720ed3@redhat.com> Date: Fri, 1 May 2026 12:20:28 +0200 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH iproute2-next 1/2] dpll: add ps unit to phase-related pin attributes To: Ivan Vecera , netdev@vger.kernel.org Cc: David Ahern , Stephen Hemminger References: <20260428152115.2815860-1-ivecera@redhat.com> <20260428152115.2815860-2-ivecera@redhat.com> Content-Language: en-US From: Petr Oros In-Reply-To: <20260428152115.2815860-2-ivecera@redhat.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 4/28/26 17:21, Ivan Vecera wrote: > Display phase-adjust-min, phase-adjust-max and phase-adjust values > with ps unit. Add DPLL_PR_PHASE_OFFSET macro that properly formats > phase-offset as fractional picoseconds by dividing the raw kernel > value by DPLL_PHASE_OFFSET_DIVIDER. > > Signed-off-by: Ivan Vecera > --- > dpll/dpll.c | 27 ++++++++++++++++++++++----- > 1 file changed, 22 insertions(+), 5 deletions(-) > > diff --git a/dpll/dpll.c b/dpll/dpll.c > index b6ba3283e0ba..e8056ff6a24b 100644 > --- a/dpll/dpll.c > +++ b/dpll/dpll.c > @@ -410,6 +410,21 @@ static __s64 mnl_attr_get_sint(const struct nlattr *attr) > } \ > } while (0) > > +/* Phase offset - JSON prints raw sub-ps value, FP prints fractional ps */ > +#define DPLL_PR_PHASE_OFFSET(tb, attr_id) \ > + do { \ > + if (tb[attr_id]) { \ > + __s64 val = mnl_attr_get_sint(tb[attr_id]); \ > + lldiv_t d = lldiv(llabs(val), \ > + DPLL_PHASE_OFFSET_DIVIDER); \ > + print_s64(PRINT_JSON, "phase-offset", NULL, val); \ > + print_string(PRINT_FP, NULL, " phase-offset %s", \ > + val < 0 ? "-" : ""); \ > + print_s64(PRINT_FP, NULL, "%lld.", d.quot); \ > + print_s64(PRINT_FP, NULL, "%03lld ps", d.rem); \ > + } \ > + } while (0) > + > /* Generic version with custom format */ > #define DPLL_PR_ENUM_STR_FMT(tb, attr_id, name, format_str, name_func) \ > do { \ > @@ -1507,8 +1522,7 @@ static void dpll_pin_print_parent_devices(struct nlattr *attr) > " prio %u"); > DPLL_PR_ENUM_STR_FMT(tb_parent, DPLL_A_PIN_STATE, "state", > " state %s", dpll_pin_state_name); > - DPLL_PR_SINT_FMT(tb_parent, DPLL_A_PIN_PHASE_OFFSET, > - "phase-offset", " phase-offset %" PRId64); > + DPLL_PR_PHASE_OFFSET(tb_parent, DPLL_A_PIN_PHASE_OFFSET); > > print_nl(); > close_json_object(); > @@ -1592,10 +1606,13 @@ static void dpll_pin_print_attrs(struct nlattr **tb) > > dpll_pin_print_capabilities(tb[DPLL_A_PIN_CAPABILITIES]); > > - DPLL_PR_INT(tb, DPLL_A_PIN_PHASE_ADJUST_MIN, "phase-adjust-min"); > - DPLL_PR_INT(tb, DPLL_A_PIN_PHASE_ADJUST_MAX, "phase-adjust-max"); > + DPLL_PR_INT_FMT(tb, DPLL_A_PIN_PHASE_ADJUST_MIN, "phase-adjust-min", > + " phase-adjust-min: %d ps\n"); > + DPLL_PR_INT_FMT(tb, DPLL_A_PIN_PHASE_ADJUST_MAX, "phase-adjust-max", > + " phase-adjust-max: %d ps\n"); > DPLL_PR_UINT(tb, DPLL_A_PIN_PHASE_ADJUST_GRAN, "phase-adjust-gran"); > - DPLL_PR_INT(tb, DPLL_A_PIN_PHASE_ADJUST, "phase-adjust"); > + DPLL_PR_INT_FMT(tb, DPLL_A_PIN_PHASE_ADJUST, "phase-adjust", > + " phase-adjust: %d ps\n"); > > if (json || !tb[DPLL_A_PIN_FRACTIONAL_FREQUENCY_OFFSET_PPT]) > DPLL_PR_SINT(tb, DPLL_A_PIN_FRACTIONAL_FREQUENCY_OFFSET, Reviewed-by: Petr Oros