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Mon, 2 Mar 2026 10:10:16 +0100 (CET) From: Alexander Stein To: Claudiu Manoil , Vladimir Oltean , Clark Wang , "andrew+netdev@lunn.ch" , "davem@davemloft.net" , "edumazet@google.com" , "kuba@kernel.org" , "pabeni@redhat.com" , Wei Fang Cc: Aziz Sellami , "imx@lists.linux.dev" , "netdev@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH v3 net-next 1/3] net: enetc: set the external PHY address in IERB for port MDIO usage Date: Mon, 02 Mar 2026 10:10:16 +0100 Message-ID: <5972322.DvuYhMxLoT@steina-w> Organization: TQ-Systems GmbH In-Reply-To: References: <20251119102557.1041881-1-wei.fang@nxp.com> <7825188.GXAFRqVoOG@steina-w> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="iso-8859-1" X-cloud-security-sender:alexander.stein@ew.tq-group.com X-cloud-security-recipient:netdev@vger.kernel.org X-cloud-security-crypt: load encryption module X-cloud-security-Mailarchiv: E-Mail archived for: alexander.stein@ew.tq-group.com X-cloud-security-Mailarchivtype:outbound X-cloud-security-Virusscan:CLEAN X-cloud-security-disclaimer: This E-Mail was scanned by E-Mailservice on mx-relay49-hz3.antispameurope.com with 4fPY6x0V46z3ybLB X-cloud-security-connect: he-nlb01-hz1.hornetsecurity.com[94.100.132.6], TLS=1, IP=94.100.132.6 X-cloud-security-Digest:4664428a919562c3da657dd102324f35 X-cloud-security:scantime:2.540 DKIM-Signature: a=rsa-sha256; bh=QcbWatSyM5oJiH06wT/NbGgAxv1T51q/29A9brK2e6w=; c=relaxed/relaxed; d=ew.tq-group.com; h=content-type:mime-version:subject:from:to:message-id:date; s=hse1; t=1772442630; v=1; b=EZWEg5loECgIu6axr30VcRlCLqRW80He/1vBOpdxMPwVr8FaxAavOpbj3SIYw2md8gugiLw3 Mzp2zbs0Z3GIPP7mm1N/pjVTadOTDrcNkwOqc9NcjkCyRhcS8rn6mpt9WZSBh9SAB0cZJaoSEzz fc6RjUeErFVZkJ8cLa3JXhHYaNJGVABcGJwfJ02JMiS0UNMMHD0aSvTSU9fkDKBNVA4KJlbdOj3 joJrnfOg6yObzcZw37Z7S5mD74ZrdCkP3kb0xozVaouP56KUDleGRVT/rCGddloJr9c0gw1I058 N+zbW0YVQpf1xyvyviC8iDOSmd/larHdwACuOPlmDpJJw== Hi, Am Samstag, 28. Februar 2026, 04:52:01 CET schrieb Wei Fang: > > > +static int imx95_enetc_mdio_phyaddr_config(struct platform_device > > > +*pdev) { > > > + struct netc_blk_ctrl *priv =3D platform_get_drvdata(pdev); > > > + struct device_node *np =3D pdev->dev.of_node; > > > + struct device *dev =3D &pdev->dev; > > > + int bus_devfn, addr, err; > > > + u32 phy_mask =3D 0; > > > + > > > + err =3D netc_get_emdio_phy_mask(np, &phy_mask); > > > + if (err) { > > > + dev_err(dev, "Failed to get PHY address mask\n"); > > > + return err; > > > + } > > > + > > > + /* Update the port EMDIO PHY address through parsing phy properties. > > > + * This is needed when using the port EMDIO but it's harmless when > > > + * using the central EMDIO. So apply it on all cases. > > > + */ > > > + for_each_child_of_node_scoped(np, child) { > > > + for_each_child_of_node_scoped(child, gchild) { > > > + if (!of_device_is_compatible(gchild, "pci1131,e101")) > > > + continue; > > > + > > > + bus_devfn =3D netc_of_pci_get_bus_devfn(gchild); > > > + if (bus_devfn < 0) { > > > + dev_err(dev, "Failed to get BDF number\n"); > > > + return bus_devfn; > > > + } > > > + > > > + addr =3D netc_get_phy_addr(gchild); > > > + if (addr < 0) { > > > + dev_err(dev, "Failed to get PHY address\n"); > > > + return addr; > > > + } > > > + > > > + if (phy_mask & BIT(addr)) { > >=20 > > ... which will break here if there is an Ethernet PHY using address 0 in > > 'netc_emdio' node. > > See arch/arm64/boot/dts/freescale/imx95-tqma9596sa.dtsi node > > ethernet-phy@0. >=20 > AFAIU, the PHY address 0 is a special address, below is the description of > PHYAD from IEEE 802.3 Clause 22. >=20 > A PHY that is connected to the station management entity via the > mechanical interface defined in 22.6 shall always respond to transactions > addressed to PHY Address zero <00000>. A station management entity > that is attached to multiple PHYs must have prior knowledge of the=20 > appropriate PHY Address for each PHY. >=20 > Therefore, for most PHYs, PHY address 0 is typically used as the broadcast > address or default response address. In designs that control multiple PHYs > via EMDIO, it is recommended to avoid setting a specific PHY to address 0 > to prevent bus conflicts. I know about this special meaning, but there are hardware design which do n= ot take this into account. > If the PHY on your board does not use PHY address 0 as the broadcast addr= ess > or the default response address, then we should check the PHY address fir= st and > then check the phy_mask in imx95_enetc_mdio_phyaddr_config(), just the sa= me > as imx94_enetc_mdio_phyaddr_config(). I'm not sure if this is the right fix. What about the case where phy_mask is supposed to be 0, because there are no PHY subnodes of netc_emdio. Instead the PHY with address is a subnode of the enet_portX is supposed to have netc_get_phy_addr() return 0 because that's the actual address. But with the current flow from imx94_enetc_mdio_phyaddr_config() and your suggestion for i.MX95 case we erroneously skip that node. Best regards, Alexander =2D-=20 TQ-Systems GmbH | M=FChlstra=DFe 2, Gut Delling | 82229 Seefeld, Germany Amtsgericht M=FCnchen, HRB 105018 Gesch=E4ftsf=FChrer: Detlef Schneider, R=FCdiger Stahl, Stefan Schneider http://www.tq-group.com/