From mboxrd@z Thu Jan 1 00:00:00 1970 From: Giuseppe CAVALLARO Subject: Re: Synopsys Ethernet QoS Driver Date: Fri, 25 Nov 2016 09:55:39 +0100 Message-ID: <5d59aac4-1616-5316-a624-192b390d1569@st.com> References: <1dbb6047-2bbb-4d56-2a62-ab65a0254844@synopsys.com> <20161119135654.GA14079@lnxartpec.se.axis.com> <1248f4ce-4859-10e6-fef9-342ea543f8d4@synopsys.com> <87c8a24b-0812-7850-cb3f-7be691bab432@st.com> <7c7798b5-8cd4-ba99-f526-22d3e06e05db@synopsys.com> <2eefdb8f-7e87-6009-6e50-c536d4b95dd6@synopsys.com> <7c259adb-5c73-f997-6b96-5be427157b08@synopsys.com> <899DC02E-84BB-489E-A1FE-5D8F3BB795B6@axis.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Cc: "idosch@mellanox.com" , "alexandre.torgue@st.com" , "saeedm@mellanox.com" , netdev , "linux-kernel@vger.kernel.org" , "CARLOS.PALMINHA@synopsys.com" , Rabin Vincent , mued dib , "jiri@mellanox.com" , Rayagond Kokatanur , Jeff Kirsher , =?UTF-8?Q?Andreas_Irest=c3=a5l?= , David Miller , "linux-arm-kernel@lists.infradead.org" To: Joao Pinto , Lars Persson Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org List-Id: netdev.vger.kernel.org On 11/23/2016 12:43 PM, Joao Pinto wrote: >> > Rabin Vincent can review and test that the port works properly on our Artpec-chips that use dwc_eth_qos.c today. >> > >> > The main porting step is to implement the device tree binding in bindings/net/snps,dwc-qos-ethernet.txt. Also our chip has a strict requirement that the phy is enabled when the SWR reset bit is set (it needs a tx clock to complete the reset). >> > >> > - Lars > Ok, I will do the task. > > @Peppe: Agree with the plan? Agree peppe