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Mon, 11 May 2026 17:21:51 +0000 Message-ID: <5e90b9aa-9432-43b5-ae40-1fce383bb043@intel.com> Date: Mon, 11 May 2026 22:51:38 +0530 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 09/11] drm/xe/ras: Set error threshold support To: Raag Jadav , , , CC: , , , , , , , , , , , , , , , , , References: <20260417211730.837345-1-raag.jadav@intel.com> <20260417211730.837345-10-raag.jadav@intel.com> Content-Language: en-US From: "Tauro, Riana" In-Reply-To: <20260417211730.837345-10-raag.jadav@intel.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: MA5P287CA0082.INDP287.PROD.OUTLOOK.COM (2603:1096:a01:1d8::12) To DS0PR11MB7958.namprd11.prod.outlook.com (2603:10b6:8:f9::19) Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS0PR11MB7958:EE_|IA1PR11MB6171:EE_ X-MS-Office365-Filtering-Correlation-Id: 4defbe8b-ea39-4b4d-d981-08deaf81ca20 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|376014|366016|1800799024|18002099003|22082099003|56012099003|3023799003|11063799003; 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Set it using mailbox > command so that it can be programmed by the user. > > Signed-off-by: Raag Jadav > --- > drivers/gpu/drm/xe/xe_ras.c | 42 +++++++++++++++++++ > drivers/gpu/drm/xe/xe_ras.h | 1 + > drivers/gpu/drm/xe/xe_ras_types.h | 28 +++++++++++++ > drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h | 2 + > 4 files changed, 73 insertions(+) > > diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c > index 3e93f838aa4a..26e063166c5f 100644 > --- a/drivers/gpu/drm/xe/xe_ras.c > +++ b/drivers/gpu/drm/xe/xe_ras.c > @@ -163,3 +163,45 @@ int xe_ras_get_threshold(struct xe_device *xe, u32 severity, u32 component, u32 > comp_to_str(counter.common.component), sev_to_str(counter.common.severity)); > return 0; > } > + > +int xe_ras_set_threshold(struct xe_device *xe, u32 severity, u32 component, u32 threshold) > +{ > + struct xe_ras_set_threshold_response response = {}; > + struct xe_ras_set_threshold_request request = {}; > + struct xe_sysctrl_mailbox_command command = {}; > + struct xe_ras_error_class counter = {}; > + size_t len; > + int ret; > + > + counter.common.severity = drm_to_xe_ras_severities[severity]; > + counter.common.component = drm_to_xe_ras_components[component]; > + request.counter = counter; > + request.threshold = threshold; We might need a max check here to avoid unnecessary values from user. > + > + ras_command_prepare(&command, &request, sizeof(request), &response, > + sizeof(response), XE_SYSCTRL_CMD_SET_THRESHOLD); Nit: command, request, response seems to be a better format > + > + guard(xe_pm_runtime)(xe); > + ret = xe_sysctrl_send_command(&xe->sc, &command, &len); > + if (ret) { > + xe_err(xe, "sysctrl: failed to set threshold %d\n", ret); > + return ret; > + } > + > + if (len != sizeof(response)) { > + xe_err(xe, "sysctrl: unexpected set threshold response length %zu (expected %zu)\n", > + len, sizeof(response)); > + return -EIO; > + } > + > + if (response.status) { > + xe_err(xe, "sysctrl: set threshold operation failed %#x\n", response.status); Status should be converted to visible error codes. check [PATCH v5 3/6] drm/xe/xe_ras: Add helper to clear error counter - Riana Tauro > + return -EIO; > + } > + > + counter = response.counter; > + > + xe_dbg(xe, "[RAS]: Set threshold %u for %s %s\n", response.threshold, > + comp_to_str(counter.common.component), sev_to_str(counter.common.severity)); Again not required. Value should be visible to user > + return 0; > +} > diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h > index 982bbe61461e..d1f71b1de723 100644 > --- a/drivers/gpu/drm/xe/xe_ras.h > +++ b/drivers/gpu/drm/xe/xe_ras.h > @@ -14,5 +14,6 @@ struct xe_sysctrl_event_response; > void xe_ras_counter_threshold_crossed(struct xe_device *xe, > struct xe_sysctrl_event_response *response); > int xe_ras_get_threshold(struct xe_device *xe, u32 severity, u32 component, u32 *threshold); > +int xe_ras_set_threshold(struct xe_device *xe, u32 severity, u32 component, u32 threshold); > > #endif > diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h > index d5da93d65cf5..d7e4a02a661d 100644 > --- a/drivers/gpu/drm/xe/xe_ras_types.h > +++ b/drivers/gpu/drm/xe/xe_ras_types.h > @@ -92,4 +92,32 @@ struct xe_ras_get_threshold_response { > u32 reserved[4]; > } __packed; > > +/** > + * struct xe_ras_set_threshold_request - Request structure for set threshold > + */ > +struct xe_ras_set_threshold_request { > + /** @counter: Counter to set threshold for */ > + struct xe_ras_error_class counter; > + /** @threshold: Threshold value to set */ > + u32 threshold; > + /** @reserved: Reserved for future use */ > + u32 reserved; > +} __packed; > + > +/** > + * struct xe_ras_set_threshold_response - Response structure for set threshold > + */ > +struct xe_ras_set_threshold_response { > + /** @counter: Counter id */ Nit: ID > + struct xe_ras_error_class counter; > + /** @threshold_old: Old threshold value */ Nit: prev Thanks Riana > + u32 threshold_old; > + /** @threshold: New threshold value */ > + u32 threshold; > + /** @status: Set threshold operation status */ > + u32 status; > + /** @reserved: Reserved for future use */ > + u32 reserved[2]; > +} __packed; > + > #endif > diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h > index a1b71218deca..b865768e903b 100644 > --- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h > +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h > @@ -23,10 +23,12 @@ enum xe_sysctrl_group { > * enum xe_sysctrl_gfsp_cmd - Commands supported by GFSP group > * > * @XE_SYSCTRL_CMD_GET_THRESHOLD: Retrieve error threshold > + * @XE_SYSCTRL_CMD_SET_THRESHOLD: Set error threshold > * @XE_SYSCTRL_CMD_GET_PENDING_EVENT: Retrieve pending event > */ > enum xe_sysctrl_gfsp_cmd { > XE_SYSCTRL_CMD_GET_THRESHOLD = 0x05, > + XE_SYSCTRL_CMD_SET_THRESHOLD = 0x06, > XE_SYSCTRL_CMD_GET_PENDING_EVENT = 0x07, > }; >