From: Alejandro Lucero Palau <alucerop@amd.com>
To: Dave Jiang <dave.jiang@intel.com>,
alejandro.lucero-palau@amd.com, linux-cxl@vger.kernel.org,
netdev@vger.kernel.org, dan.j.williams@intel.com,
edward.cree@amd.com, davem@davemloft.net, kuba@kernel.org,
pabeni@redhat.com, edumazet@google.com
Cc: Ben Cheatham <benjamin.cheatham@amd.com>
Subject: Re: [PATCH v12 13/23] cxl: define a driver interface for DPA allocation
Date: Mon, 14 Apr 2025 14:28:12 +0100 [thread overview]
Message-ID: <61666e34-fe78-4f69-a30a-e43b7f92ea54@amd.com> (raw)
In-Reply-To: <a0ed9543-dab3-4c56-b128-f3372eb3ce82@intel.com>
On 4/11/25 23:41, Dave Jiang wrote:
>
> On 3/31/25 7:45 AM, alejandro.lucero-palau@amd.com wrote:
snip
>> + * cxl_request_dpa - search and reserve DPA given input constraints
>> + * @cxlmd: memdev with an endpoint port with available decoders
>> + * @is_ram: DPA operation mode (ram vs pmem)
>> + * @alloc: dpa size required
>> + *
>> + * Given that a region needs to allocate from limited HPA capacity it
>> + * may be the case that a device has more mappable DPA capacity than
>> + * available HPA. The expectation is that @alloc is a driver known
>> + * value based on the device capacity but it could not be available
>> + * due to HPA constraints.
>> + *
>> + * Returns a pinned cxl_decoder with at least @alloc bytes of capacity
>> + * reserved, or an error pointer. The caller is also expected to own the
>> + * lifetime of the memdev registration associated with the endpoint to
>> + * pin the decoder registered as well.
>> + */
>> +struct cxl_endpoint_decoder *cxl_request_dpa(struct cxl_memdev *cxlmd,
>> + bool is_ram,
> Why not just pass in 'enum cxl_partition_mode' directly?
>
> DJ
>
This predates that definition and you are right for pointing this out.
I will do so.
Thanks!
next prev parent reply other threads:[~2025-04-14 13:28 UTC|newest]
Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-31 14:45 [PATCH v12 00/23] cxl: add type2 device basic support alejandro.lucero-palau
2025-03-31 14:45 ` [PATCH v12 01/23] " alejandro.lucero-palau
2025-04-01 17:36 ` Alejandro Lucero Palau
2025-04-04 15:24 ` Jonathan Cameron
2025-04-07 9:50 ` Alejandro Lucero Palau
2025-04-10 8:12 ` Alejandro Lucero Palau
2025-04-07 16:55 ` Dave Jiang
2025-03-31 14:45 ` [PATCH v12 02/23] sfc: add cxl support alejandro.lucero-palau
2025-03-31 18:31 ` Simon Horman
2025-04-07 13:59 ` Alejandro Lucero Palau
2025-04-04 15:29 ` Jonathan Cameron
2025-03-31 14:45 ` [PATCH v12 03/23] cxl: move pci generic code alejandro.lucero-palau
2025-03-31 14:45 ` [PATCH v12 04/23] cxl: move register/capability check to driver alejandro.lucero-palau
2025-04-04 15:47 ` Jonathan Cameron
2025-04-07 13:40 ` Alejandro Lucero Palau
2025-03-31 14:45 ` [PATCH v12 05/23] cxl: add function for type2 cxl regs setup alejandro.lucero-palau
2025-03-31 18:33 ` Simon Horman
2025-04-07 14:00 ` Alejandro Lucero Palau
2025-04-04 16:03 ` Jonathan Cameron
2025-04-07 10:04 ` Alejandro Lucero Palau
2025-04-15 16:34 ` Jonathan Cameron
2025-03-31 14:45 ` [PATCH v12 06/23] sfc: make regs setup with checking and set media ready alejandro.lucero-palau
2025-03-31 14:45 ` [PATCH v12 07/23] cxl: support dpa initialization without a mailbox alejandro.lucero-palau
2025-04-04 16:05 ` Jonathan Cameron
2025-04-07 10:53 ` Alejandro Lucero Palau
2025-04-10 11:37 ` Alejandro Lucero Palau
2025-04-04 16:11 ` Jonathan Cameron
2025-04-07 10:56 ` Alejandro Lucero Palau
2025-03-31 14:45 ` [PATCH v12 08/23] sfc: initialize dpa alejandro.lucero-palau
2025-04-04 16:12 ` Jonathan Cameron
2025-04-07 11:01 ` Alejandro Lucero Palau
2025-04-10 11:48 ` Alejandro Lucero Palau
2025-03-31 14:45 ` [PATCH v12 09/23] cxl: prepare memdev creation for type2 alejandro.lucero-palau
2025-03-31 18:34 ` Simon Horman
2025-04-07 14:01 ` Alejandro Lucero Palau
2025-04-04 16:25 ` Jonathan Cameron
2025-04-11 21:07 ` Dave Jiang
2025-03-31 14:45 ` [PATCH v12 10/23] sfc: create type2 cxl memdev alejandro.lucero-palau
2025-03-31 14:45 ` [PATCH v12 11/23] cxl: define a driver interface for HPA free space enumeration alejandro.lucero-palau
2025-04-04 16:37 ` Jonathan Cameron
2025-04-07 13:25 ` Alejandro Lucero Palau
2025-04-11 21:30 ` Dave Jiang
2025-04-14 13:14 ` Alejandro Lucero Palau
2025-03-31 14:45 ` [PATCH v12 12/23] sfc: obtain root decoder with enough HPA free space alejandro.lucero-palau
2025-04-04 16:38 ` Jonathan Cameron
2025-04-07 11:02 ` Alejandro Lucero Palau
2025-03-31 14:45 ` [PATCH v12 13/23] cxl: define a driver interface for DPA allocation alejandro.lucero-palau
2025-04-04 16:41 ` Jonathan Cameron
2025-04-11 22:41 ` Dave Jiang
2025-04-14 13:28 ` Alejandro Lucero Palau [this message]
2025-03-31 14:45 ` [PATCH v12 14/23] sfc: get endpoint decoder alejandro.lucero-palau
2025-03-31 14:45 ` [PATCH v12 15/23] cxl: make region type based on endpoint type alejandro.lucero-palau
2025-03-31 14:45 ` [PATCH v12 16/23] cxl/region: factor out interleave ways setup alejandro.lucero-palau
2025-03-31 14:45 ` [PATCH v12 17/23] cxl/region: factor out interleave granularity setup alejandro.lucero-palau
2025-03-31 14:45 ` [PATCH v12 18/23] cxl: allow region creation by type2 drivers alejandro.lucero-palau
2025-04-04 16:45 ` Jonathan Cameron
2025-04-07 11:03 ` Alejandro Lucero Palau
2025-04-11 23:18 ` Dave Jiang
2025-04-14 13:52 ` Alejandro Lucero Palau
2025-03-31 14:45 ` [PATCH v12 19/23] cxl: add region flag for precluding a device memory to be used for dax alejandro.lucero-palau
2025-04-11 23:25 ` Dave Jiang
2025-03-31 14:45 ` [PATCH v12 20/23] sfc: create cxl region alejandro.lucero-palau
2025-03-31 14:45 ` [PATCH v12 21/23] cxl: add function for obtaining region range alejandro.lucero-palau
2025-04-11 23:32 ` Dave Jiang
2025-03-31 14:45 ` [PATCH v12 22/23] sfc: update MCDI protocol headers alejandro.lucero-palau
2025-03-31 14:45 ` [PATCH v12 23/23] sfc: support pio mapping based on cxl alejandro.lucero-palau
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=61666e34-fe78-4f69-a30a-e43b7f92ea54@amd.com \
--to=alucerop@amd.com \
--cc=alejandro.lucero-palau@amd.com \
--cc=benjamin.cheatham@amd.com \
--cc=dan.j.williams@intel.com \
--cc=dave.jiang@intel.com \
--cc=davem@davemloft.net \
--cc=edumazet@google.com \
--cc=edward.cree@amd.com \
--cc=kuba@kernel.org \
--cc=linux-cxl@vger.kernel.org \
--cc=netdev@vger.kernel.org \
--cc=pabeni@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).