[PATCH RFC net-next 05/23] net: dsa: lantiq_gswip: introduce bitmaps for port types

[PATCH RFC net-next 05/23] net: dsa: lantiq_gswip: introduce bitmaps for port types

[Daniel Golle]

Instead of relying on hard-coded numbers for MII ports, introduce
bitmaps for ports with either built-in PHYs, MII or SGMII.
This is done in order to prepare for supporting MaxLinear GSW1xx ICs
which got a different layout of ports, and also support SGMII.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
 drivers/net/dsa/lantiq_gswip.c | 15 ++++++++++++---
 drivers/net/dsa/lantiq_gswip.h |  3 +++
 2 files changed, 15 insertions(+), 3 deletions(-)

diff --git a/drivers/net/dsa/lantiq_gswip.c b/drivers/net/dsa/lantiq_gswip.c
index 5a8fb358fb59..86e02ac0c221 100644
--- a/drivers/net/dsa/lantiq_gswip.c
+++ b/drivers/net/dsa/lantiq_gswip.c
@@ -185,14 +185,19 @@ static void gswip_mii_mask(struct gswip_priv *priv, u32 clear, u32 set,
 static void gswip_mii_mask_cfg(struct gswip_priv *priv, u32 clear, u32 set,
 			       int port)
 {
-	/* There's no MII_CFG register for the CPU port */
-	if (!dsa_is_cpu_port(priv->ds, port))
-		gswip_mii_mask(priv, clear, set, GSWIP_MII_CFGp(port));
+	if (!(priv->hw_info->mii_ports & BIT(port)))
+		return;
+
+	/* MII_CFG register only exists for MII ports */
+	gswip_mii_mask(priv, clear, set, GSWIP_MII_CFGp(port));
 }
 
 static void gswip_mii_mask_pcdu(struct gswip_priv *priv, u32 clear, u32 set,
 				int port)
 {
+	if (!(priv->hw_info->mii_ports & BIT(port)))
+		return;
+
 	switch (port) {
 	case 0:
 		gswip_mii_mask(priv, clear, set, GSWIP_MII_PCDU0);
@@ -2003,12 +2008,16 @@ static void gswip_shutdown(struct platform_device *pdev)
 static const struct gswip_hw_info gswip_xrx200 = {
 	.max_ports = 7,
 	.allowed_cpu_ports = BIT(6),
+	.phy_ports = BIT(2) | BIT(3) | BIT(4) | BIT(5),
+	.mii_ports = BIT(0) | BIT(5),
 	.phylink_get_caps = gswip_xrx200_phylink_get_caps,
 };
 
 static const struct gswip_hw_info gswip_xrx300 = {
 	.max_ports = 7,
 	.allowed_cpu_ports = BIT(6),
+	.phy_ports = BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5),
+	.mii_ports = BIT(0) | BIT(1) | BIT(5),
 	.phylink_get_caps = gswip_xrx300_phylink_get_caps,
 };
 
diff --git a/drivers/net/dsa/lantiq_gswip.h b/drivers/net/dsa/lantiq_gswip.h
index c90ddf89d0d7..3b19963f2073 100644
--- a/drivers/net/dsa/lantiq_gswip.h
+++ b/drivers/net/dsa/lantiq_gswip.h
@@ -217,6 +217,9 @@
 struct gswip_hw_info {
 	int max_ports;
 	unsigned int allowed_cpu_ports;
+	unsigned int phy_ports;
+	unsigned int mii_ports;
+	unsigned int sgmii_ports;
 	void (*phylink_get_caps)(struct dsa_switch *ds, int port,
 				 struct phylink_config *config);
 };
-- 
2.50.1

Re: [PATCH RFC net-next 05/23] net: dsa: lantiq_gswip: introduce bitmaps for port types

[Andrew Lunn]

On Sat, Aug 16, 2025 at 08:51:57PM +0100, Daniel Golle wrote:
> Instead of relying on hard-coded numbers for MII ports, introduce
> bitmaps for ports with either built-in PHYs, MII or SGMII.
> This is done in order to prepare for supporting MaxLinear GSW1xx ICs
> which got a different layout of ports, and also support SGMII.
> 
> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
> ---
>  drivers/net/dsa/lantiq_gswip.c | 15 ++++++++++++---
>  drivers/net/dsa/lantiq_gswip.h |  3 +++
>  2 files changed, 15 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/net/dsa/lantiq_gswip.c b/drivers/net/dsa/lantiq_gswip.c
> index 5a8fb358fb59..86e02ac0c221 100644
> --- a/drivers/net/dsa/lantiq_gswip.c
> +++ b/drivers/net/dsa/lantiq_gswip.c
> @@ -185,14 +185,19 @@ static void gswip_mii_mask(struct gswip_priv *priv, u32 clear, u32 set,
>  static void gswip_mii_mask_cfg(struct gswip_priv *priv, u32 clear, u32 set,
>  			       int port)
>  {
> -	/* There's no MII_CFG register for the CPU port */
> -	if (!dsa_is_cpu_port(priv->ds, port))
> -		gswip_mii_mask(priv, clear, set, GSWIP_MII_CFGp(port));
> +	if (!(priv->hw_info->mii_ports & BIT(port)))
> +		return;
> +
> +	/* MII_CFG register only exists for MII ports */
> +	gswip_mii_mask(priv, clear, set, GSWIP_MII_CFGp(port));

I would probably put the comment before the if (). The comment is
about the if () after all. And it is replacing the current comment and
the presence or not of the register.

> +	.phy_ports = BIT(2) | BIT(3) | BIT(4) | BIT(5),
> +	.mii_ports = BIT(0) | BIT(5),

phy_ports is a bit ambiguous, all ports should be capable of having a
PHY somehow. Maybe internal_phy_ports? or int_phy_ports if that is too
long.

> @@ -217,6 +217,9 @@
>  struct gswip_hw_info {
>  	int max_ports;
>  	unsigned int allowed_cpu_ports;
> +	unsigned int phy_ports;
> +	unsigned int mii_ports;
> +	unsigned int sgmii_ports;

Maybe ass sgmii_ports when you add support for sgmii? This patch does
not need it, i think.

    Andrew

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