Re: [PATCH net-next v3] ravb: Add RZ/G2L MII interface support

[Sergey Shtylyov <s.shtylyov@omp.ru>]

On 9/14/22 9:47 AM, Biju Das wrote:

> EMAC IP found on RZ/G2L Gb ethernet supports MII interface.
> This patch adds support for selecting MII interface mode.
> 
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> v2->v3:
>  * Documented CXR35_HALFCYC_CLKSW1000 and CXR35_SEL_XMII_MII macros.

   I definitely didn't mean it done this way...

[...]
> diff --git a/drivers/net/ethernet/renesas/ravb.h b/drivers/net/ethernet/renesas/ravb.h
> index b980bce763d3..058aceac8c92 100644
> --- a/drivers/net/ethernet/renesas/ravb.h
> +++ b/drivers/net/ethernet/renesas/ravb.h
[...]
> @@ -965,6 +966,11 @@ enum CXR31_BIT {
>  	CXR31_SEL_LINK1	= 0x00000008,
>  };
>  
> +enum CXR35_BIT {
> +	CXR35_HALFCYC_CLKSW1000	= 0x03E80000,	/* 1000 cycle of clk_chi */

   No, please just declare:

	CXR35_HALFCYC_CLKSW	= 0xffff0000,

> +	CXR35_SEL_XMII_MII	= 0x00000002,	/* MII interface is used */

   All the other register *enum*s are declared from LSB to MSB. The comment is pretty
self-obvious here, please remove it. And declare the whole field too:

	CXR35_SEL_XMII		= 0x00000003,
	CXR35_SEL_XMII_RGMII	= 0x00000000,
	CXR35_SEL_XMII_MII	= 0x00000002,

[...]
> diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c
> index b357ac4c56c5..9a0d06dd5eb6 100644
> --- a/drivers/net/ethernet/renesas/ravb_main.c
> +++ b/drivers/net/ethernet/renesas/ravb_main.c
> @@ -540,7 +540,14 @@ static void ravb_emac_init_gbeth(struct net_device *ndev)
>  	/* E-MAC interrupt enable register */
>  	ravb_write(ndev, ECSIPR_ICDIP, ECSIPR);
>  
> -	ravb_modify(ndev, CXR31, CXR31_SEL_LINK0 | CXR31_SEL_LINK1, CXR31_SEL_LINK0);
> +	if (priv->phy_interface == PHY_INTERFACE_MODE_MII) {
> +		ravb_modify(ndev, CXR31, CXR31_SEL_LINK0 | CXR31_SEL_LINK1, 0);
> +		ravb_write(ndev, CXR35_HALFCYC_CLKSW1000 | CXR35_SEL_XMII_MII,
> +			   CXR35);

		ravb_write(ndev, (1000 << 16) | CXR35_SEL_XMII_MII, CXR35);

[...]

MBR, Sergey