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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?HKbjf7uFdWkoNnLnwaSfYy6A2e4POyRwzEXtE8dXTofG5NBIT40/HiNAupk0?= =?us-ascii?Q?oXFlZYO1tiLPDC3min80V1yVLqjFTbUBmJWcGfnF0UrfkjEqqlI5Scil63iB?= =?us-ascii?Q?gNaWyh3wO5zH2kjJEP9DHOFI8YFZgUOA55WmqQ836A5DGLp8CEB1ovmRKgto?= =?us-ascii?Q?Z0eyKYngj4aHwSw+whqqLGqhJXiqIk86Fx/08DdA//VxnE+mrk5LbdUukP2I?= =?us-ascii?Q?NIcIFWfgv3goDJyTfydBsognTS531rLFANRhADJxGpv6K/IO9x9RZ+htuuqV?= =?us-ascii?Q?C3JTYozCxwTOW1yxkZvavcWYRpDqi0qpnq+LyUupZMjjysDajqW1Zwn5XjHf?= =?us-ascii?Q?oOSUpAHFkPilzNA0r6GVteZxwNv07GzOIb3Sn5hMKosVn+rgoRxyYa2rXFK2?= =?us-ascii?Q?ShZZNilUs6EonAJ2nyu97M4PbOk4zbJ0b2jJ0p3Kz5Uv2k7pYxxP3hEIszGT?= =?us-ascii?Q?z31m+zLHeIV0ESNxgUAikhFx0puvF0wv/stqJguWJxzMcXrax3iDQRkGdO2E?= =?us-ascii?Q?UvDGEa/P8qT7fnpJlaopPbtM1gh04qfOMoVkWWB8dStXaAre2VMxOrZ5em3v?= =?us-ascii?Q?fU4SiHg3yVPbSzoVql3T4dWcidxoNFGpcRD1QVGalvDhThXrQwxLrvwTDzcw?= =?us-ascii?Q?8ORKc/19Y1pScJ4US4HMqwPE+jz2T7TQ39sl+Om8ohZGahi40uoMeUtVGogq?= =?us-ascii?Q?kNIlbMQCAjLplklOlbEV97iIWQ1E0iR9TvNHLiXNRLPShoERro/gjhOI/3DY?= =?us-ascii?Q?d1bT6LXb2ilH1rhLJlcLpexNb0yLXCmEpUBGWGyCToC+/YpefAkuKeTIMwbK?= =?us-ascii?Q?sljdulzF3xae3UaBE7axzRnY62Qasb/gr2DaQ5KWe1CjRdW3zhpHgv2xcYZJ?= =?us-ascii?Q?lRzvKe9CztDcmTNjDPB9r0ltydRdOVI3X6f/YYNQjnojO8VKM/NzYHTBQsUn?= =?us-ascii?Q?bN1q+JdslKk4f/HjEGba2zFpUmARohDpzIZmf6iIWwoe7IhFhO7/LepKk1En?= =?us-ascii?Q?nViWPk3Yll0r1pN6VTvOoDKh5JoP/ofrxkB7pM75yQpricZtOs183U73Q0Zd?= =?us-ascii?Q?83TyWhK7hAohlhNUlzIL9EE0qfxmGr9sKcbVZpV6i0/nIOAqEROgYBraFl13?= =?us-ascii?Q?zfvIYxifV4QltW6O1r2+vvQa0c50gn6QakqsUW8XbXwlhZbSigPl2su5nnCA?= =?us-ascii?Q?AbqZuBrRCSo9mt8DFn7jlMpnE7rLOpE4iHHd44iWED+izDGKBahw8bq4qCXH?= =?us-ascii?Q?azRDeuk3Ngyai9Nc4wzVg+Da4Ar2mEjnMsLfISO6InOUh2Xkf9XHY6NpM5+e?= =?us-ascii?Q?gTok/knwEsQyqquc8tZxrw/FntEJeUDG9kzHYRFceIW5j5i8YBEZV0Azqjo+?= =?us-ascii?Q?Z61wKqiXxRpee3caUSQZAUNxX02vEZHBsH+nJG2cFQa1fA1tvlOfkOtsY6mw?= =?us-ascii?Q?wM8q7IFDwt4O8LzY/ryWke7J4LuztHxFroEEtKZcSS3xYl6RmFB5f7QRaqoE?= =?us-ascii?Q?Z856zFHuzU8cnL/o7C1lApBaqu4zpAgCgmpr4imdsgUM4XPqAeuxuyqtFDnI?= =?us-ascii?Q?dagMbQlnOf9oBPzKTDC124G21vYhWmISrhmny2ME1O00rAWds54Zi+rC/rO3?= =?us-ascii?Q?jQ=3D=3D?= X-MS-Exchange-CrossTenant-Network-Message-Id: b1c8eee7-fa2d-492c-f939-08dcd1c642b7 X-MS-Exchange-CrossTenant-AuthSource: SA3PR11MB8118.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Sep 2024 18:27:43.4561 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: nDm2srHHB/X+hmUEhXO9cdgiw0m2x0QO1EHA1sXAxZNUD27hleT71rxxC+9UCF0Q+b/svesN+rYQHljr7v/V0JseGh1x8/0TRl3wZu1aNSY= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR11MB6294 X-OriginatorOrg: intel.com Dan Williams wrote: [..] > So, while regionB would be the next decoder to allocate after regionC is > torn down, it is not a free decoder while decoderC and regionC have not been > reclaimed. The "simple" conversion is bug compatible with the current implementation, but here's a path to both constify the device_find_child() argument, *and* prevent unwanted allocations by allocating decoders precisely by id. Something like this, it passes a quick unit test run: diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c index 1d5007e3795a..749a281819b4 100644 --- a/drivers/cxl/core/port.c +++ b/drivers/cxl/core/port.c @@ -1750,7 +1750,8 @@ static int cxl_decoder_init(struct cxl_port *port, struct cxl_decoder *cxld) struct device *dev; int rc; - rc = ida_alloc(&port->decoder_ida, GFP_KERNEL); + rc = ida_alloc_max(&port->decoder_ida, CXL_DECODER_NR_MAX - 1, + GFP_KERNEL); if (rc < 0) return rc; diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index 21ad5f242875..1f7b3a9ebfa3 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -794,26 +794,16 @@ static size_t show_targetN(struct cxl_region *cxlr, char *buf, int pos) return rc; } -static int match_free_decoder(struct device *dev, void *data) +static int match_decoder_id(struct device *dev, void *data) { struct cxl_decoder *cxld; - int *id = data; + int id = *(int *) data; if (!is_switch_decoder(dev)) return 0; cxld = to_cxl_decoder(dev); - - /* enforce ordered allocation */ - if (cxld->id != *id) - return 0; - - if (!cxld->region) - return 1; - - (*id)++; - - return 0; + return cxld->id == id; } static int match_auto_decoder(struct device *dev, void *data) @@ -840,16 +830,29 @@ cxl_region_find_decoder(struct cxl_port *port, struct cxl_region *cxlr) { struct device *dev; - int id = 0; - if (port == cxled_to_port(cxled)) return &cxled->cxld; if (test_bit(CXL_REGION_F_AUTO, &cxlr->flags)) dev = device_find_child(&port->dev, &cxlr->params, match_auto_decoder); - else - dev = device_find_child(&port->dev, &id, match_free_decoder); + else { + int id, last; + + /* + * Find next available decoder, but fail new decoder + * allocations if out-of-order region destruction has + * occurred + */ + id = find_first_zero_bit(port->decoder_alloc, + CXL_DECODER_NR_MAX); + last = find_last_bit(port->decoder_alloc, CXL_DECODER_NR_MAX); + + if (id >= CXL_DECODER_NR_MAX || + (last < CXL_DECODER_NR_MAX && id != last + 1)) + return NULL; + dev = device_find_child(&port->dev, &id, match_decoder_id); + } if (!dev) return NULL; /* @@ -943,6 +946,9 @@ static void cxl_rr_free_decoder(struct cxl_region_ref *cxl_rr) dev_WARN_ONCE(&cxlr->dev, cxld->region != cxlr, "region mismatch\n"); if (cxld->region == cxlr) { + struct cxl_port *port = to_cxl_port(cxld->dev.parent); + + clear_bit(cxld->id, port->decoder_alloc); cxld->region = NULL; put_device(&cxlr->dev); } @@ -977,6 +983,7 @@ static int cxl_rr_ep_add(struct cxl_region_ref *cxl_rr, cxl_rr->nr_eps++; if (!cxld->region) { + set_bit(cxld->id, port->decoder_alloc); cxld->region = cxlr; get_device(&cxlr->dev); } diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index 9afb407d438f..750cd027d0b0 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -578,6 +578,9 @@ struct cxl_dax_region { struct range hpa_range; }; +/* Max as of CXL 3.1 (8.2.4.20.1 CXL HDM Decoder Capability Register) */ +#define CXL_DECODER_NR_MAX 32 + /** * struct cxl_port - logical collection of upstream port devices and * downstream port devices to construct a CXL memory @@ -591,6 +594,7 @@ struct cxl_dax_region { * @regions: cxl_region_ref instances, regions mapped by this port * @parent_dport: dport that points to this port in the parent * @decoder_ida: allocator for decoder ids + * @decoder_alloc: decoder busy/free (@cxld->region set) bitmap * @reg_map: component and ras register mapping parameters * @nr_dports: number of entries in @dports * @hdm_end: track last allocated HDM decoder instance for allocation ordering @@ -611,6 +615,7 @@ struct cxl_port { struct xarray regions; struct cxl_dport *parent_dport; struct ida decoder_ida; + DECLARE_BITMAP(decoder_alloc, CXL_DECODER_NR_MAX); struct cxl_register_map reg_map; int nr_dports; int hdm_end;