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Wed, 8 Jan 2025 01:33:33 +0000 Date: Tue, 7 Jan 2025 17:33:30 -0800 From: Dan Williams To: Dan Williams , , , , , , , , , , CC: Alejandro Lucero Subject: Re: [PATCH v8 01/27] cxl: add type2 device basic support Message-ID: <677dd5ea832e6_f58f29444@dwillia2-xfh.jf.intel.com.notmuch> References: <20241216161042.42108-1-alejandro.lucero-palau@amd.com> <20241216161042.42108-2-alejandro.lucero-palau@amd.com> <677dbbd46e630_2aff42944@dwillia2-xfh.jf.intel.com.notmuch> Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <677dbbd46e630_2aff42944@dwillia2-xfh.jf.intel.com.notmuch> X-ClientProxiedBy: MW4PR03CA0021.namprd03.prod.outlook.com (2603:10b6:303:8f::26) To PH8PR11MB8107.namprd11.prod.outlook.com (2603:10b6:510:256::6) Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PH8PR11MB8107:EE_|SN7PR11MB6653:EE_ X-MS-Office365-Filtering-Correlation-Id: ceed3bb6-4ab7-455d-aca6-08dd2f8476a3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|366016|7416014|376014|921020; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?WIO6QolaJbdRXS+zLQ6GAPbUaAFRYyQmELcKdJ0XXbyEYjtFBM+j3AuJCbKa?= =?us-ascii?Q?3sIhvbQOY+HO5fZEqMGujw4UohYkf0OOiiRON1sN9tyFvW7fSfx2Soib69Xb?= =?us-ascii?Q?jFz/6Qy+Ppi4iVLZStcOX0ehz+8sSuu+5+15PCURNRnCvTgvap6jNjCUu/zJ?= =?us-ascii?Q?UMA6PDs7M1M1PmMFjS4f+Z8KYmzI93EzHDG3PMSvPYhGU7X0bxdkwO/15xSO?= =?us-ascii?Q?dQjH0k/Uyphd2nuO4Vnz1jpezY38gN9POB92YLeLCuARDxkC+WZsC8ZIklcR?= =?us-ascii?Q?FcCsCfpcvqARtuW03U9d54Ts5ONKJw6NJ8TRA7NO+ON1e1qVDCtt8Re7zCQV?= =?us-ascii?Q?73rk/2TNWqDgah9Y05+44DozBHTmlJJdGczjIeyMgF9n/egwx3RyximOO1OL?= =?us-ascii?Q?k4OAPCFycEzlo95zdwXNY7zDvYE8sxqQ7mkh//pxJfzvndstHIFM57sJbh6J?= =?us-ascii?Q?aI2SyRa0yNmsem+8Wy2jwb6Bivpn1+SauZqSLBpDfZsFtZervkO9776NZzSU?= =?us-ascii?Q?nG9e60/g8Xj1SWD/QXdIUF2MukbAgaK6aZ4IOjeYfnXmVV0VD8VEPIGBU+dX?= =?us-ascii?Q?ZcukvGypQjfnge1BHRgmffdwBow+7eVAz/1KjI5Bv61QVsBfRDr+GGt5D2tJ?= =?us-ascii?Q?A/iBKPWolxsrAEktljyqQYfrvP8Xsv8EEc0C+nOIfX3lzXq3q64AJ/6eD8bI?= =?us-ascii?Q?aOyjEBTMBcvoDFUSOzcCabAr+5HYorZgPmyu5TEV1ksWnE+wqpbTy8PfhY6J?= =?us-ascii?Q?ak7hoMhYrbHWEJGE0YDG7RhXSSXCmcbUUroBo2VGDtOakr1P0iiulUVUBbBV?= =?us-ascii?Q?tdnkkWJ6yrwzqstWFUEMi1i06hR8Nvkh3UXKWHNm7506iWrhJInASmtfp+58?= =?us-ascii?Q?aq3uMQcwpddEOo82Fb7mr9f2cA3omU2hFW6bvR6S0Aw9TxV2B5Kjy6LKbp5S?= =?us-ascii?Q?Mp3jiu7rQITO5p8PmOWU5BuCkD9SR1IJzwvt0YPhYlLeVYjcj9xi/FOQg7mL?= =?us-ascii?Q?BxPyfHS12YmMLbC/N1ofcoxYOKI8kq+IbWw/V40fzOa+Sgo2JvoXO4iJAQAD?= =?us-ascii?Q?m2XxwxJOB6b5ZUU7qpeogTg84sVKa8FIH0ul/7NZXNZVMjEtfCaco2ddFOIS?= =?us-ascii?Q?VjxDdYQkM1OqJj+jA9lghuMmI4XZvgQiaICnKi+gD3q/dh4Ds0pqeUugENsp?= =?us-ascii?Q?CZCadg87k6wKFHfP7AXEWuuvLAFIp/5IEdMttQe9usTUEP/bKFlR2H8ZqFNZ?= =?us-ascii?Q?lu4s7gSDjqTCHAgCyWHnfZeKsRti3+0R4G9OXc/j4m2y2xzkpnCFCs6Pgck+?= =?us-ascii?Q?Dqk8D2DN8O3uBxk++Npivj3qO72ndCuSyTEMUJW9uQQK5HstMWmuyrTs2U1C?= =?us-ascii?Q?yaKuXWfXqDbAjeBUsAcBkFKdT65y6DvYc7ncrt9R6+TJSesIl0XG6y1t3qR8?= =?us-ascii?Q?wmuKpOlU4Uj/lCykQrowETFXfDT2gStScfuvWt34sLEZK2ck9CrFie+zOlR5?= =?us-ascii?Q?Qj4G6Pv8z5S0i6OlEzWtCR5p7yZwDmvG2plmmHbACPLsxs4U//Qnsz4N1HeJ?= =?us-ascii?Q?5ep1K2E5t86vXg8CAYmmG4M8yNhO0Buu+mTYnKNtDwy+UL6XVj54KkNOWtGP?= =?us-ascii?Q?IQ=3D=3D?= X-MS-Exchange-CrossTenant-Network-Message-Id: ceed3bb6-4ab7-455d-aca6-08dd2f8476a3 X-MS-Exchange-CrossTenant-AuthSource: PH8PR11MB8107.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Jan 2025 01:33:33.0780 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: cy8qYHXQjRPBSOtgBfCWqzgmIw2fC1LQ4wcVAsc2F9uxVyGESLXXV3oM6teDUg0+XoiavEj2skk8CfekHOuF0QRTGw+6TRE6uwzmq+OVrkE= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR11MB6653 X-OriginatorOrg: intel.com Dan Williams wrote: > alejandro.lucero-palau@ wrote: > > From: Alejandro Lucero > > > > Differentiate CXL memory expanders (type 3) from CXL device accelerators > > (type 2) with a new function for initializing cxl_dev_state. > > > > Create accessors to cxl_dev_state to be used by accel drivers. > > > > Based on previous work by Dan Williams [1] > > > > Link: [1] https://lore.kernel.org/linux-cxl/168592160379.1948938.12863272903570476312.stgit@dwillia2-xfh.jf.intel.com/ > > Signed-off-by: Alejandro Lucero > > Co-developed-by: Dan Williams > > Reviewed-by: Dave Jiang > > Reviewed-by: Fan Ni > > This patch causes Whoops, forgot to complete this thought. Someting in this series causes: depmod: ERROR: Cycle detected: ecdh_generic depmod: ERROR: Cycle detected: tpm depmod: ERROR: Cycle detected: cxl_mock -> cxl_core -> cxl_mock depmod: ERROR: Cycle detected: encrypted_keys depmod: ERROR: Found 2 modules in dependency cycles! I think the non CXL ones are false likely triggered by the CXL causing depmod to exit early. Given cxl-test is unfamiliar territory to many submitters I always offer to fix up the breakage. I came up with the below incremental patch to fold in that also addresses my other feedback. Now the depmod error is something Alison saw too, and while I can also see it on patch1 if I do: - apply whole series - build => see the error - rollback patch1 - build => see the error ...a subsequent build the error goes away, so I think that transient behavior is a quirk of how cxl-test is built, but some later patch in that series makes the failure permanent. In any event I figured that out after creating the below fixup and realizing that it does not fix the cxl-test build issue: -- 8< -- diff --git a/drivers/cxl/core/mbox.c b/drivers/cxl/core/mbox.c index 548564c770c0..584766d34b05 100644 --- a/drivers/cxl/core/mbox.c +++ b/drivers/cxl/core/mbox.c @@ -1435,7 +1435,7 @@ int cxl_mailbox_init(struct cxl_mailbox *cxl_mbox, struct device *host) } EXPORT_SYMBOL_NS_GPL(cxl_mailbox_init, "CXL"); -struct cxl_memdev_state *cxl_memdev_state_create(struct device *dev) +struct cxl_memdev_state *cxl_memdev_state_create(struct device *dev, u64 serial, u16 dvsec) { struct cxl_memdev_state *mds; @@ -1445,11 +1445,9 @@ struct cxl_memdev_state *cxl_memdev_state_create(struct device *dev) return ERR_PTR(-ENOMEM); } + cxl_dev_state_init(&mds->cxlds, dev, CXL_DEVTYPE_CLASSMEM, serial, + dvsec); mutex_init(&mds->event.log_lock); - mds->cxlds.dev = dev; - mds->cxlds.reg_map.host = dev; - mds->cxlds.reg_map.resource = CXL_RESOURCE_NONE; - mds->cxlds.type = CXL_DEVTYPE_CLASSMEM; mds->ram_perf.qos_class = CXL_QOS_CLASS_INVALID; mds->pmem_perf.qos_class = CXL_QOS_CLASS_INVALID; diff --git a/drivers/cxl/core/memdev.c b/drivers/cxl/core/memdev.c index 99f533caae1e..9b8b9b4d1392 100644 --- a/drivers/cxl/core/memdev.c +++ b/drivers/cxl/core/memdev.c @@ -617,24 +617,18 @@ static void detach_memdev(struct work_struct *work) static struct lock_class_key cxl_memdev_key; -struct cxl_dev_state *cxl_accel_state_create(struct device *dev) +void cxl_dev_state_init(struct cxl_dev_state *cxlds, struct device *dev, + enum cxl_devtype type, u64 serial, u16 dvsec) { - struct cxl_dev_state *cxlds; - - cxlds = kzalloc(sizeof(*cxlds), GFP_KERNEL); - if (!cxlds) - return ERR_PTR(-ENOMEM); - cxlds->dev = dev; - cxlds->type = CXL_DEVTYPE_DEVMEM; + cxlds->type = type; + cxlds->reg_map.host = dev; + cxlds->reg_map.resource = CXL_RESOURCE_NONE; cxlds->dpa_res = DEFINE_RES_MEM_NAMED(0, 0, "dpa"); cxlds->ram_res = DEFINE_RES_MEM_NAMED(0, 0, "ram"); cxlds->pmem_res = DEFINE_RES_MEM_NAMED(0, 0, "pmem"); - - return cxlds; } -EXPORT_SYMBOL_NS_GPL(cxl_accel_state_create, "CXL"); static struct cxl_memdev *cxl_memdev_alloc(struct cxl_dev_state *cxlds, const struct file_operations *fops) @@ -713,37 +707,6 @@ static int cxl_memdev_open(struct inode *inode, struct file *file) return 0; } -void cxl_set_dvsec(struct cxl_dev_state *cxlds, u16 dvsec) -{ - cxlds->cxl_dvsec = dvsec; -} -EXPORT_SYMBOL_NS_GPL(cxl_set_dvsec, "CXL"); - -void cxl_set_serial(struct cxl_dev_state *cxlds, u64 serial) -{ - cxlds->serial = serial; -} -EXPORT_SYMBOL_NS_GPL(cxl_set_serial, "CXL"); - -int cxl_set_resource(struct cxl_dev_state *cxlds, struct resource res, - enum cxl_resource type) -{ - switch (type) { - case CXL_RES_DPA: - cxlds->dpa_res = res; - return 0; - case CXL_RES_RAM: - cxlds->ram_res = res; - return 0; - case CXL_RES_PMEM: - cxlds->pmem_res = res; - return 0; - } - - return -EINVAL; -} -EXPORT_SYMBOL_NS_GPL(cxl_set_resource, "CXL"); - static int cxl_memdev_release_file(struct inode *inode, struct file *file) { struct cxl_memdev *cxlmd = diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h index 2a25d1957ddb..1e4b64b8f35a 100644 --- a/drivers/cxl/cxlmem.h +++ b/drivers/cxl/cxlmem.h @@ -4,6 +4,7 @@ #define __CXL_MEM_H__ #include #include +#include #include #include #include @@ -380,20 +381,6 @@ struct cxl_security_state { struct kernfs_node *sanitize_node; }; -/* - * enum cxl_devtype - delineate type-2 from a generic type-3 device - * @CXL_DEVTYPE_DEVMEM - Vendor specific CXL Type-2 device implementing HDM-D or - * HDM-DB, no requirement that this device implements a - * mailbox, or other memory-device-standard manageability - * flows. - * @CXL_DEVTYPE_CLASSMEM - Common class definition of a CXL Type-3 device with - * HDM-H and class-mandatory memory device registers - */ -enum cxl_devtype { - CXL_DEVTYPE_DEVMEM, - CXL_DEVTYPE_CLASSMEM, -}; - /** * struct cxl_dpa_perf - DPA performance property entry * @dpa_range: range for DPA address @@ -411,9 +398,9 @@ struct cxl_dpa_perf { /** * struct cxl_dev_state - The driver device state * - * cxl_dev_state represents the CXL driver/device state. It provides an - * interface to mailbox commands as well as some cached data about the device. - * Currently only memory devices are represented. + * cxl_dev_state represents the minimal data about a CXL device to allow + * the CXL core to manage common initialization of generic CXL and HDM capabilities of + * memory expanders and accelerators with device-memory * * @dev: The device associated with this CXL state * @cxlmd: The device representing the CXL.mem capabilities of @dev @@ -426,7 +413,7 @@ struct cxl_dpa_perf { * @pmem_res: Active Persistent memory capacity configuration * @ram_res: Active Volatile memory capacity configuration * @serial: PCIe Device Serial Number - * @type: Generic Memory Class device or Vendor Specific Memory device + * @type: Generic Memory Class device or an accelerator with CXL.mem * @cxl_mbox: CXL mailbox context */ struct cxl_dev_state { @@ -819,7 +806,8 @@ int cxl_dev_state_identify(struct cxl_memdev_state *mds); int cxl_await_media_ready(struct cxl_dev_state *cxlds); int cxl_enumerate_cmds(struct cxl_memdev_state *mds); int cxl_mem_create_range_info(struct cxl_memdev_state *mds); -struct cxl_memdev_state *cxl_memdev_state_create(struct device *dev); +struct cxl_memdev_state *cxl_memdev_state_create(struct device *dev, u64 serial, + u16 dvsec); void set_exclusive_cxl_commands(struct cxl_memdev_state *mds, unsigned long *cmds); void clear_exclusive_cxl_commands(struct cxl_memdev_state *mds, diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c index 36098e2b4235..b51e47fd28b3 100644 --- a/drivers/cxl/pci.c +++ b/drivers/cxl/pci.c @@ -922,21 +922,19 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) return rc; pci_set_master(pdev); - mds = cxl_memdev_state_create(&pdev->dev); - if (IS_ERR(mds)) - return PTR_ERR(mds); - cxlds = &mds->cxlds; - pci_set_drvdata(pdev, cxlds); - - cxlds->rcd = is_cxl_restricted(pdev); - cxl_set_serial(cxlds, pci_get_dsn(pdev)); dvsec = pci_find_dvsec_capability(pdev, PCI_VENDOR_ID_CXL, CXL_DVSEC_PCIE_DEVICE); if (!dvsec) dev_warn(&pdev->dev, "Device DVSEC not present, skip CXL.mem init\n"); - cxl_set_dvsec(cxlds, dvsec); + mds = cxl_memdev_state_create(&pdev->dev, pci_get_dsn(pdev), dvsec); + if (IS_ERR(mds)) + return PTR_ERR(mds); + cxlds = &mds->cxlds; + pci_set_drvdata(pdev, cxlds); + + cxlds->rcd = is_cxl_restricted(pdev); rc = cxl_pci_setup_regs(pdev, CXL_REGLOC_RBI_MEMDEV, &map); if (rc) diff --git a/include/cxl/cxl.h b/include/cxl/cxl.h index aa4480d49e48..9db4fb6d2c74 100644 --- a/include/cxl/cxl.h +++ b/include/cxl/cxl.h @@ -4,21 +4,25 @@ #ifndef __CXL_H #define __CXL_H -#include +#include -enum cxl_resource { - CXL_RES_DPA, - CXL_RES_RAM, - CXL_RES_PMEM, +/* + * enum cxl_devtype - delineate type-2 from a generic type-3 device + * @CXL_DEVTYPE_DEVMEM - Vendor specific CXL Type-2 device implementing HDM-D or + * HDM-DB, no requirement that this device implements a + * mailbox, or other memory-device-standard manageability + * flows. + * @CXL_DEVTYPE_CLASSMEM - Common class definition of a CXL Type-3 device with + * HDM-H and class-mandatory memory device registers + */ +enum cxl_devtype { + CXL_DEVTYPE_DEVMEM, + CXL_DEVTYPE_CLASSMEM, }; struct cxl_dev_state; struct device; -struct cxl_dev_state *cxl_accel_state_create(struct device *dev); - -void cxl_set_dvsec(struct cxl_dev_state *cxlds, u16 dvsec); -void cxl_set_serial(struct cxl_dev_state *cxlds, u64 serial); -int cxl_set_resource(struct cxl_dev_state *cxlds, struct resource res, - enum cxl_resource); +void cxl_dev_state_init(struct cxl_dev_state *cxlds, struct device *dev, + enum cxl_devtype type, u64 serial, u16 dvsec); #endif diff --git a/tools/testing/cxl/test/mem.c b/tools/testing/cxl/test/mem.c index 347c1e7b37bd..24cac1cc30f9 100644 --- a/tools/testing/cxl/test/mem.c +++ b/tools/testing/cxl/test/mem.c @@ -1500,7 +1500,7 @@ static int cxl_mock_mem_probe(struct platform_device *pdev) if (rc) return rc; - mds = cxl_memdev_state_create(dev); + mds = cxl_memdev_state_create(dev, pdev->id, 0); if (IS_ERR(mds)) return PTR_ERR(mds); @@ -1516,7 +1516,6 @@ static int cxl_mock_mem_probe(struct platform_device *pdev) mds->event.buf = (struct cxl_get_event_payload *) mdata->event_buf; INIT_DELAYED_WORK(&mds->security.poll_dwork, cxl_mockmem_sanitize_work); - cxlds->serial = pdev->id; if (is_rcd(pdev)) cxlds->rcd = true;