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Tue, 14 Jan 2025 23:48:18 +0000 Date: Tue, 14 Jan 2025 15:48:16 -0800 From: Dan Williams To: Alejandro Lucero Palau , Dan Williams , , , , , , , , , , Subject: Re: [PATCH v8 01/27] cxl: add type2 device basic support Message-ID: <6786f7bff1389_20f329429@dwillia2-xfh.jf.intel.com.notmuch> References: <20241216161042.42108-1-alejandro.lucero-palau@amd.com> <20241216161042.42108-2-alejandro.lucero-palau@amd.com> <677dbbd46e630_2aff42944@dwillia2-xfh.jf.intel.com.notmuch> <58981468-ca67-0bb4-86b9-5cb2c3678737@amd.com> Content-Type: text/plain; charset="iso-8859-1" Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <58981468-ca67-0bb4-86b9-5cb2c3678737@amd.com> X-ClientProxiedBy: MW4PR04CA0227.namprd04.prod.outlook.com (2603:10b6:303:87::22) To PH8PR11MB8107.namprd11.prod.outlook.com (2603:10b6:510:256::6) Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PH8PR11MB8107:EE_|PH0PR11MB5830:EE_ X-MS-Office365-Filtering-Correlation-Id: 30744a4a-710f-4f64-ae81-08dd34f5ebc2 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|1800799024|376014|7416014|7053199007|921020; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?iso-8859-1?Q?0m2+7EJrV9AF8MAuIcu3S0+LmkTL37DtTUI7Ffp+mY1ajXIfRKZF2/FIwR?= =?iso-8859-1?Q?TS8lX1SL1Wbm43P2x7052pfGAvtUp2ih/gzVTclxWj8jyyXSOm5Fj7ghIk?= =?iso-8859-1?Q?h185ytDFsGvMrnxTMSkyldR3DKcqgJz96FJ7wPvutb+TSaJW68EIXk5NQ9?= =?iso-8859-1?Q?v4dE0tox60GX2Qc68f028DEOGoyC6VFKoGMq6jGDsWlGPkhhfis5TeaQl0?= =?iso-8859-1?Q?UqaFgSZOhHOqTdsBLS0JF5xJo/N13KcsCKAR/d76sjjoqmKeKysbTvknS9?= =?iso-8859-1?Q?xL9cgs1Pl6BqOwpqG584C0cTxVrvFaHCIeHB82NqHIgNaYPjXIg4lP5VrS?= =?iso-8859-1?Q?hwFIpYb+BsAn6K7Of1L00D8eyDPz8YptwCP1k2V8R3Cm/ypFxf69yVkWEV?= =?iso-8859-1?Q?d5T4bELc9QFcH+fPjX0e0aG6ulrLdpxFqCKtBPJi1FIGjbsrBBYhVkTl6P?= =?iso-8859-1?Q?IBUlqeiout5soDG/x7CUr2TouGfcZMfiYUnQ2QenjZ8uUXzHoIvXIurIZT?= =?iso-8859-1?Q?RQW+arLlQlfk+WBsMs2HYhvs+MF+O8zaXt5aSirvijW/AW/1r3i381TvUs?= =?iso-8859-1?Q?kHAPN2Kas8hiAxyRjsyNNzNtmOqRLU0lOTGCHB7LkdB1GbVch6mQlS+tvv?= =?iso-8859-1?Q?ulYvlBgmH9NdNRzHvx+WUIShUk0z81svV9Mi/UtkT+Tkbc1ljatSSbf00y?= =?iso-8859-1?Q?E08m7+USyNYath2AmkVh/tSy8H/iH8AHlRyxydx1ZCmquwqxJz4u1TqBw2?= =?iso-8859-1?Q?Q5me77c4Fn4fmkdwX/t63xYrf50L0ovpUWxMlY2Wi2AZCgFu0HGIx5Fswj?= =?iso-8859-1?Q?UlCCUQL7/3JBzB5iXB3o6FplMTjc2PC8ByhMTf6f4+GQaoHabH9yTlUuHR?= =?iso-8859-1?Q?qtn73B6YxTyXB6TUhmQekfU082KUUcYJQ8/0vfyTsMvyhdJl4dgX5jZJdA?= =?iso-8859-1?Q?JzClEg/4uKgkfhmtQ2mxs4ABrZVICa3HVDAOrcXyIft1+fWLYtA3SLmOFH?= =?iso-8859-1?Q?tjfkZULyE37zqLrsuBPngcTPxO2JGp1euL/SFsi0m9f+aDBxYL+y08dsip?= =?iso-8859-1?Q?w/30I7JFiQ3ZrebyWatcBeTcFyW44cghXMSiboDbR5v8zNTzF7BuzlMJjK?= =?iso-8859-1?Q?WhiOG9n1th2MrjFwMYes2j9BZ7SDtBJAGo4J6//ly+qF3+cZiYWKeTfiXo?= =?iso-8859-1?Q?twakZmwtKu9aatMqb9UoJDCqEGKP3zODov2986irDV+eFnVa67bP7yenR3?= =?iso-8859-1?Q?u5NqbyQGy0BpS40EjliLj/avRyUxZRvDH02swV6yy7eLP5jhIvDVs9RXug?= =?iso-8859-1?Q?vx7Is6C/JeA7Gpb2j5mpX2Cqj5EJIUVYR9mn4OmugNcxk6h1bdsXhfKXd6?= =?iso-8859-1?Q?dy7A11edMgBMgEkysftSVu+AnpTSIZGcZ4CCEtLNdV+M2KAQ1wHw26A1IZ?= =?iso-8859-1?Q?4pW+GFBEBq0T3s2uwatpib1/Aeat7wGGbCa/sQ+La/VbFPu0KkiFionnwU?= =?iso-8859-1?Q?XPCYN/zcbwDo5CJJmc3tPZT9ai/n6HsR1lzt9chmUDg7argwug0+uCtFkw?= =?iso-8859-1?Q?w4tg1+7QLzZnoQNquwXoMghyXXhcfRgl2IbnttQUEOdMC+JkmoABcH/YrT?= =?iso-8859-1?Q?0gFQyjdJJ08fbMPKbidws6T1hy2o+zJQV/IY0N7+h4J8SpkUldESm7gw?= =?iso-8859-1?Q?=3D=3D?= X-MS-Exchange-CrossTenant-Network-Message-Id: 30744a4a-710f-4f64-ae81-08dd34f5ebc2 X-MS-Exchange-CrossTenant-AuthSource: PH8PR11MB8107.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Jan 2025 23:48:18.4883 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Tq8xfquVz/N8/FRZFXMJ4qyb5M6n/E9u9OOil4NkDs/Bw5AVLNtfz1yLZfX8nrZhX9J9s0Kxxep7mjNzlbSBGGtnNgIX2TIzpqvZxOamHX0= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR11MB5830 X-OriginatorOrg: intel.com Alejandro Lucero Palau wrote: > > On 1/7/25 23:42, Dan Williams wrote: > > alejandro.lucero-palau@ wrote: > >> From: Alejandro Lucero > >> > >> Differentiate CXL memory expanders (type 3) from CXL device accelerators > >> (type 2) with a new function for initializing cxl_dev_state. > >> > >> Create accessors to cxl_dev_state to be used by accel drivers. > >> > >> Based on previous work by Dan Williams [1] > >> > >> Link: [1] https://lore.kernel.org/linux-cxl/168592160379.1948938.12863272903570476312.stgit@dwillia2-xfh.jf.intel.com/ > >> Signed-off-by: Alejandro Lucero > >> Co-developed-by: Dan Williams > >> Reviewed-by: Dave Jiang > >> Reviewed-by: Fan Ni > > This patch causes > >> --- > >> drivers/cxl/core/memdev.c | 51 +++++++++++++++++++++++++++++++++++++++ > >> drivers/cxl/core/pci.c | 1 + > >> drivers/cxl/cxlpci.h | 16 ------------ > >> drivers/cxl/pci.c | 13 +++++++--- > >> include/cxl/cxl.h | 21 ++++++++++++++++ > >> include/cxl/pci.h | 23 ++++++++++++++++++ > >> 6 files changed, 105 insertions(+), 20 deletions(-) > >> create mode 100644 include/cxl/cxl.h > >> create mode 100644 include/cxl/pci.h > >> > >> diff --git a/drivers/cxl/core/memdev.c b/drivers/cxl/core/memdev.c > >> index ae3dfcbe8938..99f533caae1e 100644 > >> --- a/drivers/cxl/core/memdev.c > >> +++ b/drivers/cxl/core/memdev.c > >> @@ -7,6 +7,7 @@ > >> #include > >> #include > >> #include > >> +#include > >> #include > >> #include "trace.h" > >> #include "core.h" > >> @@ -616,6 +617,25 @@ static void detach_memdev(struct work_struct *work) > >> > >> static struct lock_class_key cxl_memdev_key; > >> > >> +struct cxl_dev_state *cxl_accel_state_create(struct device *dev) > > Lets just call this cxl_dev_state_create and have cxl_memdev_state use > > it internally for the truly common init functionality. > > > > Move the cxlds->type setting to a passed in parameter as that appears to > > be the only common init piece that needs to change to make this usable > > by cxl_memdev_state_create(). > > > > That would also fix the missing initialization of these values the > > cxl_memdev_state_create() currently handles: > > > > mds->cxlds.reg_map.resource = CXL_RESOURCE_NONE; > > mds->ram_perf.qos_class = CXL_QOS_CLASS_INVALID; > > mds->pmem_perf.qos_class = CXL_QOS_CLASS_INVALID; > > > > Ok. It makes sense. > > > >> +{ > >> + struct cxl_dev_state *cxlds; > >> + > >> + cxlds = kzalloc(sizeof(*cxlds), GFP_KERNEL); > >> + if (!cxlds) > >> + return ERR_PTR(-ENOMEM); > >> + > >> + cxlds->dev = dev; > >> + cxlds->type = CXL_DEVTYPE_DEVMEM; > >> + > >> + cxlds->dpa_res = DEFINE_RES_MEM_NAMED(0, 0, "dpa"); > >> + cxlds->ram_res = DEFINE_RES_MEM_NAMED(0, 0, "ram"); > >> + cxlds->pmem_res = DEFINE_RES_MEM_NAMED(0, 0, "pmem"); > >> + > >> + return cxlds; > >> +} > >> +EXPORT_SYMBOL_NS_GPL(cxl_accel_state_create, "CXL"); > > So, this is the only new function I would expect in this patch based on > > the changelog... > > > >> + > >> static struct cxl_memdev *cxl_memdev_alloc(struct cxl_dev_state *cxlds, > >> const struct file_operations *fops) > >> { > >> @@ -693,6 +713,37 @@ static int cxl_memdev_open(struct inode *inode, struct file *file) > >> return 0; > >> } > >> > >> +void cxl_set_dvsec(struct cxl_dev_state *cxlds, u16 dvsec) > >> +{ > >> + cxlds->cxl_dvsec = dvsec; > >> +} > >> +EXPORT_SYMBOL_NS_GPL(cxl_set_dvsec, "CXL"); > >> + > >> +void cxl_set_serial(struct cxl_dev_state *cxlds, u64 serial) > >> +{ > >> + cxlds->serial = serial; > >> +} > >> +EXPORT_SYMBOL_NS_GPL(cxl_set_serial, "CXL"); > > What are these doing in this patch? Why are new exports needed for such > > trivial functions? If they are common values to move to init time I would > > just make them common argument to cxl_dev_state_create(). > > > I was told to merge those simple changes in this one instead of > additional patches. > > And I have no problem dropping them and use extra  args. > > I'll do so it v10. > > > >> + > >> +int cxl_set_resource(struct cxl_dev_state *cxlds, struct resource res, > > Additionally, why does this take a 'struct resource' rather than a 'struct resource *'? > > > The driver does not need the resource but for this initialization, so it > is a locally allocated resource which will not exist later on. > > It is a small struct so I guess your concern is not with the stack, > maybe about security. If it is due to some rule to avoid it which I'm > not familiar with, it has gone undetected through a lot of eyes ... It's not about security its about the semantic of how does an accelerator initialize the DPA address space of a device, and can it do it in a generic way that can be shared across acclerators, pre-HDM-decoder expander devices, post HDM-decoder expanders, and new-fangled DCD capable expanders. > >> + enum cxl_resource type) > >> +{ > >> + switch (type) { > >> + case CXL_RES_DPA: > >> + cxlds->dpa_res = res; > >> + return 0; > >> + case CXL_RES_RAM: > >> + cxlds->ram_res = res; > >> + return 0; > >> + case CXL_RES_PMEM: > >> + cxlds->pmem_res = res; > >> + return 0; > > This appears to misunderstand the relationship between these resources. > > dpa_res is the overall device internal DPA address space resource tree. > > ram_res and pmem_res are shortcuts to get to the volatile and pmem > > partitions of the dpa space. I can imagine it would ever be desirable to > > trust the caller to fully initialize all the values of the resource, > > especially 'parent', 'sibling', and 'child' which should only be touched > > under the resource lock in the common case. > > > No, I'm aware of this, but also I think there is a need for setting them > independently, and the reason behind this code. > > Maybe you have in mind some complex devices requiring another approach > for this set up. DPA space layout initialization is a common operation so I am looking for a way for expanders and accelerators to stay unified on shared library code for the similar semantics. Let me see if I can draft something that also considers what the DCD code is trying to do.