From: <dan.j.williams@intel.com>
To: <alejandro.lucero-palau@amd.com>, <linux-cxl@vger.kernel.org>,
<netdev@vger.kernel.org>, <dan.j.williams@intel.com>,
<edward.cree@amd.com>, <davem@davemloft.net>, <kuba@kernel.org>,
<pabeni@redhat.com>, <edumazet@google.com>,
<dave.jiang@intel.com>
Cc: Alejandro Lucero <alucerop@amd.com>
Subject: Re: [PATCH v21 02/23] cxl/mem: Arrange for always-synchronous memdev attach
Date: Mon, 1 Dec 2025 21:03:32 -0800 [thread overview]
Message-ID: <692e7324a4ddc_261c1100d8@dwillia2-mobl4.notmuch> (raw)
In-Reply-To: <20251119192236.2527305-3-alejandro.lucero-palau@amd.com>
alejandro.lucero-palau@ wrote:
> From: Alejandro Lucero <alucerop@amd.com>
>
> In preparation for CXL accelerator drivers that have a hard dependency on
> CXL capability initialization, arrange for the endpoint probe result to be
> conveyed to the caller of devm_cxl_add_memdev().
>
> As it stands cxl_pci does not care about the attach state of the cxl_memdev
> because all generic memory expansion functionality can be handled by the
> cxl_core. For accelerators, that driver needs to know perform driver
> specific initialization if CXL is available, or exectute a fallback to PCIe
> only operation.
>
> By moving devm_cxl_add_memdev() to cxl_mem.ko it removes async module
> loading as one reason that a memdev may not be attached upon return from
> devm_cxl_add_memdev().
>
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
No, there, is no such thing as non-author sign-offs without
Co-developed-by. If you take authorship and take most of the changelog
text verbatim then either be clear about what additional changes you
made to take authorship, or leave the original authorship in tact.
For this patch we can just drop it because the simpler proposal I
replied to patch1 seems a better way to go.
next prev parent reply other threads:[~2025-12-02 5:03 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-19 19:22 [PATCH v21 00/23] Type2 device basic support alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 01/23] cxl/mem: refactor memdev allocation alejandro.lucero-palau
2025-11-20 18:08 ` Jonathan Cameron
2025-11-20 18:27 ` Alejandro Lucero Palau
2025-11-21 12:06 ` Jonathan Cameron
2025-11-21 13:46 ` Alejandro Lucero Palau
2025-11-20 20:27 ` Koralahalli Channabasappa, Smita
2025-11-21 13:41 ` Alejandro Lucero Palau
2025-12-02 2:52 ` dan.j.williams
2025-12-02 4:58 ` dan.j.williams
2025-12-02 8:47 ` Alejandro Lucero Palau
2025-11-19 19:22 ` [PATCH v21 02/23] cxl/mem: Arrange for always-synchronous memdev attach alejandro.lucero-palau
2025-12-02 5:03 ` dan.j.williams [this message]
2025-11-19 19:22 ` [PATCH v21 03/23] cxl/port: Arrange for always synchronous endpoint attach alejandro.lucero-palau
2025-12-02 5:08 ` dan.j.williams
2025-11-19 19:22 ` [PATCH v21 04/23] cxl/mem: Introduce a memdev creation ->probe() operation alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 05/23] cxl: Add type2 device basic support alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 06/23] sfc: add cxl support alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 07/23] cxl: Move pci generic code alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 08/23] cxl/sfc: Map cxl component regs alejandro.lucero-palau
2025-11-21 6:54 ` PJ Waskiewicz
2025-11-21 11:01 ` Alejandro Lucero Palau
2025-11-22 1:11 ` PJ Waskiewicz
2025-11-19 19:22 ` [PATCH v21 09/23] cxl/sfc: Initialize dpa without a mailbox alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 10/23] cxl: Prepare memdev creation for type2 alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 11/23] sfc: create type2 cxl memdev alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 12/23] cxl: Define a driver interface for HPA free space enumeration alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 13/23] sfc: get root decoder alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 14/23] cxl: Define a driver interface for DPA allocation alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 15/23] sfc: get endpoint decoder alejandro.lucero-palau
2025-11-26 1:27 ` PJ Waskiewicz
2025-11-26 9:09 ` Alejandro Lucero Palau
2025-11-26 18:35 ` PJ Waskiewicz
2025-11-27 9:08 ` Alejandro Lucero Palau
2025-12-02 8:49 ` PJ Waskiewicz
2025-12-02 9:09 ` Alejandro Lucero Palau
2025-12-02 16:35 ` Dave Jiang
2025-11-19 19:22 ` [PATCH v21 16/23] cxl: Make region type based on endpoint type alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 17/23] cxl/region: Factor out interleave ways setup alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 18/23] cxl/region: Factor out interleave granularity setup alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 19/23] cxl: Allow region creation by type2 drivers alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 20/23] cxl: Avoid dax creation for accelerators alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 21/23] sfc: create cxl region alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 22/23] cxl: Add function for obtaining region range alejandro.lucero-palau
2025-11-19 19:22 ` [PATCH v21 23/23] sfc: support pio mapping based on cxl alejandro.lucero-palau
2025-11-21 6:41 ` [PATCH v21 00/23] Type2 device basic support PJ Waskiewicz
2025-11-21 10:40 ` Alejandro Lucero Palau
2025-11-22 1:08 ` PJ Waskiewicz
2025-11-28 19:44 ` PJ Waskiewicz
2025-11-28 20:29 ` Alejandro Lucero Palau
2025-11-29 16:26 ` Alejandro Lucero Palau
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