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(host-82-57-191-234.retail.telecomitalia.it. [82.57.191.234]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48af507f33fsm1275291f8f.24.2026.09.28.23.04.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Sep 2026 23:04:47 -0700 (PDT) Message-ID: <6abb54ff.332d3c56.21546b.7fef@mx.google.com> X-Google-Original-Message-ID: Date: Tue, 29 Sep 2026 08:04:44 +0200 From: Christian Marangi To: Yongzhao Chen Cc: netdev@vger.kernel.org, Ziyang Huang , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Florian Fainelli , linux-kernel@vger.kernel.org Subject: Re: [PATCH net-next v4 3/3] net: dsa: qca8k: support QCA8337 internal PHY CPU links References: <20260928220811.1880-1-yongzhao.derek@gmail.com> <20260928220811.1880-4-yongzhao.derek@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260928220811.1880-4-yongzhao.derek@gmail.com> On Tue, Sep 29, 2026 at 12:08:11AM +0200, Yongzhao Chen wrote: > From: Ziyang Huang > > A PHY-to-PHY CPU link connects the SoC PHY directly to an internal > switch PHY. The QCA8337 supports header mode on these ports, and > existing phylink callbacks already handle their internal interfaces. > > Allow QCA8337 CPU port selection to fall back to ports 1 through 5 after > checking the dedicated MAC-only ports. Preserve the preference for CPU > ports 0 and 6 across all switch models, limiting the internal-port > fallback to QCA8337. Support for QCA8327 internal CPU links has not > been established and is not enabled. Include internal CPU PHYs when > selecting the PHY access method, without altering the handling of > MAC-only or external user ports. > > This enables a single internal CPU PHY configured with an explicit > phy-handle and phy-mode = "internal". The conduit interface uses its own > PHY on the opposite side of the MDI connection. Existing single-CPU DSA > forwarding uses the selected port for default flooding and membership > without extra routing changes. > > Adapted from the OpenWrt PHY-to-PHY CPU link patch, narrowing the MDIO > filter adjustments to preserve handling for external user ports. > Can you put an example DT for this? Also no additional register are needed to this special mode? > [yongzhao: preserve external user-port handling on port 6 and limit > internal CPU PHY support to QCA8337] > > Assisted-by: LLM > Signed-off-by: Ziyang Huang > Signed-off-by: Yongzhao Chen > --- > drivers/net/dsa/qca/qca8k-8xxx.c | 18 +++++++++++++----- > 1 file changed, 13 insertions(+), 5 deletions(-) > > diff --git a/drivers/net/dsa/qca/qca8k-8xxx.c b/drivers/net/dsa/qca/qca8k-8xxx.c > index 7bd9d9abcef..cd36efd1c4f 100644 > --- a/drivers/net/dsa/qca/qca8k-8xxx.c > +++ b/drivers/net/dsa/qca/qca8k-8xxx.c > @@ -1026,7 +1026,8 @@ qca8k_setup_mdio_bus(struct qca8k_priv *priv) > return ret; > } > > - if (!dsa_is_user_port(priv->ds, reg)) > + if (!dsa_is_user_port(priv->ds, reg) && > + !(reg > 0 && reg < 6 && dsa_is_cpu_port(priv->ds, reg))) > continue; > > of_get_phy_mode(port, &mode); > @@ -1102,16 +1103,23 @@ qca8k_setup_mac_pwr_sel(struct qca8k_priv *priv) > static int qca8k_find_cpu_port(struct dsa_switch *ds) > { > struct qca8k_priv *priv = ds->priv; > + int port; > > - /* Find the connected cpu port. Valid port are 0 or 6 */ > if (dsa_is_cpu_port(ds, 0)) > return 0; > > - dev_dbg(priv->dev, "port 0 is not the CPU port. Checking port 6"); > - > if (dsa_is_cpu_port(ds, 6)) > return 6; > > + /* Internal PHY CPU port selection is currently enabled for QCA8337. */ > + if (priv->switch_id != QCA8K_ID_QCA8337) > + return -EINVAL; > + > + /* An internal PHY can provide a PHY-to-PHY CPU link. */ > + for (port = 1; port < 6; port++) > + if (dsa_is_cpu_port(ds, port)) > + return port; > + > return -EINVAL; > } > > @@ -1863,7 +1871,7 @@ qca8k_setup(struct dsa_switch *ds) > > cpu_port = qca8k_find_cpu_port(ds); > if (cpu_port < 0) { > - dev_err(priv->dev, "No cpu port configured in both cpu port0 and port6"); > + dev_err(priv->dev, "No CPU port configured"); > return cpu_port; > } > > -- > 2.43.0 > -- Ansuel